* more patches for next
@ 2010-10-22 13:15 Sascha Hauer
2010-10-22 13:15 ` [PATCH 01/13] ARM pca100: Use a flash bbt Sascha Hauer
` (13 more replies)
0 siblings, 14 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
The following changes since commit 298252bdef6a97d988f83f5ea554a2262c529ae2:
process_escape_sequence: Add missing include (2010-10-21 22:21:42 +0200)
are available in the git repository at:
git://git.pengutronix.de/git/barebox.git pu
Sascha Hauer (13):
ARM pca100: Use a flash bbt
i.MX nand: optimize nand boot code for size
mci-core: add multiple block support
i.MX51: Fix mmcclk rate
i.MX esdctl: Add register bits from redboot
i.MX35 regs: Add watchdog base
fb: i.MX IPU: remove unnecessary printf
fb: i.MX IPU: move fb_info initialization to a single function
fb: i.MX IPU: fold mx3fb_set_par into its only user
mci: align data for commands
ARM: Add Garz+Fricke Cupid board support
defaultenv: fix mtdparts
ARM: Add defconfig for Garz+Fricke cupid board
arch/arm/Makefile | 1 +
arch/arm/boards/guf-cupid/Makefile | 24 ++
arch/arm/boards/guf-cupid/board.c | 426 +++++++++++++++++++++++++++
arch/arm/boards/guf-cupid/config.h | 31 ++
arch/arm/boards/guf-cupid/cupid.dox | 9 +
arch/arm/boards/guf-cupid/env/config | 56 ++++
arch/arm/boards/guf-cupid/lowlevel.c | 349 ++++++++++++++++++++++
arch/arm/boards/phycard-i.MX27/pca100.c | 1 +
arch/arm/configs/cupid_defconfig | 56 ++++
arch/arm/mach-imx/Kconfig | 11 +
arch/arm/mach-imx/include/mach/esdctl.h | 88 ++++++
arch/arm/mach-imx/include/mach/imx35-regs.h | 1 +
arch/arm/mach-imx/speed-imx51.c | 33 ++-
defaultenv/bin/boot | 2 +-
drivers/mci/mci-core.c | 47 ++-
drivers/mtd/nand/Kconfig | 16 +
drivers/mtd/nand/nand_imx.c | 196 +++++++++----
drivers/video/imx-ipu-fb.c | 92 +++----
18 files changed, 1307 insertions(+), 132 deletions(-)
create mode 100644 arch/arm/boards/guf-cupid/Makefile
create mode 100644 arch/arm/boards/guf-cupid/board.c
create mode 100644 arch/arm/boards/guf-cupid/config.h
create mode 100644 arch/arm/boards/guf-cupid/cupid.dox
create mode 100644 arch/arm/boards/guf-cupid/env/config
create mode 100644 arch/arm/boards/guf-cupid/lowlevel.c
create mode 100644 arch/arm/configs/cupid_defconfig
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 01/13] ARM pca100: Use a flash bbt
2010-10-22 13:15 more patches for next Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 02/13] i.MX nand: optimize nand boot code for size Sascha Hauer
` (12 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/phycard-i.MX27/pca100.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boards/phycard-i.MX27/pca100.c b/arch/arm/boards/phycard-i.MX27/pca100.c
index 7460c00..3a96180 100644
--- a/arch/arm/boards/phycard-i.MX27/pca100.c
+++ b/arch/arm/boards/phycard-i.MX27/pca100.c
@@ -68,6 +68,7 @@ static struct device_d fec_dev = {
struct imx_nand_platform_data nand_info = {
.width = 1,
.hw_ecc = 1,
+ .flash_bbt = 1,
};
static struct device_d nand_dev = {
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 02/13] i.MX nand: optimize nand boot code for size
2010-10-22 13:15 more patches for next Sascha Hauer
2010-10-22 13:15 ` [PATCH 01/13] ARM pca100: Use a flash bbt Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 03/13] mci-core: add multiple block support Sascha Hauer
` (11 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/mtd/nand/Kconfig | 16 ++++
drivers/mtd/nand/nand_imx.c | 196 +++++++++++++++++++++++++++++--------------
2 files changed, 150 insertions(+), 62 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 475499a..bc95195 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -18,6 +18,22 @@ config NAND_IMX_BOOT
prompt "Support Starting barebox from NAND"
depends on NAND_IMX || NAND_IMX_V2
+choice
+ depends on NAND_IMX_BOOT
+ default NAND_IMX_BOOT_512_2K
+ prompt "select nand pagesize you want to support booting from"
+
+config NAND_IMX_BOOT_512
+ bool "512 byte page size"
+
+config NAND_IMX_BOOT_2K
+ bool "2048 byte page size"
+
+config NAND_IMX_BOOT_512_2K
+ bool "512 byte and 2048 byte pagesize"
+
+endchoice
+
config NAND_OMAP_GPMC
tristate "NAND Flash Support for GPMC based OMAP platforms"
depends on ((ARCH_OMAP2 || ARCH_OMAP3) && GPMC)
diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c
index 5454e32..63ba188 100644
--- a/drivers/mtd/nand/nand_imx.c
+++ b/drivers/mtd/nand/nand_imx.c
@@ -222,7 +222,7 @@ static void memcpy32(void *trg, const void *src, int size)
* @param max_retries number of retry attempts (separated by 1 us)
* @param param parameter for debug
*/
-static void __nand_boot_init wait_op_done(struct imx_nand_host *host)
+static void wait_op_done(struct imx_nand_host *host)
{
u32 tmp;
int i;
@@ -247,7 +247,7 @@ static void __nand_boot_init wait_op_done(struct imx_nand_host *host)
*
* @param cmd command for NAND Flash
*/
-static void __nand_boot_init send_cmd(struct imx_nand_host *host, u16 cmd)
+static void send_cmd(struct imx_nand_host *host, u16 cmd)
{
MTD_DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x)\n", cmd);
@@ -276,7 +276,7 @@ static void __nand_boot_init send_cmd(struct imx_nand_host *host, u16 cmd)
* @param addr address to be written to NFC.
* @param islast True if this is the last address cycle for command
*/
-static void __nand_boot_init noinline send_addr(struct imx_nand_host *host, u16 addr)
+static void send_addr(struct imx_nand_host *host, u16 addr)
{
MTD_DEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x %d)\n", addr, islast);
@@ -294,7 +294,7 @@ static void __nand_boot_init noinline send_addr(struct imx_nand_host *host, u16
* @param buf_id Specify Internal RAM Buffer number (0-3)
* @param spare_only set true if only the spare area is transferred
*/
-static void __nand_boot_init send_page(struct imx_nand_host *host,
+static void send_page(struct imx_nand_host *host,
unsigned int ops)
{
int bufs, i;
@@ -1013,20 +1013,87 @@ static struct driver_d imx_nand_driver = {
};
#ifdef CONFIG_NAND_IMX_BOOT
+static void __nand_boot_init noinline imx_nandboot_wait_op_done(void *regs)
+{
+ u32 r;
+
+ while (1) {
+ r = readw(regs + NFC_CONFIG2);
+ if (r & NFC_INT)
+ break;
+ };
+
+ r &= ~NFC_INT;
+
+ writew(r, regs + NFC_CONFIG2);
+}
+
+/*
+ * This function issues the specified command to the NAND device and
+ * waits for completion.
+ *
+ * @param cmd command for NAND Flash
+ */
+static void __nand_boot_init imx_nandboot_send_cmd(void *regs, u16 cmd)
+{
+ writew(cmd, regs + NFC_FLASH_CMD);
+ writew(NFC_CMD, regs + NFC_CONFIG2);
+
+ imx_nandboot_wait_op_done(regs);
+}
+
+/*
+ * This function sends an address (or partial address) to the
+ * NAND device. The address is used to select the source/destination for
+ * a NAND command.
+ *
+ * @param addr address to be written to NFC.
+ * @param islast True if this is the last address cycle for command
+ */
+static void __nand_boot_init noinline imx_nandboot_send_addr(void *regs, u16 addr)
+{
+ writew(addr, regs + NFC_FLASH_ADDR);
+ writew(NFC_ADDR, regs + NFC_CONFIG2);
+
+ /* Wait for operation to complete */
+ imx_nandboot_wait_op_done(regs);
+}
-static void __nand_boot_init nfc_addr(struct imx_nand_host *host, u32 offs)
+static void __nand_boot_init imx_nandboot_nfc_addr(void *regs, u32 offs, int pagesize_2k)
{
- if (host->pagesize_2k) {
- send_addr(host, offs & 0xff);
- send_addr(host, offs & 0xff);
- send_addr(host, (offs >> 11) & 0xff);
- send_addr(host, (offs >> 19) & 0xff);
- send_addr(host, (offs >> 27) & 0xff);
+ imx_nandboot_send_addr(regs, offs & 0xff);
+
+ if (pagesize_2k) {
+ imx_nandboot_send_addr(regs, offs & 0xff);
+ imx_nandboot_send_addr(regs, (offs >> 11) & 0xff);
+ imx_nandboot_send_addr(regs, (offs >> 19) & 0xff);
+ imx_nandboot_send_addr(regs, (offs >> 27) & 0xff);
+ imx_nandboot_send_cmd(regs, NAND_CMD_READSTART);
} else {
- send_addr(host, offs & 0xff);
- send_addr(host, (offs >> 9) & 0xff);
- send_addr(host, (offs >> 17) & 0xff);
- send_addr(host, (offs >> 25) & 0xff);
+ imx_nandboot_send_addr(regs, (offs >> 9) & 0xff);
+ imx_nandboot_send_addr(regs, (offs >> 17) & 0xff);
+ imx_nandboot_send_addr(regs, (offs >> 25) & 0xff);
+ }
+}
+
+static void __nand_boot_init imx_nandboot_send_page(void *regs,
+ unsigned int ops, int pagesize_2k)
+{
+ int bufs, i;
+
+ if (nfc_is_v1() && pagesize_2k)
+ bufs = 4;
+ else
+ bufs = 1;
+
+ for (i = 0; i < bufs; i++) {
+ /* NANDFC buffer 0 is used for page read/write */
+ writew(i, regs + NFC_BUF_ADDR);
+
+ writew(ops, regs + NFC_CONFIG2);
+
+ /* Wait for operation to complete */
+ imx_nandboot_wait_op_done(regs);
}
}
@@ -1040,38 +1107,49 @@ static void __nand_boot_init __memcpy32(void *trg, const void *src, int size)
*t++ = *s++;
}
-void __nand_boot_init imx_nand_load_image(void *dest, int size)
+static int __maybe_unused is_pagesize_2k(void)
{
- struct imx_nand_host host;
- u32 tmp, page, block, blocksize, pagesize;
#ifdef CONFIG_ARCH_IMX21
- tmp = readl(IMX_SYSTEM_CTL_BASE + 0x14);
- if (tmp & (1 << 5))
- host.pagesize_2k = 1;
+ if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
+ return 1;
else
- host.pagesize_2k = 0;
+ return 0;
#endif
#ifdef CONFIG_ARCH_IMX27
- tmp = readl(IMX_SYSTEM_CTL_BASE + 0x14);
- if (tmp & (1 << 5))
- host.pagesize_2k = 1;
+ if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
+ return 1;
else
- host.pagesize_2k = 0;
+ return 0;
#endif
#ifdef CONFIG_ARCH_IMX31
- tmp = readl(IMX_CCM_BASE + CCM_RCSR);
- if (tmp & RCSR_NFMS)
- host.pagesize_2k = 1;
+ if (readl(IMX_CCM_BASE + CCM_RCSR) & RCSR_NFMS)
+ return 1;
else
- host.pagesize_2k = 0;
+ return 0;
#endif
#if defined(CONFIG_ARCH_IMX35) || defined(CONFIG_ARCH_IMX25)
if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 8))
- host.pagesize_2k = 1;
+ return 1;
else
- host.pagesize_2k = 0;
+ return 0;
+#endif
+}
+
+void __nand_boot_init imx_nand_load_image(void *dest, int size)
+{
+ u32 tmp, page, block, blocksize, pagesize;
+ int pagesize_2k = 1;
+ void *regs, *base, *spare0;
+
+#if defined(CONFIG_NAND_IMX_BOOT_512)
+ pagesize_2k = 0;
+#elif defined(CONFIG_NAND_IMX_BOOT_2K)
+ pagesize_2k = 1;
+#else
+ pagesize_2k = is_pagesize_2k();
#endif
- if (host.pagesize_2k) {
+
+ if (pagesize_2k) {
pagesize = 2048;
blocksize = 128 * 1024;
} else {
@@ -1079,45 +1157,43 @@ void __nand_boot_init imx_nand_load_image(void *dest, int size)
blocksize = 16 * 1024;
}
- host.base = (void __iomem *)IMX_NFC_BASE;
+ base = (void __iomem *)IMX_NFC_BASE;
if (nfc_is_v21()) {
- host.regs = host.base + 0x1000;
- host.spare0 = host.base + 0x1000;
- host.spare_len = 64;
+ regs = base + 0x1000;
+ spare0 = base + 0x1000;
} else if (nfc_is_v1()) {
- host.regs = host.base;
- host.spare0 = host.base + 0x800;
- host.spare_len = 16;
+ regs = base;
+ spare0 = base + 0x800;
}
- send_cmd(&host, NAND_CMD_RESET);
+ imx_nandboot_send_cmd(regs, NAND_CMD_RESET);
/* preset operation */
/* Unlock the internal RAM Buffer */
- writew(0x2, host.regs + NFC_CONFIG);
+ writew(0x2, regs + NFC_CONFIG);
/* Unlock Block Command for given address range */
- writew(0x4, host.regs + NFC_WRPROT);
+ writew(0x4, regs + NFC_WRPROT);
- tmp = readw(host.regs + NFC_CONFIG1);
+ tmp = readw(regs + NFC_CONFIG1);
tmp |= NFC_ECC_EN;
if (nfc_is_v21())
/* currently no support for 218 byte OOB with stronger ECC */
tmp |= NFC_ECC_MODE;
tmp &= ~(NFC_SP_EN | NFC_INT_MSK);
- writew(tmp, host.regs + NFC_CONFIG1);
+ writew(tmp, regs + NFC_CONFIG1);
if (nfc_is_v21()) {
- if (host.pagesize_2k) {
- tmp = readw(host.regs + NFC_SPAS);
+ if (pagesize_2k) {
+ tmp = readw(regs + NFC_SPAS);
tmp &= 0xff00;
tmp |= NFC_SPAS_64;
- writew(tmp, host.regs + NFC_SPAS);
+ writew(tmp, regs + NFC_SPAS);
} else {
- tmp = readw(host.regs + NFC_SPAS);
+ tmp = readw(regs + NFC_SPAS);
tmp &= 0xff00;
tmp |= NFC_SPAS_16;
- writew(tmp, host.regs + NFC_SPAS);
+ writew(tmp, regs + NFC_SPAS);
}
}
@@ -1132,25 +1208,21 @@ void __nand_boot_init imx_nand_load_image(void *dest, int size)
block * blocksize +
page * pagesize);
- send_cmd(&host, NAND_CMD_READ0);
- nfc_addr(&host, block * blocksize +
- page * pagesize);
- if (host.pagesize_2k)
- send_cmd(&host, NAND_CMD_READSTART);
- send_page(&host, NFC_OUTPUT);
+ imx_nandboot_send_cmd(regs, NAND_CMD_READ0);
+ imx_nandboot_nfc_addr(regs, block * blocksize +
+ page * pagesize, pagesize_2k);
+ imx_nandboot_send_page(regs, NFC_OUTPUT, pagesize_2k);
page++;
- if (host.pagesize_2k) {
- if ((readw(host.spare0) & 0xff)
- != 0xff)
+ if (pagesize_2k) {
+ if ((readw(spare0) & 0xff) != 0xff)
continue;
} else {
- if ((readw(host.spare0 + 4) & 0xff00)
- != 0xff00)
+ if ((readw(spare0 + 4) & 0xff00) != 0xff00)
continue;
}
- __memcpy32(dest, host.base, pagesize);
+ __memcpy32(dest, base, pagesize);
dest += pagesize;
size -= pagesize;
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 03/13] mci-core: add multiple block support
2010-10-22 13:15 more patches for next Sascha Hauer
2010-10-22 13:15 ` [PATCH 01/13] ARM pca100: Use a flash bbt Sascha Hauer
2010-10-22 13:15 ` [PATCH 02/13] i.MX nand: optimize nand boot code for size Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:40 ` Juergen Beisert
2010-10-22 14:03 ` Juergen Beisert
2010-10-22 13:15 ` [PATCH 04/13] i.MX51: Fix mmcclk rate Sascha Hauer
` (10 subsequent siblings)
13 siblings, 2 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
So far only for reading blocks. This is based on the corresponding
U-Boot code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Juergen Beisert <jbe@pengutronix.de>
---
drivers/mci/mci-core.c | 35 +++++++++++++++++++++++++++--------
1 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index c92d5a9..34c4f8c 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -139,23 +139,41 @@ static int mci_block_write(struct device_d *mci_dev, const void *src, unsigned b
* @param dst Where to store the data read from the card
* @param blocknum Block number to read
*/
-static int mci_read_block(struct device_d *mci_dev, void *dst, unsigned blocknum)
+static int mci_read_block(struct device_d *mci_dev, void *dst, unsigned blocknum, int blocks)
{
struct mci *mci = GET_MCI_DATA(mci_dev);
struct mci_cmd cmd;
struct mci_data data;
+ int ret;
+ unsigned mmccmd;
+
+ if (blocks > 1)
+ mmccmd = MMC_CMD_READ_MULTIPLE_BLOCK;
+ else
+ mmccmd = MMC_CMD_READ_SINGLE_BLOCK;
mci_setup_cmd(&cmd,
- MMC_CMD_READ_SINGLE_BLOCK,
+ mmccmd,
mci->high_capacity != 0 ? blocknum : blocknum * mci->read_bl_len,
MMC_RSP_R1);
data.dest = dst;
- data.blocks = 1;
+ data.blocks = blocks;
data.blocksize = mci->read_bl_len;
data.flags = MMC_DATA_READ;
- return mci_send_cmd(mci_dev, &cmd, &data);
+ ret = mci_send_cmd(mci_dev, &cmd, &data);
+ if (ret)
+ return ret;
+
+ if (blocks > 1) {
+ mci_setup_cmd(&cmd,
+ MMC_CMD_STOP_TRANSMISSION,
+ 0,
+ MMC_RSP_R1b);
+ ret = mci_send_cmd(mci_dev, &cmd, NULL);
+ }
+ return ret;
}
/**
@@ -979,19 +997,20 @@ static int mci_sd_read(struct device_d *disk_dev, uint64_t sector_start,
}
while (sector_count) {
+ int now = min(sector_count, 32);
if (sector_start > MAX_BUFFER_NUMBER) {
pr_err("Cannot handle block number %lu. Too large!\n",
(unsigned)sector_start);
return -EINVAL;
}
- rc = mci_read_block(mci_dev, buffer, (unsigned)sector_start);
+ rc = mci_read_block(mci_dev, buffer, (unsigned)sector_start, now);
if (rc != 0) {
pr_err("Reading block %lu failed with %d\n", (unsigned)sector_start, rc);
return rc;
}
- sector_count--;
- buffer += mci->read_bl_len;
- sector_start++;
+ sector_count -= now;
+ buffer += mci->read_bl_len * now;
+ sector_start += now;
}
return 0;
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 04/13] i.MX51: Fix mmcclk rate
2010-10-22 13:15 more patches for next Sascha Hauer
` (2 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 03/13] mci-core: add multiple block support Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 05/13] i.MX esdctl: Add register bits from redboot Sascha Hauer
` (9 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/speed-imx51.c | 33 ++++++++++++++++++++++++++++++---
1 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/speed-imx51.c b/arch/arm/mach-imx/speed-imx51.c
index dcfc874..9983297 100644
--- a/arch/arm/mach-imx/speed-imx51.c
+++ b/arch/arm/mach-imx/speed-imx51.c
@@ -90,6 +90,26 @@ static unsigned long pll3_sw_get_rate(void)
return pll_get_rate((void __iomem *)MX51_PLL3_BASE_ADDR);
}
+static unsigned long get_rate_select(int select,
+ unsigned long (* get_rate1)(void),
+ unsigned long (* get_rate2)(void),
+ unsigned long (* get_rate3)(void),
+ unsigned long (* get_rate4)(void))
+{
+ switch (select) {
+ case 0:
+ return get_rate1() ? get_rate1() : 0;
+ case 1:
+ return get_rate2() ? get_rate2() : 0;
+ case 2:
+ return get_rate3 ? get_rate3() : 0;
+ case 3:
+ return get_rate4 ? get_rate4() : 0;
+ }
+
+ return 0;
+}
+
unsigned long imx_get_uartclk(void)
{
u32 reg, prediv, podf;
@@ -140,15 +160,22 @@ unsigned long imx_get_mmcclk(void)
{
u32 reg, prediv, podf, rate;
+ reg = ccm_readl(MX51_CCM_CSCMR1);
+ reg &= MX51_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK;
+ reg >>= MX51_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET;
+ rate = get_rate_select(reg,
+ pll1_main_get_rate,
+ pll2_sw_get_rate,
+ pll3_sw_get_rate,
+ NULL);
+
reg = ccm_readl(MX51_CCM_CSCDR1);
prediv = ((reg & MX51_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK) >>
MX51_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET) + 1;
podf = ((reg & MX51_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK) >>
MX51_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET) + 1;
- rate = pll2_sw_get_rate() / (prediv * podf);
-
- return rate;
+ return rate / (prediv * podf);
}
void imx_dump_clocks(void)
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 05/13] i.MX esdctl: Add register bits from redboot
2010-10-22 13:15 more patches for next Sascha Hauer
` (3 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 04/13] i.MX51: Fix mmcclk rate Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 06/13] i.MX35 regs: Add watchdog base Sascha Hauer
` (8 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/esdctl.h | 88 +++++++++++++++++++++++++++++++
1 files changed, 88 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/esdctl.h b/arch/arm/mach-imx/include/mach/esdctl.h
index d15f52b..fe74cb6 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -18,9 +18,11 @@
#define ESDCTL0_ROW13 (2 << 24)
#define ESDCTL0_ROW14 (3 << 24)
#define ESDCTL0_ROW15 (4 << 24)
+#define ESDCTL0_ROW_MASK (7 << 24)
#define ESDCTL0_COL8 (0 << 20)
#define ESDCTL0_COL9 (1 << 20)
#define ESDCTL0_COL10 (2 << 20)
+#define ESDCTL0_COL_MASK (3 << 20)
#define ESDCTL0_DSIZ_31_16 (0 << 16)
#define ESDCTL0_DSIZ_15_0 (1 << 16)
#define ESDCTL0_DSIZ_31_0 (2 << 16)
@@ -32,3 +34,89 @@
#define ESDCTL0_FP (1 << 8)
#define ESDCTL0_BL (1 << 7)
+#define ESDMISC_RST 0x00000002
+#define ESDMISC_MDDR_EN 0x00000004
+#define ESDMISC_MDDR_DIS 0x00000000
+#define ESDMISC_MDDR_DL_RST 0x00000008
+#define ESDMISC_MDDR_MDIS 0x00000010
+#define ESDMISC_LHD 0x00000020
+#define ESDMISC_SDRAMRDY 0x80000000
+
+#define ESDCFGx_tXP_MASK 0x00600000
+#define ESDCFGx_tXP_1 0x00000000
+#define ESDCFGx_tXP_2 0x00200000
+#define ESDCFGx_tXP_3 0x00400000
+#define ESDCFGx_tXP_4 0x00600000
+
+#define ESDCFGx_tWTR_MASK 0x00100000
+#define ESDCFGx_tWTR_1 0x00000000
+#define ESDCFGx_tWTR_2 0x00100000
+
+#define ESDCFGx_tRP_MASK 0x000c0000
+#define ESDCFGx_tRP_1 0x00000000
+#define ESDCFGx_tRP_2 0x00040000
+#define ESDCFGx_tRP_3 0x00080000
+#define ESDCFGx_tRP_4 0x000c0000
+
+
+#define ESDCFGx_tMRD_MASK 0x00030000
+#define ESDCFGx_tMRD_1 0x00000000
+#define ESDCFGx_tMRD_2 0x00010000
+#define ESDCFGx_tMRD_3 0x00020000
+#define ESDCFGx_tMRD_4 0x00030000
+
+
+#define ESDCFGx_tWR_MASK 0x00008000
+#define ESDCFGx_tWR_1_2 0x00000000
+#define ESDCFGx_tWR_2_3 0x00008000
+
+#define ESDCFGx_tRAS_MASK 0x00007000
+#define ESDCFGx_tRAS_1 0x00000000
+#define ESDCFGx_tRAS_2 0x00001000
+#define ESDCFGx_tRAS_3 0x00002000
+#define ESDCFGx_tRAS_4 0x00003000
+#define ESDCFGx_tRAS_5 0x00004000
+#define ESDCFGx_tRAS_6 0x00005000
+#define ESDCFGx_tRAS_7 0x00006000
+#define ESDCFGx_tRAS_8 0x00007000
+
+
+#define ESDCFGx_tRRD_MASK 0x00000c00
+#define ESDCFGx_tRRD_1 0x00000000
+#define ESDCFGx_tRRD_2 0x00000400
+#define ESDCFGx_tRRD_3 0x00000800
+#define ESDCFGx_tRRD_4 0x00000c00
+
+
+#define ESDCFGx_tCAS_MASK 0x00000300
+#define ESDCFGx_tCAS_2 0x00000200
+#define ESDCFGx_tCAS_3 0x00000300
+
+#define ESDCFGx_tRCD_MASK 0x00000070
+#define ESDCFGx_tRCD_1 0x00000000
+#define ESDCFGx_tRCD_2 0x00000010
+#define ESDCFGx_tRCD_3 0x00000020
+#define ESDCFGx_tRCD_4 0x00000030
+#define ESDCFGx_tRCD_5 0x00000040
+#define ESDCFGx_tRCD_6 0x00000050
+#define ESDCFGx_tRCD_7 0x00000060
+#define ESDCFGx_tRCD_8 0x00000070
+
+#define ESDCFGx_tRC_MASK 0x0000000f
+#define ESDCFGx_tRC_20 0x00000000
+#define ESDCFGx_tRC_2 0x00000001
+#define ESDCFGx_tRC_3 0x00000002
+#define ESDCFGx_tRC_4 0x00000003
+#define ESDCFGx_tRC_5 0x00000004
+#define ESDCFGx_tRC_6 0x00000005
+#define ESDCFGx_tRC_7 0x00000006
+#define ESDCFGx_tRC_8 0x00000007
+#define ESDCFGx_tRC_9 0x00000008
+#define ESDCFGx_tRC_10 0x00000009
+#define ESDCFGx_tRC_11 0x0000000a
+#define ESDCFGx_tRC_12 0x0000000b
+#define ESDCFGx_tRC_13 0x0000000c
+#define ESDCFGx_tRC_14 0x0000000d
+//#define ESDCFGx_tRC_14 0x0000000e // 15 seems to not exist
+#define ESDCFGx_tRC_16 0x0000000f
+
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 06/13] i.MX35 regs: Add watchdog base
2010-10-22 13:15 more patches for next Sascha Hauer
` (4 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 05/13] i.MX esdctl: Add register bits from redboot Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 07/13] fb: i.MX IPU: remove unnecessary printf Sascha Hauer
` (7 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/imx35-regs.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imx35-regs.h b/arch/arm/mach-imx/include/mach/imx35-regs.h
index b0f6b82..89ca7ea 100644
--- a/arch/arm/mach-imx/include/mach/imx35-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx35-regs.h
@@ -52,6 +52,7 @@
#define IMX_SDHC2_BASE 0x53FB8000
#define IMX_SDHC3_BASE 0x53FBC000
#define IMX_OTG_BASE 0x53FF4000
+#define IMX_WDOG_BASE 0x53fdc000
/*
* Clock Controller Module (CCM)
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 07/13] fb: i.MX IPU: remove unnecessary printf
2010-10-22 13:15 more patches for next Sascha Hauer
` (5 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 06/13] i.MX35 regs: Add watchdog base Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 08/13] fb: i.MX IPU: move fb_info initialization to a single function Sascha Hauer
` (6 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/video/imx-ipu-fb.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c
index 2c25b81..399af75 100644
--- a/drivers/video/imx-ipu-fb.c
+++ b/drivers/video/imx-ipu-fb.c
@@ -840,8 +840,6 @@ static void ipu_fb_disable(struct fb_info *info)
struct ipu_fb_info *fbi = info->priv;
u32 reg;
- printf("%s\n", __func__);
-
if (fbi->enable)
fbi->enable(0);
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 08/13] fb: i.MX IPU: move fb_info initialization to a single function
2010-10-22 13:15 more patches for next Sascha Hauer
` (6 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 07/13] fb: i.MX IPU: remove unnecessary printf Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 09/13] fb: i.MX IPU: fold mx3fb_set_par into its only user Sascha Hauer
` (5 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
The bitfield information was only added to fb_info when the
framebuffer actually was enabled. That made it impossible to
call 'bmp' before enabling the display.
So, move all fb_info init to a single place and make it a function
to better allow for multiple displays later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/video/imx-ipu-fb.c | 63 ++++++++++++++++++++++++-------------------
1 files changed, 35 insertions(+), 28 deletions(-)
diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c
index 399af75..08036aa 100644
--- a/drivers/video/imx-ipu-fb.c
+++ b/drivers/video/imx-ipu-fb.c
@@ -729,7 +729,6 @@ static void sdc_enable_channel(struct ipu_fb_info *fbi, void *fbmem)
static int mx3fb_set_par(struct fb_info *info)
{
struct ipu_fb_info *fbi = info->priv;
- struct imx_ipu_fb_rgb *rgb;
struct fb_videomode *mode = info->mode;
int ret;
@@ -740,29 +739,6 @@ static int mx3fb_set_par(struct fb_info *info)
reg_write(fbi, (mode->left_margin << 16) | mode->upper_margin,
SDC_BG_POS);
- switch (info->bits_per_pixel) {
- case 32:
- rgb = &def_rgb_32;
- break;
- case 24:
- rgb = &def_rgb_24;
- break;
- case 16:
- default:
- rgb = &def_rgb_16;
- break;
- }
-
- /*
- * Copy the RGB parameters for this display
- * from the machine specific parameters.
- */
- info->red = rgb->red;
- info->green = rgb->green;
- info->blue = rgb->blue;
- info->transp = rgb->transp;
-
-
return 0;
}
@@ -853,6 +829,39 @@ static struct fb_ops imxfb_ops = {
.fb_disable = ipu_fb_disable,
};
+static void imxfb_init_info(struct fb_info *info, struct fb_videomode *mode,
+ int bpp)
+{
+ struct imx_ipu_fb_rgb *rgb;
+
+ info->mode = mode;
+ info->xres = mode->xres;
+ info->yres = mode->yres;
+ info->bits_per_pixel = bpp;
+
+ switch (info->bits_per_pixel) {
+ case 32:
+ rgb = &def_rgb_32;
+ break;
+ case 24:
+ rgb = &def_rgb_24;
+ break;
+ case 16:
+ default:
+ rgb = &def_rgb_16;
+ break;
+ }
+
+ /*
+ * Copy the RGB parameters for this display
+ * from the machine specific parameters.
+ */
+ info->red = rgb->red;
+ info->green = rgb->green;
+ info->blue = rgb->blue;
+ info->transp = rgb->transp;
+}
+
static int imxfb_probe(struct device_d *dev)
{
struct ipu_fb_info *fbi;
@@ -869,13 +878,11 @@ static int imxfb_probe(struct device_d *dev)
fbi->regs = (void *)dev->map_base;
fbi->dev = dev;
info->priv = fbi;
- info->mode = pdata->mode;
- info->xres = pdata->mode->xres;
- info->yres = pdata->mode->yres;
- info->bits_per_pixel = pdata->bpp;
info->fbops = &imxfb_ops;
fbi->enable = pdata->enable;
+ imxfb_init_info(info, pdata->mode, pdata->bpp);
+
dev_info(dev, "i.MX Framebuffer driver\n");
/*
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 09/13] fb: i.MX IPU: fold mx3fb_set_par into its only user
2010-10-22 13:15 more patches for next Sascha Hauer
` (7 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 08/13] fb: i.MX IPU: move fb_info initialization to a single function Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 10/13] mci: align data for commands Sascha Hauer
` (4 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/video/imx-ipu-fb.c | 27 +++++----------------------
1 files changed, 5 insertions(+), 22 deletions(-)
diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c
index 08036aa..c38082d 100644
--- a/drivers/video/imx-ipu-fb.c
+++ b/drivers/video/imx-ipu-fb.c
@@ -722,31 +722,11 @@ static void sdc_enable_channel(struct ipu_fb_info *fbi, void *fbmem)
mdelay(2);
}
-/*
- * mx3fb_set_par() - set framebuffer parameters and change the operating mode.
- * @return: 0 on success or negative error code on failure.
- */
-static int mx3fb_set_par(struct fb_info *info)
-{
- struct ipu_fb_info *fbi = info->priv;
- struct fb_videomode *mode = info->mode;
- int ret;
-
- ret = sdc_init_panel(info, IPU_PIX_FMT_RGB666);
- if (ret < 0)
- return ret;
-
- reg_write(fbi, (mode->left_margin << 16) | mode->upper_margin,
- SDC_BG_POS);
-
- return 0;
-}
-
/* References in this function refer to respective Linux kernel sources */
static void ipu_fb_enable(struct fb_info *info)
{
struct ipu_fb_info *fbi = info->priv;
-
+ struct fb_videomode *mode = info->mode;
u32 reg;
/* pcm037.c::mxc_board_init() */
@@ -799,7 +779,10 @@ static void ipu_fb_enable(struct fb_info *info)
~(SDC_COM_GWSEL | SDC_COM_KEY_COLOR_G);
reg_write(fbi, reg, SDC_COM_CONF);
- mx3fb_set_par(info);
+ sdc_init_panel(info, IPU_PIX_FMT_RGB666);
+
+ reg_write(fbi, (mode->left_margin << 16) | mode->upper_margin,
+ SDC_BG_POS);
sdc_enable_channel(fbi, info->screen_base);
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 10/13] mci: align data for commands
2010-10-22 13:15 more patches for next Sascha Hauer
` (8 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 09/13] fb: i.MX IPU: fold mx3fb_set_par into its only user Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:41 ` Juergen Beisert
2010-10-22 13:15 ` [PATCH 11/13] ARM: Add Garz+Fricke Cupid board support Sascha Hauer
` (3 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Some mci controllers cannot transfer data with their DMA engines
if the data is not sufficiently aligned. Normally this is a driver
problem, but hey, we have no problem aligning the data and keep
the burden from the drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Juergen Beisert <jbe@pengutronix.de>
---
drivers/mci/mci-core.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 34c4f8c..6f31cca 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -347,7 +347,7 @@ static int mci_switch(struct device_d *mci_dev, unsigned set, unsigned index,
static int mmc_change_freq(struct device_d *mci_dev)
{
struct mci *mci = GET_MCI_DATA(mci_dev);
- char ext_csd[512];
+ char *ext_csd = sector_buf;
char cardtype;
int err;
@@ -439,8 +439,8 @@ static int sd_change_freq(struct device_d *mci_dev)
struct mci *mci = GET_MCI_DATA(mci_dev);
struct mci_cmd cmd;
struct mci_data data;
- uint32_t switch_status[16];
- uint scr[2];
+ uint32_t *switch_status = sector_buf;
+ uint32_t *scr = sector_buf;
int timeout;
int err;
@@ -461,7 +461,7 @@ static int sd_change_freq(struct device_d *mci_dev)
retry_scr:
pr_debug("Trying to read the SCR (try %d of %d)\n", 4 - timeout, 3);
- data.dest = (char *)&scr;
+ data.dest = (char *)scr;
data.blocksize = 8;
data.blocks = 1;
data.flags = MMC_DATA_READ;
@@ -502,7 +502,7 @@ retry_scr:
timeout = 4;
while (timeout--) {
err = sd_switch(mci_dev, SD_SWITCH_CHECK, 0, 1,
- (uint8_t*)&switch_status);
+ (uint8_t*)switch_status);
if (err) {
pr_debug("Checking SD transfer switch frequency feature failed: %d\n", err);
return err;
@@ -520,7 +520,7 @@ retry_scr:
if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
return 0;
- err = sd_switch(mci_dev, SD_SWITCH_SWITCH, 0, 1, (uint8_t*)&switch_status);
+ err = sd_switch(mci_dev, SD_SWITCH_SWITCH, 0, 1, (uint8_t*)switch_status);
if (err) {
pr_debug("Switching SD transfer frequency failed: %d\n", err);
return err;
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 11/13] ARM: Add Garz+Fricke Cupid board support
2010-10-22 13:15 more patches for next Sascha Hauer
` (9 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 10/13] mci: align data for commands Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 12/13] defaultenv: fix mtdparts Sascha Hauer
` (2 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/Makefile | 1 +
arch/arm/boards/guf-cupid/Makefile | 24 ++
arch/arm/boards/guf-cupid/board.c | 426 ++++++++++++++++++++++++++++++++++
arch/arm/boards/guf-cupid/config.h | 31 +++
arch/arm/boards/guf-cupid/cupid.dox | 9 +
arch/arm/boards/guf-cupid/env/config | 56 +++++
arch/arm/boards/guf-cupid/lowlevel.c | 349 ++++++++++++++++++++++++++++
arch/arm/mach-imx/Kconfig | 11 +
8 files changed, 907 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boards/guf-cupid/Makefile
create mode 100644 arch/arm/boards/guf-cupid/board.c
create mode 100644 arch/arm/boards/guf-cupid/config.h
create mode 100644 arch/arm/boards/guf-cupid/cupid.dox
create mode 100644 arch/arm/boards/guf-cupid/env/config
create mode 100644 arch/arm/boards/guf-cupid/lowlevel.c
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d9670c4..cdb0185 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -84,6 +84,7 @@ board-$(CONFIG_MACH_NESO) := guf-neso
board-$(CONFIG_MACH_MX23EVK) := freescale-mx23-evk
board-$(CONFIG_MACH_CHUMBY) := chumby_falconwing
board-$(CONFIG_MACH_FREESCALE_MX51_PDK) := freescale-mx51-pdk
+board-$(CONFIG_MACH_GUF_CUPID) := guf-cupid
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
diff --git a/arch/arm/boards/guf-cupid/Makefile b/arch/arm/boards/guf-cupid/Makefile
new file mode 100644
index 0000000..3a06cf4
--- /dev/null
+++ b/arch/arm/boards/guf-cupid/Makefile
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2007 Juergen Beisert <jbe@pengutronix.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+obj-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c
new file mode 100644
index 0000000..6d7a99b
--- /dev/null
+++ b/arch/arm/boards/guf-cupid/board.c
@@ -0,0 +1,426 @@
+/*
+ * (C) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ * (C) 2009 Pengutronix, Juergen Beisert <kernel@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Board support for the Garz+Fricke Cupid board
+ */
+
+#include <common.h>
+#include <command.h>
+#include <init.h>
+#include <driver.h>
+#include <environment.h>
+#include <fs.h>
+#include <mach/imx-regs.h>
+#include <asm/armlinux.h>
+#include <mach/gpio.h>
+#include <asm/io.h>
+#include <partition.h>
+#include <nand.h>
+#include <generated/mach-types.h>
+#include <mach/imx-nand.h>
+#include <fec.h>
+#include <fb.h>
+#include <asm/mmu.h>
+#include <mach/imx-ipu-fb.h>
+#include <mach/imx-pll.h>
+#include <mach/iomux-mx35.h>
+
+static struct fec_platform_data fec_info = {
+ .xcv_type = MII100,
+};
+
+static struct device_d fec_dev = {
+ .id = -1,
+ .name = "fec_imx",
+ .map_base = IMX_FEC_BASE,
+ .platform_data = &fec_info,
+};
+
+static struct memory_platform_data ram_pdata = {
+ .name = "ram0",
+ .flags = DEVFS_RDWR,
+};
+
+static struct device_d sdram0_dev = {
+ .id = -1,
+ .name = "mem",
+ .map_base = IMX_SDRAM_CS0,
+ .size = 128 * 1024 * 1024,
+ .platform_data = &ram_pdata,
+};
+
+struct imx_nand_platform_data nand_info = {
+ .width = 1,
+ .hw_ecc = 1,
+ .flash_bbt = 1,
+};
+
+static struct device_d nand_dev = {
+ .id = -1,
+ .name = "imx_nand",
+ .map_base = IMX_NFC_BASE,
+ .platform_data = &nand_info,
+};
+
+static struct fb_videomode guf_cupid_fb_mode = {
+ /* 800x480 @ 70 Hz */
+ .name = "CPT CLAA070LC0JCT",
+ .refresh = 70,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = 30761,
+ .left_margin = 24,
+ .right_margin = 47,
+ .upper_margin = 5,
+ .lower_margin = 3,
+ .hsync_len = 24,
+ .vsync_len = 3,
+ .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_CLK_INVERT |
+ FB_SYNC_OE_ACT_HIGH,
+ .vmode = FB_VMODE_NONINTERLACED,
+ .flag = 0,
+};
+
+#define GPIO_LCD_ENABLE (2 * 32 + 24)
+#define GPIO_LCD_BACKLIGHT (0 * 32 + 19)
+
+static void cupid_fb_enable(int enable)
+{
+ if (enable) {
+ gpio_direction_output(GPIO_LCD_ENABLE, 1);
+ mdelay(100);
+ gpio_direction_output(GPIO_LCD_BACKLIGHT, 1);
+ } else {
+ gpio_direction_output(GPIO_LCD_BACKLIGHT, 0);
+ mdelay(100);
+ gpio_direction_output(GPIO_LCD_ENABLE, 0);
+ }
+}
+
+static struct imx_ipu_fb_platform_data ipu_fb_data = {
+ .mode = &guf_cupid_fb_mode,
+ .bpp = 16,
+ .enable = cupid_fb_enable,
+};
+
+static struct device_d imx_ipu_fb_dev = {
+ .id = -1,
+ .name = "imx-ipu-fb",
+ .map_base = 0x53fc0000,
+ .size = 0x1000,
+ .platform_data = &ipu_fb_data,
+};
+
+static struct device_d esdhc_dev = {
+ .name = "imx-esdhc",
+ .map_base = IMX_SDHC1_BASE,
+};
+
+#ifdef CONFIG_MMU
+static int cupid_mmu_init(void)
+{
+ mmu_init();
+
+ arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
+ arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
+
+ setup_dma_coherent(0x10000000);
+
+#if TEXT_BASE & (0x100000 - 1)
+#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
+#else
+ arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED);
+#endif
+
+ mmu_enable();
+
+#ifdef CONFIG_CACHE_L2X0
+ l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
+#endif
+ return 0;
+}
+postcore_initcall(cupid_mmu_init);
+#endif
+
+static int cupid_devices_init(void)
+{
+ uint32_t reg;
+
+ gpio_direction_output(GPIO_LCD_ENABLE, 0);
+ gpio_direction_output(GPIO_LCD_BACKLIGHT, 0);
+
+ reg = readl(IMX_CCM_BASE + CCM_RCSR);
+ /* some fuses provide us vital information about connected hardware */
+ if (reg & 0x20000000)
+ nand_info.width = 2; /* 16 bit */
+ else
+ nand_info.width = 1; /* 8 bit */
+
+ register_device(&fec_dev);
+ register_device(&nand_dev);
+
+ devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
+ dev_add_bb_dev("self_raw", "self0");
+ devfs_add_partition("nand0", 0x40000, 0x80000, PARTITION_FIXED, "env_raw");
+ dev_add_bb_dev("env_raw", "env0");
+
+ register_device(&sdram0_dev);
+ register_device(&imx_ipu_fb_dev);
+ register_device(&esdhc_dev);
+
+ armlinux_add_dram(&sdram0_dev);
+ armlinux_set_bootparams((void *)0x80000100);
+ armlinux_set_architecture(MACH_TYPE_GUF_CUPID);
+
+ return 0;
+}
+
+device_initcall(cupid_devices_init);
+
+static struct device_d cupid_serial_device = {
+ .id = -1,
+ .name = "imx_serial",
+ .map_base = IMX_UART1_BASE,
+ .size = 16 * 1024,
+};
+
+static struct pad_desc cupid_pads[] = {
+ /* UART1 */
+ MX35_PAD_CTS1__UART1_CTS,
+ MX35_PAD_RTS1__UART1_RTS,
+ MX35_PAD_TXD1__UART1_TXD_MUX,
+ MX35_PAD_RXD1__UART1_RXD_MUX,
+ /* UART2 */
+ MX35_PAD_CTS2__UART2_CTS,
+ MX35_PAD_RTS2__UART2_RTS,
+ MX35_PAD_TXD2__UART2_TXD_MUX,
+ MX35_PAD_RXD2__UART2_RXD_MUX,
+ /* FEC */
+ MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
+ MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
+ MX35_PAD_FEC_RX_DV__FEC_RX_DV,
+ MX35_PAD_FEC_COL__FEC_COL,
+ MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
+ MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
+ MX35_PAD_FEC_TX_EN__FEC_TX_EN,
+ MX35_PAD_FEC_MDC__FEC_MDC,
+ MX35_PAD_FEC_MDIO__FEC_MDIO,
+ MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
+ MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
+ MX35_PAD_FEC_CRS__FEC_CRS,
+ MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
+ MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
+ MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
+ MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
+ MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
+ MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
+ /* I2C1 */
+ MX35_PAD_I2C1_CLK__I2C1_SCL,
+ MX35_PAD_I2C1_DAT__I2C1_SDA,
+ /* Display */
+ MX35_PAD_LD0__IPU_DISPB_DAT_0,
+ MX35_PAD_LD1__IPU_DISPB_DAT_1,
+ MX35_PAD_LD2__IPU_DISPB_DAT_2,
+ MX35_PAD_LD3__IPU_DISPB_DAT_3,
+ MX35_PAD_LD4__IPU_DISPB_DAT_4,
+ MX35_PAD_LD5__IPU_DISPB_DAT_5,
+ MX35_PAD_LD6__IPU_DISPB_DAT_6,
+ MX35_PAD_LD7__IPU_DISPB_DAT_7,
+ MX35_PAD_LD8__IPU_DISPB_DAT_8,
+ MX35_PAD_LD9__IPU_DISPB_DAT_9,
+ MX35_PAD_LD10__IPU_DISPB_DAT_10,
+ MX35_PAD_LD11__IPU_DISPB_DAT_11,
+ MX35_PAD_LD12__IPU_DISPB_DAT_12,
+ MX35_PAD_LD13__IPU_DISPB_DAT_13,
+ MX35_PAD_LD14__IPU_DISPB_DAT_14,
+ MX35_PAD_LD15__IPU_DISPB_DAT_15,
+ MX35_PAD_LD16__IPU_DISPB_DAT_16,
+ MX35_PAD_LD17__IPU_DISPB_DAT_17,
+ MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
+ MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
+ MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
+ MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
+ MX35_PAD_LD18__GPIO3_24, /* LCD enable */
+ MX35_PAD_CSPI1_SS1__GPIO1_19, /* LCD backligtht PWM */
+ /* USB Host*/
+ MX35_PAD_MLB_CLK__GPIO3_3, /* USB Host PWR */
+ MX35_PAD_MLB_DAT__GPIO3_4, /* USB Host Overcurrent */
+ /* USB OTG */
+ MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
+ MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
+ /* SSI */
+ MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
+ MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
+ MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
+ MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
+ /* UCB1400 IRQ */
+ MX35_PAD_ATA_INTRQ__GPIO2_29,
+ /* Speaker On */
+ MX35_PAD_LD20__GPIO3_26,
+ /* LEDs */
+ MX35_PAD_TX1__GPIO1_14,
+ /* ESDHC1 */
+ MX35_PAD_SD1_CMD__ESDHC1_CMD,
+ MX35_PAD_SD1_CLK__ESDHC1_CLK,
+ MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
+ MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
+ MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
+ MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
+ /* ESDHC1 CD */
+ MX35_PAD_ATA_DATA5__GPIO2_18,
+ /* ESDHC1 WP */
+ MX35_PAD_ATA_DATA6__GPIO2_19,
+};
+
+static int cupid_console_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(cupid_pads, ARRAY_SIZE(cupid_pads));
+
+ register_device(&cupid_serial_device);
+ return 0;
+}
+
+console_initcall(cupid_console_init);
+
+static int cupid_core_setup(void)
+{
+ u32 tmp;
+
+ /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/
+ /*
+ * Set all MPROTx to be non-bufferable, trusted for R/W,
+ * not forced to user-mode.
+ */
+ writel(0x77777777, IMX_AIPS1_BASE);
+ writel(0x77777777, IMX_AIPS1_BASE + 0x4);
+ writel(0x77777777, IMX_AIPS2_BASE);
+ writel(0x77777777, IMX_AIPS2_BASE + 0x4);
+
+ /*
+ * Clear the on and off peripheral modules Supervisor Protect bit
+ * for SDMA to access them. Did not change the AIPS control registers
+ * (offset 0x20) access type
+ */
+ writel(0x0, IMX_AIPS1_BASE + 0x40);
+ writel(0x0, IMX_AIPS1_BASE + 0x44);
+ writel(0x0, IMX_AIPS1_BASE + 0x48);
+ writel(0x0, IMX_AIPS1_BASE + 0x4C);
+ tmp = readl(IMX_AIPS1_BASE + 0x50);
+ tmp &= 0x00FFFFFF;
+ writel(tmp, IMX_AIPS1_BASE + 0x50);
+
+ writel(0x0, IMX_AIPS2_BASE + 0x40);
+ writel(0x0, IMX_AIPS2_BASE + 0x44);
+ writel(0x0, IMX_AIPS2_BASE + 0x48);
+ writel(0x0, IMX_AIPS2_BASE + 0x4C);
+ tmp = readl(IMX_AIPS2_BASE + 0x50);
+ tmp &= 0x00FFFFFF;
+ writel(tmp, IMX_AIPS2_BASE + 0x50);
+
+ /* MAX (Multi-Layer AHB Crossbar Switch) setup */
+
+ /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */
+#define MAX_PARAM1 0x00302154
+ writel(MAX_PARAM1, IMX_MAX_BASE + 0x0); /* for S0 */
+ writel(MAX_PARAM1, IMX_MAX_BASE + 0x100); /* for S1 */
+ writel(MAX_PARAM1, IMX_MAX_BASE + 0x200); /* for S2 */
+ writel(MAX_PARAM1, IMX_MAX_BASE + 0x300); /* for S3 */
+ writel(MAX_PARAM1, IMX_MAX_BASE + 0x400); /* for S4 */
+
+ /* SGPCR - always park on last master */
+ writel(0x10, IMX_MAX_BASE + 0x10); /* for S0 */
+ writel(0x10, IMX_MAX_BASE + 0x110); /* for S1 */
+ writel(0x10, IMX_MAX_BASE + 0x210); /* for S2 */
+ writel(0x10, IMX_MAX_BASE + 0x310); /* for S3 */
+ writel(0x10, IMX_MAX_BASE + 0x410); /* for S4 */
+
+ /* MGPCR - restore default values */
+ writel(0x0, IMX_MAX_BASE + 0x800); /* for M0 */
+ writel(0x0, IMX_MAX_BASE + 0x900); /* for M1 */
+ writel(0x0, IMX_MAX_BASE + 0xa00); /* for M2 */
+ writel(0x0, IMX_MAX_BASE + 0xb00); /* for M3 */
+ writel(0x0, IMX_MAX_BASE + 0xc00); /* for M4 */
+ writel(0x0, IMX_MAX_BASE + 0xd00); /* for M5 */
+
+ writel(0x0000DCF6, CSCR_U(0)); /* CS0: NOR Flash */
+ writel(0x444A4541, CSCR_L(0));
+ writel(0x44443302, CSCR_A(0));
+
+ /*
+ * M3IF Control Register (M3IFCTL)
+ * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000
+ * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000
+ * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000
+ * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000
+ * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000
+ * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000
+ * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040
+ * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000
+ * ------------
+ * 0x00000040
+ */
+ writel(0x40, IMX_M3IF_BASE);
+
+ return 0;
+}
+
+core_initcall(cupid_core_setup);
+
+#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
+#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
+
+static int do_cpufreq(struct command *cmdtp, int argc, char *argv[])
+{
+ unsigned long freq;
+
+ if (argc != 2)
+ return COMMAND_ERROR_USAGE;
+
+ freq = simple_strtoul(argv[1], NULL, 0);
+
+ switch (freq) {
+ case 399:
+ writel(MPCTL_PARAM_399, IMX_CCM_BASE + CCM_MPCTL);
+ break;
+ case 532:
+ writel(MPCTL_PARAM_532, IMX_CCM_BASE + CCM_MPCTL);
+ break;
+ default:
+ return COMMAND_ERROR_USAGE;
+ }
+
+ printf("Switched CPU frequency to %dMHz\n", freq);
+
+ return 0;
+}
+
+static const __maybe_unused char cmd_cpufreq_help[] =
+"Usage: cpufreq 399|532\n"
+"\n"
+"Set CPU frequency to <freq> MHz\n";
+
+BAREBOX_CMD_START(cpufreq)
+ .cmd = do_cpufreq,
+ .usage = "adjust CPU frequency",
+ BAREBOX_CMD_HELP(cmd_cpufreq_help)
+BAREBOX_CMD_END
+
diff --git a/arch/arm/boards/guf-cupid/config.h b/arch/arm/boards/guf-cupid/config.h
new file mode 100644
index 0000000..0e3b175
--- /dev/null
+++ b/arch/arm/boards/guf-cupid/config.h
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2007 Juergen Beisert <jbe@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Definitions related to passing arguments to kernel.
+ */
+
+#define CONFIG_MX35_HCLK_FREQ 24000000
+
+#endif
+
+/* nothing to do here yet */
diff --git a/arch/arm/boards/guf-cupid/cupid.dox b/arch/arm/boards/guf-cupid/cupid.dox
new file mode 100644
index 0000000..2ff1b2c
--- /dev/null
+++ b/arch/arm/boards/guf-cupid/cupid.dox
@@ -0,0 +1,9 @@
+/** @page Garz+Fricke Cupid
+
+This CPU card is based on a Freescale i.MX35 CPU. The card is shipped with:
+
+- 256MiB Nand flash
+- 128MiB synchronous dynamic RAM
+
+
+*/
diff --git a/arch/arm/boards/guf-cupid/env/config b/arch/arm/boards/guf-cupid/env/config
new file mode 100644
index 0000000..4db05b6
--- /dev/null
+++ b/arch/arm/boards/guf-cupid/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=cupid
+eth0.serverip=
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'net', 'nor' or 'nand'
+kernel_loc=net
+# can be either 'net', 'nor', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-$machine.$rootfs_type
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-$machine
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+ kernelimage="$user"-"$kernelimage"
+ nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
+ rootfsimage="$user"-"$rootfsimage"
+else
+ nfsroot="$eth0.serverip:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+bootargs="console=ttymxc0,115200"
+
+bootargs="$bootargs video=mx3fb:CTP-CLAA070LC0ACW"
+
+nand_parts="256k(barebox)ro,512k(bareboxenv),2M(kernel),-(root)"
+nand_device=mxc_nand
+rootfs_mtdblock_nand=3
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
+
diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c
new file mode 100644
index 0000000..8d403ee
--- /dev/null
+++ b/arch/arm/boards/guf-cupid/lowlevel.c
@@ -0,0 +1,349 @@
+/*
+ *
+ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <init.h>
+#include <mach/imx-regs.h>
+#include <mach/imx-pll.h>
+#include <mach/esdctl.h>
+#include <asm/cache-l2x0.h>
+#include <asm/io.h>
+#include <mach/imx-nand.h>
+#include <asm/barebox-arm.h>
+#include <asm-generic/memory_layout.h>
+#include <asm/system.h>
+
+/* Assuming 24MHz input clock */
+#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
+#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
+#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
+
+#define SDRAM_MODE_BL_8 0x0003
+#define SDRAM_MODE_BSEQ 0x0000
+#define SDRAM_MODE_CL_3 0x0030
+#define MDDR_DS_HALF 0x20
+#define SDRAM_COMPARE_CONST1 0x55555555
+#define SDRAM_COMPARE_CONST2 0xaaaaaaaa
+
+#ifdef CONFIG_NAND_IMX_BOOT
+static void __bare_init __naked insdram(void)
+{
+ uint32_t r;
+
+ /* Speed up NAND controller by adjusting the NFC divider */
+ r = readl(IMX_CCM_BASE + CCM_PDR4);
+ r &= ~(0xf << 28);
+ r |= 0x1 << 28;
+ writel(r, IMX_CCM_BASE + CCM_PDR4);
+
+ /* setup a stack to be able to call imx_nand_load_image() */
+ r = STACK_BASE + STACK_SIZE - 12;
+ __asm__ __volatile__("mov sp, %0" : : "r"(r));
+
+ imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
+
+ board_init_lowlevel_return();
+}
+#endif
+
+static void __bare_init noinline setup_sdram(u32 memsize, u32 mode, u32 sdram_addr)
+{
+ volatile int loop;
+ void *r9 = (void *)IMX_SDRAM_CS0;
+ u32 r11 = 0xda; /* dummy constant */
+ u32 r1, r0;
+
+ /* disable second SDRAM region to save power */
+ r1 = readl(ESDCTL1);
+ r1 &= ~ESDCTL0_SDE;
+ writel(r1, ESDCTL1);
+
+ mode |= ESDMISC_RST | ESDMISC_MDDR_DL_RST;
+ writel(mode, ESDMISC);
+
+ mode &= ~(ESDMISC_RST | ESDMISC_MDDR_DL_RST);
+ writel(mode, ESDMISC);
+
+ /* wait for esdctl reset */
+ for (loop = 0; loop < 0x20000; loop++);
+
+ r1 = ESDCFGx_tXP_4 | ESDCFGx_tWTR_1 |
+ ESDCFGx_tRP_3 | ESDCFGx_tMRD_2 |
+ ESDCFGx_tWR_1_2 | ESDCFGx_tRAS_6 |
+ ESDCFGx_tRRD_2 | ESDCFGx_tCAS_3 |
+ ESDCFGx_tRCD_3 | ESDCFGx_tRC_20;
+
+ writel(r1, ESDCFG0);
+
+ /* enable SDRAM controller */
+ writel(memsize | ESDCTL0_SMODE_NORMAL, ESDCTL0);
+
+ /* Micron Datasheet Initialization Step 3: Wait 200us before first command */
+ for (loop = 0; loop < 1000; loop++);
+
+ /* Micron Datasheet Initialization Step 4: PRE CHARGE ALL */
+ writel(memsize | ESDCTL0_SMODE_PRECHARGE, ESDCTL0);
+ writeb(r11, sdram_addr);
+
+ /* Micron Datasheet Initialization Step 5: NOP for tRP (at least 22.5ns)
+ * The CPU is not fast enough to cause a problem here
+ */
+
+ /* Micron Datasheet Initialization Step 6: 2 AUTO REFRESH and tRFC NOP
+ * (at least 140ns)
+ */
+ writel(memsize | ESDCTL0_SMODE_AUTO_REFRESH, ESDCTL0);
+ writeb(r11, r9); /* AUTO REFRESH #1 */
+
+ for (loop = 0; loop < 3; loop++); /* ~140ns delay at 532MHz */
+
+ writeb(r11, r9); /* AUTO REFRESH #2 */
+
+ for (loop = 0; loop < 3; loop++); /* ~140ns delay at 532MHz */
+
+ /* Micron Datasheet Initialization Step 7: LOAD MODE REGISTER */
+ writel(memsize | ESDCTL0_SMODE_LOAD_MODE, ESDCTL0);
+ writeb(r11, r9 + (SDRAM_MODE_BL_8 | SDRAM_MODE_BSEQ | SDRAM_MODE_CL_3));
+
+ /* Micron Datasheet Initialization Step 8: tMRD = 2 tCK NOP
+ * (The memory controller will take care of this delay)
+ */
+
+ /* Micron Datasheet Initialization Step 9: LOAD MODE REGISTER EXTENDED */
+ writeb(r11, 0x84000000 | MDDR_DS_HALF); /*we assume 14 Rows / 10 Cols here */
+
+ /* Micron Datasheet Initialization Step 9: tMRD = 2 tCK NOP
+ * (The memory controller will take care of this delay)
+ */
+
+ /* Now configure SDRAM-Controller and check that it works */
+ writel(memsize | ESDCTL0_BL | ESDCTL0_REF4, ESDCTL0);
+
+ /* Freescale asks for first access to be a write to properly
+ * initialize DQS pin-state and keepers
+ */
+ writel(0xdeadbeef, r9);
+
+ /* test that the RAM is in fact working */
+ writel(SDRAM_COMPARE_CONST1, r9);
+ writel(SDRAM_COMPARE_CONST2, r9 + 0x4);
+
+ if (readl(r9) != SDRAM_COMPARE_CONST1)
+ while (1);
+
+ /* Verify that the correct row and coloumn is selected */
+
+ /* So far we asssumed that we have 14 rows, verify this */
+ writel(SDRAM_COMPARE_CONST1, r9);
+ writel(SDRAM_COMPARE_CONST2, r9 + (1 << 25));
+
+ /* if both value are identical, we don't have 14 rows. assume 13 instead */
+ if (readl(r9) == readl(r9 + (1 << 25))) {
+ r0 = readl(ESDCTL0);
+ r0 &= ~ESDCTL0_ROW_MASK;
+ r0 |= ESDCTL0_ROW13;
+ writel(r0, ESDCTL0);
+ }
+
+ /* So far we asssumed that we have 10 columns, verify this */
+ writel(SDRAM_COMPARE_CONST1, r9);
+ writel(SDRAM_COMPARE_CONST2, r9 + (1 << 11));
+
+ /* if both value are identical, we don't have 10 cols. assume 9 instead */
+ if (readl(r9) == readl(r9 + (1 << 11))) {
+ r0 = readl(ESDCTL0);
+ r0 &= ~ESDCTL0_COL_MASK;
+ r0 |= ESDCTL0_COL9;
+ writel(r0, ESDCTL0);
+ }
+}
+
+#define BRANCH_PREDICTION_ENABLE
+#define UNALIGNED_ACCESS_ENABLE
+#define LOW_INT_LATENCY_ENABLE
+
+void __bare_init __naked board_init_lowlevel(void)
+{
+ u32 r0, r1;
+ void *iomuxc_base = (void *)IMX_IOMUXC_BASE;
+ int i;
+#ifdef CONFIG_NAND_IMX_BOOT
+ unsigned int *trg, *src;
+#endif
+
+ r0 = 0x10000000 + 128 * 1024 - 16;
+ __asm__ __volatile__("mov sp, %0" : : "r"(r0));
+
+ /*
+ * ARM1136 init
+ * - invalidate I/D cache/TLB and drain write buffer;
+ * - invalidate L2 cache
+ * - unaligned access
+ * - branch predictions
+ */
+#ifdef TURN_OFF_IMPRECISE_ABORT
+ __asm__ __volatile__("mrs %0, cpsr":"=r"(r0));
+ r0 &= ~0x100;
+ __asm__ __volatile__("msr cpsr, %0" : : "r"(r0));
+#endif
+ /* ensure L1 caches and MMU are turned-off for now */
+ r1 = get_cr();
+ r1 &= ~(CR_I | CR_M | CR_C);
+
+ /* setup core features */
+ __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1":"=r"(r0));
+#ifdef BRANCH_PREDICTION_ENABLE
+ r0 |= 7;
+ r1 |= CR_Z;
+#else
+ r0 &= ~7;
+ r1 &= ~CR_Z;
+#endif
+ __asm__ __volatile__("mcr p15, 0, r0, c1, c0, 1" : : "r"(r0));
+
+#ifdef UNALIGNED_ACCESS_ENABLE
+ r1 |= CR_U;
+#else
+ r1 &= ~CR_U;
+#endif
+
+#ifdef LOW_INT_LATENCY_ENABLE
+ r1 |= CR_FI;
+#else
+ r1 &= ~CR_FI;
+#endif
+ set_cr(r1);
+
+ r0 = 0;
+ __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 6" : : "r"(r0));
+
+ /* invalidate I cache and D cache */
+ __asm__ __volatile__("mcr p15, 0, r0, c7, c7, 0" : : "r"(r0));
+ /* invalidate TLBs */
+ __asm__ __volatile__("mcr p15, 0, r0, c8, c7, 0" : : "r"(r0));
+ /* Drain the write buffer */
+ __asm__ __volatile__("mcr p15, 0, r0, c7, c10, 4" : : "r"(r0));
+
+ /* Also setup the Peripheral Port Remap register inside the core */
+ r0 = 0x40000015; /* start from AIPS 2GB region */
+ __asm__ __volatile__("mcr p15, 0, r0, c15, c2, 4" : : "r"(r0));
+
+#define WDOG_WMCR 0x8
+ /* silence reset WDOG */
+ writew(0, IMX_WDOG_BASE + WDOG_WMCR);
+
+ /* Skip SDRAM initialization if we run from RAM */
+ r0 = get_pc();
+ if (r0 > 0x80000000 && r0 < 0x90000000)
+ board_init_lowlevel_return();
+
+ /* Configure drive strength */
+
+ /* Configure DDR-pins to correct mode */
+ r0 = 0x00001800;
+ writel(r0, iomuxc_base + 0x794);
+ writel(r0, iomuxc_base + 0x798);
+ writel(r0, iomuxc_base + 0x79c);
+ writel(r0, iomuxc_base + 0x7a0);
+ writel(r0, iomuxc_base + 0x7a4);
+
+ /* Set drive strength for DDR-pins */
+ for (i = 0x368; i <= 0x4c8; i += 4) {
+ r0 = readl(iomuxc_base + i);
+ r0 &= ~0x6;
+ r0 |= 0x2;
+ writel(r0, iomuxc_base + i);
+ if (i == 0x468)
+ i = 0x4a4;
+ }
+
+ r0 = readl(iomuxc_base + 0x480);
+ r0 &= ~0x6;
+ r0 |= 0x2;
+ writel(r0, iomuxc_base + 0x480);
+
+ r0 = readl(iomuxc_base + 0x4b8);
+ r0 &= ~0x6;
+ r0 |= 0x2;
+ writel(r0, iomuxc_base + 0x4b8);
+
+ /* Configure static chip-selects */
+ r0 = readl(iomuxc_base + 0x000);
+ r0 &= ~1; /* configure CS2/CSD0 for SDRAM */
+ writel(r0, iomuxc_base + 0x000);
+
+ /* start-up code doesn't need any static chip-select.
+ * Leave their initialization to high-level code that
+ * can initialize them depending on the baseboard.
+ */
+
+ /* Configure clocks */
+
+ /* setup cpu/bus clocks */
+ writel(0x003f4208, IMX_CCM_BASE + CCM_CCMR);
+
+ /* configure MPLL */
+ writel(MPCTL_PARAM_532, IMX_CCM_BASE + CCM_MPCTL);
+
+ /* configure PPLL */
+ writel(PPCTL_PARAM_300, IMX_CCM_BASE + CCM_PPCTL);
+
+ /* configure core dividers */
+ r0 = PDR0_CCM_PER_AHB(1) | PDR0_HSP_PODF(2);
+
+ writel(r0, IMX_CCM_BASE + CCM_PDR0);
+
+ /* configure clock-gates */
+ r0 = readl(IMX_CCM_BASE + CCM_CGR0);
+ r0 |= 0x00300000;
+ writel(r0, IMX_CCM_BASE + CCM_CGR0);
+
+ r0 = readl(IMX_CCM_BASE + CCM_CGR1);
+ r0 |= 0x00000c03;
+ writel(r0, IMX_CCM_BASE + CCM_CGR1);
+
+ /* Configure SDRAM */
+ /* Try 32-Bit 256 MB DDR memory */
+ r0 = ESDCTL0_SDE | ESDCTL0_ROW14 | ESDCTL0_COL10 | ESDCTL0_DSIZ_31_0; /* 1024 MBit DDR-SDRAM */
+ setup_sdram(r0, ESDMISC_MDDR_EN, 0x80000f00);
+
+#ifdef CONFIG_NAND_IMX_BOOT
+ /* skip NAND boot if not running from NFC space */
+ r0 = get_pc();
+ if (r0 < IMX_NFC_BASE || r0 > IMX_NFC_BASE + 0x800)
+ board_init_lowlevel_return();
+
+ src = (unsigned int *)IMX_NFC_BASE;
+ trg = (unsigned int *)TEXT_BASE;
+
+ /* Move ourselves out of NFC SRAM */
+ for (i = 0; i < 0x800 / sizeof(int); i++)
+ *trg++ = *src++;
+
+ /* Jump to SDRAM */
+ r0 = (unsigned int)&insdram;
+ __asm__ __volatile__("mov pc, %0" : : "r"(r0));
+#else
+ board_init_lowlevel_return();
+#endif
+}
+
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d451875..f3506af 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -18,6 +18,7 @@ config ARCH_TEXT_BASE
default 0x08f80000 if MACH_SCB9328
default 0xa7e00000 if MACH_NESO
default 0x97f00000 if MACH_MX51_PDK
+ default 0x87f00000 if MACH_GUF_CUPID
config BOARDINFO
default "Eukrea CPUIMX25" if MACH_EUKREA_CPUIMX25
@@ -34,6 +35,7 @@ config BOARDINFO
default "Synertronixx scb9328" if MACH_SCB9328
default "Garz+Fricke Neso" if MACH_NESO
default "Freescale i.MX51 PDK" if MACH_FREESCALE_MX51_PDK
+ default "Garz+Fricke Cupid" if MACH_GUF_CUPID
config ARCH_HAS_FEC_IMX
bool
@@ -299,6 +301,15 @@ config MACH_PCM043
Say Y here if you are using Phytec's phyCORE-i.MX35 (pcm043) equipped
with a Freescale i.MX35 Processor
+config MACH_GUF_CUPID
+ bool "Garz+Fricke Cupid"
+ select HAVE_MMU
+ select MACH_HAS_LOWLEVEL_INIT
+ select ARCH_HAS_L2X0
+ help
+ Say Y here if you are using the Garz+Fricke Neso board equipped
+ with a Freescale i.MX35 Processor
+
endchoice
endif
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 12/13] defaultenv: fix mtdparts
2010-10-22 13:15 more patches for next Sascha Hauer
` (10 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 11/13] ARM: Add Garz+Fricke Cupid board support Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-22 13:15 ` [PATCH 13/13] ARM: Add defconfig for Garz+Fricke cupid board Sascha Hauer
2010-10-26 9:20 ` more patches for next Juergen Beisert
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
We had some \" in mtdparts to allow for spaces in the mtdparts
kernel option. Barebox does not handle these correctly, so remove
them and disallow spaces in mtdparts
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
defaultenv/bin/boot | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
index 3fdc5c1..42c7ec2 100644
--- a/defaultenv/bin/boot
+++ b/defaultenv/bin/boot
@@ -51,7 +51,7 @@ if [ -n $nand_parts ]; then
fi
if [ -n $mtdparts ]; then
- bootargs="${bootargs} mtdparts=\"${mtdparts}\""
+ bootargs="${bootargs} mtdparts=${mtdparts}"
fi
if [ ! -e /dev/ram0.kernelraw ]; then
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 13/13] ARM: Add defconfig for Garz+Fricke cupid board
2010-10-22 13:15 more patches for next Sascha Hauer
` (11 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 12/13] defaultenv: fix mtdparts Sascha Hauer
@ 2010-10-22 13:15 ` Sascha Hauer
2010-10-26 9:20 ` more patches for next Juergen Beisert
13 siblings, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-22 13:15 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/configs/cupid_defconfig | 56 ++++++++++++++++++++++++++++++++++++++
1 files changed, 56 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/configs/cupid_defconfig
diff --git a/arch/arm/configs/cupid_defconfig b/arch/arm/configs/cupid_defconfig
new file mode 100644
index 0000000..e24afe1
--- /dev/null
+++ b/arch/arm/configs/cupid_defconfig
@@ -0,0 +1,56 @@
+CONFIG_ARCH_IMX=y
+CONFIG_CACHE_L2X0=y
+CONFIG_ARCH_IMX35=y
+CONFIG_MACH_GUF_CUPID=y
+CONFIG_IMX_CLKO=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_MMU=y
+CONFIG_TEXT_BASE=0x87F00000
+CONFIG_MALLOC_SIZE=0x1000000
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/guf-cupid/env"
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNLZO=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_NFS=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_NET_TFTP_PUSH=y
+CONFIG_NET_NETCONSOLE=y
+CONFIG_NET_RESOLV=y
+CONFIG_DRIVER_NET_FEC_IMX=y
+# CONFIG_SPI is not set
+CONFIG_MTD=y
+CONFIG_NAND=y
+CONFIG_NAND_IMX=y
+CONFIG_NAND_IMX_BOOT=y
+CONFIG_NAND_IMX_BOOT_2K=y
+CONFIG_UBI=y
+CONFIG_VIDEO=y
+CONFIG_DRIVER_VIDEO_IMX_IPU=y
+CONFIG_MCI=y
+CONFIG_MCI_IMX_ESDHC=y
--
1.7.2.3
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 03/13] mci-core: add multiple block support
2010-10-22 13:15 ` [PATCH 03/13] mci-core: add multiple block support Sascha Hauer
@ 2010-10-22 13:40 ` Juergen Beisert
2010-10-22 14:03 ` Juergen Beisert
1 sibling, 0 replies; 20+ messages in thread
From: Juergen Beisert @ 2010-10-22 13:40 UTC (permalink / raw)
To: barebox
Sascha Hauer wrote:
> So far only for reading blocks. This is based on the corresponding
> U-Boot code.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Juergen Beisert <jbe@pengutronix.de>
At least my S32440 target still works with this patch.
Acked-by: Juergen Beisert <jbe@pengurtronix.de>
> ---
> drivers/mci/mci-core.c | 35 +++++++++++++++++++++++++++--------
> 1 files changed, 27 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index c92d5a9..34c4f8c 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -139,23 +139,41 @@ static int mci_block_write(struct device_d *mci_dev,
> const void *src, unsigned b * @param dst Where to store the data read from
> the card
> * @param blocknum Block number to read
> */
> -static int mci_read_block(struct device_d *mci_dev, void *dst, unsigned
> blocknum) +static int mci_read_block(struct device_d *mci_dev, void *dst,
> unsigned blocknum, int blocks) {
> struct mci *mci = GET_MCI_DATA(mci_dev);
> struct mci_cmd cmd;
> struct mci_data data;
> + int ret;
> + unsigned mmccmd;
> +
> + if (blocks > 1)
> + mmccmd = MMC_CMD_READ_MULTIPLE_BLOCK;
> + else
> + mmccmd = MMC_CMD_READ_SINGLE_BLOCK;
>
> mci_setup_cmd(&cmd,
> - MMC_CMD_READ_SINGLE_BLOCK,
> + mmccmd,
> mci->high_capacity != 0 ? blocknum : blocknum * mci->read_bl_len,
> MMC_RSP_R1);
>
> data.dest = dst;
> - data.blocks = 1;
> + data.blocks = blocks;
> data.blocksize = mci->read_bl_len;
> data.flags = MMC_DATA_READ;
>
> - return mci_send_cmd(mci_dev, &cmd, &data);
> + ret = mci_send_cmd(mci_dev, &cmd, &data);
> + if (ret)
> + return ret;
> +
> + if (blocks > 1) {
> + mci_setup_cmd(&cmd,
> + MMC_CMD_STOP_TRANSMISSION,
> + 0,
> + MMC_RSP_R1b);
> + ret = mci_send_cmd(mci_dev, &cmd, NULL);
> + }
> + return ret;
> }
>
> /**
> @@ -979,19 +997,20 @@ static int mci_sd_read(struct device_d *disk_dev,
> uint64_t sector_start, }
>
> while (sector_count) {
> + int now = min(sector_count, 32);
> if (sector_start > MAX_BUFFER_NUMBER) {
> pr_err("Cannot handle block number %lu. Too large!\n",
> (unsigned)sector_start);
> return -EINVAL;
> }
> - rc = mci_read_block(mci_dev, buffer, (unsigned)sector_start);
> + rc = mci_read_block(mci_dev, buffer, (unsigned)sector_start, now);
> if (rc != 0) {
> pr_err("Reading block %lu failed with %d\n", (unsigned)sector_start,
> rc); return rc;
> }
> - sector_count--;
> - buffer += mci->read_bl_len;
> - sector_start++;
> + sector_count -= now;
> + buffer += mci->read_bl_len * now;
> + sector_start += now;
> }
>
> return 0;
--
Pengutronix e.K. | Juergen Beisert |
Linux Solutions for Science and Industry | Phone: +49-8766-939 228 |
Vertretung Sued/Muenchen, Germany | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 10/13] mci: align data for commands
2010-10-22 13:15 ` [PATCH 10/13] mci: align data for commands Sascha Hauer
@ 2010-10-22 13:41 ` Juergen Beisert
0 siblings, 0 replies; 20+ messages in thread
From: Juergen Beisert @ 2010-10-22 13:41 UTC (permalink / raw)
To: barebox
Sascha Hauer wrote:
> Some mci controllers cannot transfer data with their DMA engines
> if the data is not sufficiently aligned. Normally this is a driver
> problem, but hey, we have no problem aligning the data and keep
> the burden from the drivers.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Juergen Beisert <jbe@pengutronix.de>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
> ---
> drivers/mci/mci-core.c | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index 34c4f8c..6f31cca 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -347,7 +347,7 @@ static int mci_switch(struct device_d *mci_dev,
> unsigned set, unsigned index, static int mmc_change_freq(struct device_d
> *mci_dev)
> {
> struct mci *mci = GET_MCI_DATA(mci_dev);
> - char ext_csd[512];
> + char *ext_csd = sector_buf;
> char cardtype;
> int err;
>
> @@ -439,8 +439,8 @@ static int sd_change_freq(struct device_d *mci_dev)
> struct mci *mci = GET_MCI_DATA(mci_dev);
> struct mci_cmd cmd;
> struct mci_data data;
> - uint32_t switch_status[16];
> - uint scr[2];
> + uint32_t *switch_status = sector_buf;
> + uint32_t *scr = sector_buf;
> int timeout;
> int err;
>
> @@ -461,7 +461,7 @@ static int sd_change_freq(struct device_d *mci_dev)
>
> retry_scr:
> pr_debug("Trying to read the SCR (try %d of %d)\n", 4 - timeout, 3);
> - data.dest = (char *)&scr;
> + data.dest = (char *)scr;
> data.blocksize = 8;
> data.blocks = 1;
> data.flags = MMC_DATA_READ;
> @@ -502,7 +502,7 @@ retry_scr:
> timeout = 4;
> while (timeout--) {
> err = sd_switch(mci_dev, SD_SWITCH_CHECK, 0, 1,
> - (uint8_t*)&switch_status);
> + (uint8_t*)switch_status);
> if (err) {
> pr_debug("Checking SD transfer switch frequency feature failed: %d\n",
> err); return err;
> @@ -520,7 +520,7 @@ retry_scr:
> if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
> return 0;
>
> - err = sd_switch(mci_dev, SD_SWITCH_SWITCH, 0, 1,
> (uint8_t*)&switch_status); + err = sd_switch(mci_dev, SD_SWITCH_SWITCH, 0,
> 1, (uint8_t*)switch_status); if (err) {
> pr_debug("Switching SD transfer frequency failed: %d\n", err);
> return err;
--
Pengutronix e.K. | Juergen Beisert |
Linux Solutions for Science and Industry | Phone: +49-8766-939 228 |
Vertretung Sued/Muenchen, Germany | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 03/13] mci-core: add multiple block support
2010-10-22 13:15 ` [PATCH 03/13] mci-core: add multiple block support Sascha Hauer
2010-10-22 13:40 ` Juergen Beisert
@ 2010-10-22 14:03 ` Juergen Beisert
1 sibling, 0 replies; 20+ messages in thread
From: Juergen Beisert @ 2010-10-22 14:03 UTC (permalink / raw)
To: barebox
Sascha Hauer wrote:
> So far only for reading blocks. This is based on the corresponding
> U-Boot code.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Juergen Beisert <jbe@pengutronix.de>
> ---
> drivers/mci/mci-core.c | 35 +++++++++++++++++++++++++++--------
> 1 files changed, 27 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index c92d5a9..34c4f8c 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -139,23 +139,41 @@ static int mci_block_write(struct device_d *mci_dev, const void *src, unsigned b
> * @param dst Where to store the data read from the card
> * @param blocknum Block number to read
> */
> -static int mci_read_block(struct device_d *mci_dev, void *dst, unsigned blocknum)
> +static int mci_read_block(struct device_d *mci_dev, void *dst, unsigned blocknum, int blocks) {
I know real programmers [TM] hate documentation. But if you add a parameter,
please spend the short time to also add a
"@param blocks Block count to read at once"
(or similar) to the header of this function.
> [...]
jbe
--
Pengutronix e.K. | Juergen Beisert |
Linux Solutions for Science and Industry | Phone: +49-8766-939 228 |
Vertretung Sued/Muenchen, Germany | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: more patches for next
2010-10-22 13:15 more patches for next Sascha Hauer
` (12 preceding siblings ...)
2010-10-22 13:15 ` [PATCH 13/13] ARM: Add defconfig for Garz+Fricke cupid board Sascha Hauer
@ 2010-10-26 9:20 ` Juergen Beisert
2010-10-26 9:48 ` Marc Kleine-Budde
2010-10-26 18:58 ` Sascha Hauer
13 siblings, 2 replies; 20+ messages in thread
From: Juergen Beisert @ 2010-10-26 9:20 UTC (permalink / raw)
To: barebox
Some of these changes lead into:
[...]
CC drivers/serial/serial_imx.o
In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/imx27-regs.h:222:1: warning: "ESDMISC_RST" redefined
In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/esdctl.h:37:1: warning: this is the location of the previous definition
In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/imx27-regs.h:224:1: warning: "ESDMISC_MDDR_DL_RST" redefined
In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/esdctl.h:40:1: warning: this is the location of the previous definition
In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/imx27-regs.h:225:1: warning: "ESDMISC_MDDR_MDIS" redefined
In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/esdctl.h:41:1: warning: this is the location of the previous definition
In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/imx27-regs.h:226:1: warning: "ESDMISC_LHD" redefined
In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
from arch/arm/mach-imx/include/mach/imx-regs.h:47,
from drivers/serial/serial_imx.c:21:
arch/arm/mach-imx/include/mach/esdctl.h:42:1: warning: this is the location of the previous definition
[...]
Tested with the "pcm038_defconfig".
BTW: When building the "pcm043_defconfig" I get the following warnings
multiple times:
[...]
CC commands/mem.o
{standard input}: Assembler messages:
{standard input}:908: rdhi, rdlo and rm must all be different
{standard input}:934: rdhi, rdlo and rm must all be different
{standard input}:976: rdhi, rdlo and rm must all be different
[...]
--
Pengutronix e.K. | Juergen Beisert |
Linux Solutions for Science and Industry | Phone: +49-8766-939 228 |
Vertretung Sued/Muenchen, Germany | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de/ |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: more patches for next
2010-10-26 9:20 ` more patches for next Juergen Beisert
@ 2010-10-26 9:48 ` Marc Kleine-Budde
2010-10-26 18:58 ` Sascha Hauer
1 sibling, 0 replies; 20+ messages in thread
From: Marc Kleine-Budde @ 2010-10-26 9:48 UTC (permalink / raw)
To: Juergen Beisert; +Cc: barebox
[-- Attachment #1.1: Type: text/plain, Size: 892 bytes --]
On 10/26/2010 11:20 AM, Juergen Beisert wrote:
[...]
> BTW: When building the "pcm043_defconfig" I get the following warnings
> multiple times:
>
> [...]
> CC commands/mem.o
> {standard input}: Assembler messages:
> {standard input}:908: rdhi, rdlo and rm must all be different
> {standard input}:934: rdhi, rdlo and rm must all be different
> {standard input}:976: rdhi, rdlo and rm must all be different
> [...]
use a newer toolchain with newer binutils, e.g.
/opt/OSELAS.Toolchain-1.99.3/arm-1136jfs-linux-gnueabi/gcc-4.3.2-glibc-2.8-binutils-2.19-kernel-2.6.27-sanitized/bin/
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #1.2: OpenPGP digital signature --]
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: more patches for next
2010-10-26 9:20 ` more patches for next Juergen Beisert
2010-10-26 9:48 ` Marc Kleine-Budde
@ 2010-10-26 18:58 ` Sascha Hauer
1 sibling, 0 replies; 20+ messages in thread
From: Sascha Hauer @ 2010-10-26 18:58 UTC (permalink / raw)
To: Juergen Beisert; +Cc: barebox
On Tue, Oct 26, 2010 at 11:20:30AM +0200, Juergen Beisert wrote:
> Some of these changes lead into:
>
> [...]
> CC drivers/serial/serial_imx.o
> In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/imx27-regs.h:222:1: warning: "ESDMISC_RST" redefined
> In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
> from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/esdctl.h:37:1: warning: this is the location of the previous definition
> In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/imx27-regs.h:224:1: warning: "ESDMISC_MDDR_DL_RST" redefined
> In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
> from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/esdctl.h:40:1: warning: this is the location of the previous definition
> In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/imx27-regs.h:225:1: warning: "ESDMISC_MDDR_MDIS" redefined
> In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
> from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/esdctl.h:41:1: warning: this is the location of the previous definition
> In file included from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/imx27-regs.h:226:1: warning: "ESDMISC_LHD" redefined
> In file included from arch/arm/mach-imx/include/mach/imx27-regs.h:83,
> from arch/arm/mach-imx/include/mach/imx-regs.h:47,
> from drivers/serial/serial_imx.c:21:
> arch/arm/mach-imx/include/mach/esdctl.h:42:1: warning: this is the location of the previous definition
> [...]
>
> Tested with the "pcm038_defconfig".
The good thing is that all defines even if written differently are the
same. The following fixes this:
From cc406226ebddd0ce791faba083272a006b73730f Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue, 26 Oct 2010 20:56:17 +0200
Subject: [PATCH] ARM i.MX27: remove duplicated defines
The esdctl regs are now in a seperate header file, so remove the
duplicates from imx27-regs.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/imx27-regs.h | 8 --------
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h
index 0fa954d..e87d5bf 100644
--- a/arch/arm/mach-imx/include/mach/imx27-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx27-regs.h
@@ -219,14 +219,6 @@
#define ESDCFG_TWTR (1 << 20)
#define ESDCFG_TXP(x) (((x) & 0x3) << 21)
-#define ESDMISC_RST (1 << 1)
-#define ESDMISC_MDDREN (1 << 2)
-#define ESDMISC_MDDR_DL_RST (1 << 3)
-#define ESDMISC_MDDR_MDIS (1 << 4)
-#define ESDMISC_LHD (1 << 5)
-#define ESDMISC_MA10_SHARE (1 << 6)
-#define ESDMISC_SDRAM_RDY (1 << 6)
-
/*
* Definitions for the clocksource driver
*/
--
1.7.2.3
--
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^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2010-10-26 18:58 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-10-22 13:15 more patches for next Sascha Hauer
2010-10-22 13:15 ` [PATCH 01/13] ARM pca100: Use a flash bbt Sascha Hauer
2010-10-22 13:15 ` [PATCH 02/13] i.MX nand: optimize nand boot code for size Sascha Hauer
2010-10-22 13:15 ` [PATCH 03/13] mci-core: add multiple block support Sascha Hauer
2010-10-22 13:40 ` Juergen Beisert
2010-10-22 14:03 ` Juergen Beisert
2010-10-22 13:15 ` [PATCH 04/13] i.MX51: Fix mmcclk rate Sascha Hauer
2010-10-22 13:15 ` [PATCH 05/13] i.MX esdctl: Add register bits from redboot Sascha Hauer
2010-10-22 13:15 ` [PATCH 06/13] i.MX35 regs: Add watchdog base Sascha Hauer
2010-10-22 13:15 ` [PATCH 07/13] fb: i.MX IPU: remove unnecessary printf Sascha Hauer
2010-10-22 13:15 ` [PATCH 08/13] fb: i.MX IPU: move fb_info initialization to a single function Sascha Hauer
2010-10-22 13:15 ` [PATCH 09/13] fb: i.MX IPU: fold mx3fb_set_par into its only user Sascha Hauer
2010-10-22 13:15 ` [PATCH 10/13] mci: align data for commands Sascha Hauer
2010-10-22 13:41 ` Juergen Beisert
2010-10-22 13:15 ` [PATCH 11/13] ARM: Add Garz+Fricke Cupid board support Sascha Hauer
2010-10-22 13:15 ` [PATCH 12/13] defaultenv: fix mtdparts Sascha Hauer
2010-10-22 13:15 ` [PATCH 13/13] ARM: Add defconfig for Garz+Fricke cupid board Sascha Hauer
2010-10-26 9:20 ` more patches for next Juergen Beisert
2010-10-26 9:48 ` Marc Kleine-Budde
2010-10-26 18:58 ` Sascha Hauer
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