From: Sanjeev Premi <premi@ti.com>
To: barebox@lists.infradead.org
Subject: [PATCH 2/8] omap36x: Detect silicon revisions
Date: Mon, 3 Jan 2011 19:54:49 +0530 [thread overview]
Message-ID: <1294064695-10865-3-git-send-email-premi@ti.com> (raw)
In-Reply-To: <1294064695-10865-1-git-send-email-premi@ti.com>
This patch adds support to detect the different
OMAP36XX silicon revisions.
Signed-off-by: Sanjeev Premi <premi@ti.com>
---
arch/arm/mach-omap/include/mach/sys_info.h | 4 ++
arch/arm/mach-omap/omap3_generic.c | 60 +++++++++++++++++++--------
2 files changed, 46 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap/include/mach/sys_info.h b/arch/arm/mach-omap/include/mach/sys_info.h
index 37a4a71..f557068 100644
--- a/arch/arm/mach-omap/include/mach/sys_info.h
+++ b/arch/arm/mach-omap/include/mach/sys_info.h
@@ -62,6 +62,10 @@
#define OMAP34XX_ES3 cpu_revision(CPU_3430, 3)
#define OMAP34XX_ES3_1 cpu_revision(CPU_3430, 4)
+#define OMAP36XX_ES1 cpu_revision(CPU_3630, 0)
+#define OMAP36XX_ES1_1 cpu_revision(CPU_3630, 1)
+#define OMAP36XX_ES1_2 cpu_revision(CPU_3630, 2)
+
#define GPMC_MUXED 1
#define GPMC_NONMUXED 0
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index e9083bc..843143b 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -92,6 +92,7 @@ u32 get_cpu_type(void)
/**
* @brief Extract the OMAP ES revision
*
+ * The significance of the CPU revision depends upon the cpu type.
* Latest known revision is considered default.
*
* @return silicon version
@@ -105,31 +106,54 @@ u32 get_cpu_rev(void)
version = get_version(idcode_val);
- /*
- * On OMAP3430 ES1.0 the IDCODE register is not exposed on L4.
- * Use CPU ID to check for the same.
- */
- __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(retval));
- if ((retval & 0xf) == 0x0) {
- retval = OMAP34XX_ES1;
- } else {
+ switch (get_cpu_type()) {
+ case CPU_3630:
switch (version) {
- case 0: /* This field was not set in early samples */
+ case 0:
+ retval = OMAP36XX_ES1;
+ break;
case 1:
- retval = OMAP34XX_ES2;
+ retval = OMAP36XX_ES1_1;
break;
case 2:
- retval = OMAP34XX_ES2_1;
- break;
- case 3:
- retval = OMAP34XX_ES3;
- break;
- case 4:
/*
- * Same as default case
+ * Fall through the default case.
*/
default:
- retval = OMAP34XX_ES3_1;
+ retval = OMAP36XX_ES1_2;
+ }
+ break;
+ case CPU_3430:
+ /*
+ * Same as default case
+ */
+ default:
+ /*
+ * On OMAP3430 ES1.0 the IDCODE register is not exposed on L4.
+ * Use CPU ID to check for the same.
+ */
+ __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(retval));
+ if ((retval & 0xf) == 0x0) {
+ retval = OMAP34XX_ES1;
+ } else {
+ switch (version) {
+ case 0: /* This field was not set in early samples */
+ case 1:
+ retval = OMAP34XX_ES2;
+ break;
+ case 2:
+ retval = OMAP34XX_ES2_1;
+ break;
+ case 3:
+ retval = OMAP34XX_ES3;
+ break;
+ case 4:
+ /*
+ * Same as default case
+ */
+ default:
+ retval = OMAP34XX_ES3_1;
+ }
}
}
--
1.7.2.2
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next prev parent reply other threads:[~2011-01-03 14:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-03 14:24 [PATCH 0/8] omap36x: Add basic support Sanjeev Premi
2011-01-03 14:24 ` [PATCH 1/8] omap36x: Add support for dynamic detection Sanjeev Premi
2011-01-03 14:24 ` Sanjeev Premi [this message]
2011-01-03 14:24 ` [PATCH 3/8] omap36x: Define structure for PER DPLL Sanjeev Premi
2011-01-03 14:24 ` [PATCH 4/8] omap36x: Add DPLL tables and functions to access them Sanjeev Premi
2011-01-03 14:24 ` [PATCH 5/8] omap36x: Define per domain functions for DPLL configuration Sanjeev Premi
2011-01-03 14:24 ` [PATCH 6/8] omap36x: Perform basic clock initialization Sanjeev Premi
2011-01-03 14:24 ` [PATCH 7/8] omap3: Avoid sudden change to SYS_CLK divider Sanjeev Premi
2011-01-03 14:24 ` [PATCH 8/8] omap3: Define GFX_DIV values for OMAP34xx and OMAP36xx Sanjeev Premi
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