From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RENEb-0005Q2-OE for barebox@lists.infradead.org; Thu, 13 Oct 2011 15:30:18 +0000 From: Sascha Hauer Date: Thu, 13 Oct 2011 17:30:04 +0200 Message-Id: <1318519808-14316-3-git-send-email-s.hauer@pengutronix.de> In-Reply-To: <1318519808-14316-1-git-send-email-s.hauer@pengutronix.de> References: <1318519808-14316-1-git-send-email-s.hauer@pengutronix.de> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: barebox-bounces@lists.infradead.org Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH 2/6] ARM i.MX53 Loco: Use generic lowlevel init code To: barebox@lists.infradead.org Signed-off-by: Sascha Hauer --- arch/arm/boards/freescale-mx53-loco/Makefile | 1 - arch/arm/boards/freescale-mx53-loco/board.c | 3 + .../arm/boards/freescale-mx53-loco/lowlevel_init.S | 172 -------------------- arch/arm/mach-imx/Kconfig | 1 - 4 files changed, 3 insertions(+), 174 deletions(-) delete mode 100644 arch/arm/boards/freescale-mx53-loco/lowlevel_init.S diff --git a/arch/arm/boards/freescale-mx53-loco/Makefile b/arch/arm/boards/freescale-mx53-loco/Makefile index 8e0c87c..b56ce7f 100644 --- a/arch/arm/boards/freescale-mx53-loco/Makefile +++ b/arch/arm/boards/freescale-mx53-loco/Makefile @@ -1,3 +1,2 @@ -obj-y += lowlevel_init.o obj-y += board.o obj-y += flash_header.o diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c index 24df9ae..c00b3bb 100644 --- a/arch/arm/boards/freescale-mx53-loco/board.c +++ b/arch/arm/boards/freescale-mx53-loco/board.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include @@ -122,6 +123,8 @@ static int loco_console_init(void) { mxc_iomux_v3_setup_multiple_pads(loco_pads, ARRAY_SIZE(loco_pads)); + mx53_init_lowlevel(); + imx53_add_uart0(); return 0; } diff --git a/arch/arm/boards/freescale-mx53-loco/lowlevel_init.S b/arch/arm/boards/freescale-mx53-loco/lowlevel_init.S deleted file mode 100644 index 44102c9..0000000 --- a/arch/arm/boards/freescale-mx53-loco/lowlevel_init.S +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Copyright (C) 2007 Guennadi Liakhovetski - * Copyright (C) 2009 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include - -/* - * L2CC Cache setup/invalidation/disable - */ -.macro init_l2cc - /* explicitly disable L2 cache */ - mrc 15, 0, r0, c1, c0, 1 - bic r0, r0, #0x2 - mcr 15, 0, r0, c1, c0, 1 - - /* reconfigure L2 cache aux control reg */ - mov r0, #0xC0 /* tag RAM */ - add r0, r0, #0x4 /* data RAM */ - orr r0, r0, #(1 << 24) /* disable write allocate delay */ - orr r0, r0, #(1 << 23) /* disable write allocate combine */ - orr r0, r0, #(1 << 22) /* disable write allocate */ - - cmp r3, #0x10 /* r3 contains the silicon rev */ - - /* disable write combine for TO 2 and lower revs */ - orrls r0, r0, #(1 << 25) - - mcr 15, 1, r0, c9, c0, 2 -.endm /* init_l2cc */ - -/* AIPS setup - Only setup MPROTx registers. - * The PACR default values are good.*/ -.macro init_aips - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - ldr r0, =MX53_AIPS1_BASE_ADDR - ldr r1, =0x77777777 - str r1, [r0, #0x0] - str r1, [r0, #0x4] - - ldr r0, =MX53_AIPS2_BASE_ADDR - str r1, [r0, #0x0] - str r1, [r0, #0x4] - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ -.endm /* init_aips */ - -.macro setup_pll pll, freq - ldr r0, =\pll - ldr r1, =0x00001232 - str r1, [r0, #MX5_PLL_DP_CTL] /* Set DPLL ON (set UPEN bit): BRMO=1 */ - mov r1, #0x2 - str r1, [r0, #MX5_PLL_DP_CONFIG] /* Enable auto-restart AREN bit */ - - ldr r1, W_DP_OP_\freq - str r1, [r0, #MX5_PLL_DP_OP] - str r1, [r0, #MX5_PLL_DP_HFS_OP] - - ldr r1, W_DP_MFD_\freq - str r1, [r0, #MX5_PLL_DP_MFD] - str r1, [r0, #MX5_PLL_DP_HFS_MFD] - - ldr r1, W_DP_MFN_\freq - str r1, [r0, #MX5_PLL_DP_MFN] - str r1, [r0, #MX5_PLL_DP_HFS_MFN] - - ldr r1, =0x00001232 - str r1, [r0, #MX5_PLL_DP_CTL] -1: ldr r1, [r0, #MX5_PLL_DP_CTL] - ands r1, r1, #0x1 - beq 1b -.endm - -.macro init_clock - ldr r0, =MX53_CCM_BASE_ADDR - - - /* Switch ARM to step clock */ - mov r1, #0x4 - str r1, [r0, #MX5_CCM_CCSR] - - setup_pll MX53_PLL1_BASE_ADDR, 1000 - setup_pll MX53_PLL3_BASE_ADDR, 216 - - /* Set the platform clock dividers */ - ldr r0, =MX53_ARM_BASE_ADDR - ldr r1, =0x00000725 - str r1, [r0, #0x14] - - ldr r0, =MX53_CCM_BASE_ADDR - mov r1, #0 - str r1, [r0, #MX5_CCM_CACRR] - - /* Switch ARM back to PLL 1 */ - mov r1, #0 - str r1, [r0, #MX5_CCM_CCSR] - - - /* Restore the default values in the Gate registers */ - ldr r1, =0xFFFFFFFF - str r1, [r0, #MX5_CCM_CCGR0] - str r1, [r0, #MX5_CCM_CCGR1] - str r1, [r0, #MX5_CCM_CCGR2] - str r1, [r0, #MX5_CCM_CCGR3] - str r1, [r0, #MX5_CCM_CCGR4] - str r1, [r0, #MX5_CCM_CCGR5] - str r1, [r0, #MX5_CCM_CCGR6] -#if 0 - str r1, [r0, #MX5_CCM_CCGR7] -#endif - - ldr r1, [r0, #MX5_CCM_CSCDR1] - orr r1, r1, #0x3f - eor r1, r1, #0x3f - orr r1, r1, #0x21 - str r1, [r0, #MX5_CCM_CSCDR1] - /* make sure divider effective */ -1: ldr r1, [r0, #MX5_CCM_CDHIPR] - cmp r1, #0x0 - bne 1b - - mov r1, #0x0 - str r1, [r0, #MX5_CCM_CCDR] - - /* for cko - for ARM div by 8 */ - mov r1, #0x000A0000 - add r1, r1, #0x00000F0 - str r1, [r0, #MX5_CCM_CCOSR] -.endm - -.globl board_init_lowlevel -board_init_lowlevel: - mov r10, lr - - init_l2cc - init_aips - init_clock - - mov pc, r10 - -/* Board level setting value */ -W_DP_OP_1000: .word MX5_PLL_DP_OP_1000 -W_DP_MFD_1000: .word MX5_PLL_DP_MFD_1000 -W_DP_MFN_1000: .word MX5_PLL_DP_MFN_1000 -W_DP_OP_800: .word MX5_PLL_DP_OP_800 -W_DP_MFD_800: .word MX5_PLL_DP_MFD_800 -W_DP_MFN_800: .word MX5_PLL_DP_MFN_800 -W_DP_OP_665: .word MX5_PLL_DP_OP_665 -W_DP_MFD_665: .word MX5_PLL_DP_MFD_665 -W_DP_MFN_665: .word MX5_PLL_DP_MFN_665 -W_DP_OP_216: .word MX5_PLL_DP_OP_216 -W_DP_MFD_216: .word MX5_PLL_DP_MFD_216 -W_DP_MFN_216: .word MX5_PLL_DP_MFN_216 diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8d5bd74..984d9dc 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -401,7 +401,6 @@ choice config MACH_FREESCALE_MX53_LOCO bool "Freescale i.MX53 LOCO" - select MACH_HAS_LOWLEVEL_INIT endchoice -- 1.7.7 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox