From: Alexander Shiyan <shc_work@mail.ru>
To: barebox@lists.infradead.org
Subject: [PATCH 1/3] i.MX27: Define base address for SDHC1,2,3
Date: Tue, 20 Mar 2012 12:54:24 +0400 [thread overview]
Message-ID: <1332233666-5422-1-git-send-email-shc_work@mail.ru> (raw)
In-Reply-To: <20120318151242.GP3852@pengutronix.de>
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/include/mach/imx27-regs.h | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h
index 3a4325e..b7bebae 100644
--- a/arch/arm/mach-imx/include/mach/imx27-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx27-regs.h
@@ -19,12 +19,15 @@
#define IMX_SPI1_BASE (0x0e000 + IMX_IO_BASE)
#define IMX_SPI2_BASE (0x0f000 + IMX_IO_BASE)
#define IMX_I2C1_BASE (0x12000 + IMX_IO_BASE)
+#define IMX_SDHC1_BASE (0x13000 + IMX_IO_BASE)
+#define IMX_SDHC2_BASE (0x14000 + IMX_IO_BASE)
#define IMX_GPIO_BASE (0x15000 + IMX_IO_BASE)
#define IMX_TIM4_BASE (0x19000 + IMX_IO_BASE)
#define IMX_TIM5_BASE (0x1a000 + IMX_IO_BASE)
#define IMX_UART5_BASE (0x1b000 + IMX_IO_BASE)
#define IMX_UART6_BASE (0x1c000 + IMX_IO_BASE)
#define IMX_I2C2_BASE (0x1d000 + IMX_IO_BASE)
+#define IMX_SDHC3_BASE (0x1e000 + IMX_IO_BASE)
#define IMX_TIM6_BASE (0x1f000 + IMX_IO_BASE)
#define IMX_AIPI2_BASE (0x20000 + IMX_IO_BASE)
#define IMX_FB_BASE (0x21000 + IMX_IO_BASE)
--
1.7.3.4
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next prev parent reply other threads:[~2012-03-20 8:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-18 6:29 [PATCH 2/2] i.MX27: Add support for SDHC1 Alexander Shiyan
2012-03-18 15:12 ` Sascha Hauer
2012-03-20 8:54 ` Alexander Shiyan [this message]
2012-03-20 13:09 ` [PATCH 1/3] i.MX27: Define base address for SDHC1,2,3 Sascha Hauer
2012-03-20 8:54 ` [PATCH 2/3] i.MX27: Add support for SDHC1,3 Alexander Shiyan
2012-03-20 8:54 ` [PATCH 3/3] i.MX51: Fix name definition for SSI3 Alexander Shiyan
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