ARM i.MX51: lowlevel code work

ARM i.MX51: lowlevel code work

[Sascha Hauer]

We currently only setup the i.MX5 to full speed on newer tapeouts.
This really is a hack for older babbage boards. This series fixes this.

Sascha

for you to fetch changes up to f762f4bf04ae9f9faf5e422b273079b3f6946e73:

  ARM i.MX51 lowlevel: setup full cpu speed unconditionally (2012-03-23 11:33:03 +0100)

----------------------------------------------------------------
Sascha Hauer (3):
      ARM i.MX51 clk: select uart clk parent based on hardware setting
      ARM i.MX51 babbage: move lowlevel setup after power init
      ARM i.MX51 lowlevel: setup full cpu speed unconditionally

 arch/arm/boards/freescale-mx51-pdk/board.c |    7 +++++--
 arch/arm/mach-imx/imx51.c                  |    7 ++-----
 arch/arm/mach-imx/speed-imx51.c            |   10 +++++++++-
 3 files changed, 16 insertions(+), 8 deletions(-)

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[PATCH 1/3] ARM i.MX51 clk: select uart clk parent based on hardware setting

[Sascha Hauer]

The previous code assumed pll2 which is correct when we set the
uart parent to pll2 beforehand. The reset default is different
though, so calculate uart parent based on hardware setting.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/speed-imx51.c |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx51.c b/arch/arm/mach-imx/speed-imx51.c
index 643ad8f..84f4892 100644
--- a/arch/arm/mach-imx/speed-imx51.c
+++ b/arch/arm/mach-imx/speed-imx51.c
@@ -115,7 +115,15 @@ unsigned long imx_get_uartclk(void)
 	u32 reg, prediv, podf;
 	unsigned long parent_rate;
 
-	parent_rate = pll2_sw_get_rate();
+	reg = ccm_readl(MX5_CCM_CSCMR1);
+	reg &= MX5_CCM_CSCMR1_UART_CLK_SEL_MASK;
+	reg >>= MX5_CCM_CSCMR1_UART_CLK_SEL_OFFSET;
+
+	parent_rate = get_rate_select(reg,
+			pll1_main_get_rate,
+			pll2_sw_get_rate,
+			pll3_sw_get_rate,
+			NULL);
 
 	reg = ccm_readl(MX5_CCM_CSCDR1);
 	prediv = ((reg & MX5_CCM_CSCDR1_UART_CLK_PRED_MASK) >>
-- 
1.7.9.1


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[PATCH 2/3] ARM i.MX51 babbage: move lowlevel setup after power init

[Sascha Hauer]

The imx51 lowlevel setup code currently sets the full cpu
speed only for TO3. It turned out that this is not a TO
specific hack but a hack for older babbage boards. Move
the lowlevel init after babbage_power_init() so that we
can remove the hack from the generic i.MX51 lowlevel
function. As this potentially changes the UART clock we
have to flush the console beforehand and call the clock
notifier afterwards.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/boards/freescale-mx51-pdk/board.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
index e515d94..108af93 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -30,6 +30,7 @@
 #include <fs.h>
 #include <fcntl.h>
 #include <nand.h>
+#include <notifier.h>
 #include <spi/spi.h>
 #include <mfd/mc13892.h>
 #include <io.h>
@@ -245,6 +246,10 @@ static int f3s_devices_init(void)
 
 	babbage_power_init();
 
+	console_flush();
+	imx51_init_lowlevel();
+	clock_notifier_call_chain();
+
 	armlinux_set_bootparams((void *)0x90000100);
 	armlinux_set_architecture(MACH_TYPE_MX51_BABBAGE);
 
@@ -266,8 +271,6 @@ static int f3s_console_init(void)
 {
 	mxc_iomux_v3_setup_multiple_pads(f3s_pads, ARRAY_SIZE(f3s_pads));
 
-	imx51_init_lowlevel();
-
 	writel(0, 0x73fa8228);
 	writel(0, 0x73fa822c);
 	writel(0, 0x73fa8230);
-- 
1.7.9.1


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[PATCH 3/3] ARM i.MX51 lowlevel: setup full cpu speed unconditionally

[Sascha Hauer]

What looked like a TO specific hack really is a hack for
older babbage boards. As the babbage code now handles this
correctly we can remove it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/imx51.c |    7 ++-----
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index f7f2345..5483d10 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -238,11 +238,8 @@ void imx51_init_lowlevel(void)
 	/* Set the platform clock dividers */
 	writel(0x00000124, MX51_ARM_BASE_ADDR + 0x14);
 
-	/* Run TO 3.0 at Full speed, for other TO's wait till we increase VDDGP */
-	if (imx_silicon_revision() == MX51_CHIP_REV_3_0)
-		writel(0x0, ccm + MX5_CCM_CACRR);
-	else
-		writel(0x1, ccm + MX5_CCM_CACRR);
+	/* Run at Full speed */
+	writel(0x0, ccm + MX5_CCM_CACRR);
 
 	/* Switch ARM back to PLL 1 */
 	writel(0x0, ccm + MX5_CCM_CCSR);
-- 
1.7.9.1


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