From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 3/3] ARM i.MX51 lowlevel: setup full cpu speed unconditionally
Date: Fri, 23 Mar 2012 11:36:19 +0100 [thread overview]
Message-ID: <1332498979-13742-4-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1332498979-13742-1-git-send-email-s.hauer@pengutronix.de>
What looked like a TO specific hack really is a hack for
older babbage boards. As the babbage code now handles this
correctly we can remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/imx51.c | 7 ++-----
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index f7f2345..5483d10 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -238,11 +238,8 @@ void imx51_init_lowlevel(void)
/* Set the platform clock dividers */
writel(0x00000124, MX51_ARM_BASE_ADDR + 0x14);
- /* Run TO 3.0 at Full speed, for other TO's wait till we increase VDDGP */
- if (imx_silicon_revision() == MX51_CHIP_REV_3_0)
- writel(0x0, ccm + MX5_CCM_CACRR);
- else
- writel(0x1, ccm + MX5_CCM_CACRR);
+ /* Run at Full speed */
+ writel(0x0, ccm + MX5_CCM_CACRR);
/* Switch ARM back to PLL 1 */
writel(0x0, ccm + MX5_CCM_CCSR);
--
1.7.9.1
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prev parent reply other threads:[~2012-03-23 10:36 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-23 10:36 ARM i.MX51: lowlevel code work Sascha Hauer
2012-03-23 10:36 ` [PATCH 1/3] ARM i.MX51 clk: select uart clk parent based on hardware setting Sascha Hauer
2012-03-23 10:36 ` [PATCH 2/3] ARM i.MX51 babbage: move lowlevel setup after power init Sascha Hauer
2012-03-23 10:36 ` Sascha Hauer [this message]
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