From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 3/7] net fec: Add i.MX6 support
Date: Fri, 13 Apr 2012 15:54:29 +0200 [thread overview]
Message-ID: <1334325273-1701-4-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1334325273-1701-1-git-send-email-s.hauer@pengutronix.de>
Currently only 100Mb/s is tested. Freescale's U-Boot suggests that
there are some additional adjustments necessary for Gigabit support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/net/fec_imx.c | 25 ++++++++++++++++++++++---
include/fec.h | 1 +
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index 08cd761..599a9b4 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -274,7 +274,7 @@ static int fec_set_hwaddr(struct eth_device *dev, unsigned char *mac)
static int fec_init(struct eth_device *dev)
{
struct fec_priv *fec = (struct fec_priv *)dev->priv;
- u32 rcntl;
+ u32 rcntl, xwmrk;
/*
* Clear FEC-Lite interrupt event register(IEVENT)
@@ -317,13 +317,25 @@ static int fec_init(struct eth_device *dev)
writel(FEC_MIIGSK_ENR_EN, fec->regs + FEC_MIIGSK_ENR);
}
}
+
+ if (fec->xcv_type == RGMII)
+ rcntl |= 1 << 6;
+
writel(rcntl, fec->regs + FEC_R_CNTRL);
/*
* Set Opcode/Pause Duration Register
*/
writel(0x00010020, fec->regs + FEC_OP_PAUSE);
- writel(0x2, fec->regs + FEC_X_WMRK);
+
+ xwmrk = 0x2;
+
+ /* set ENET tx at store and forward mode */
+ if (cpu_is_mx6())
+ xwmrk |= 1 << 8;
+
+ writel(xwmrk, fec->regs + FEC_X_WMRK);
+
/*
* Set multicast address filter
*/
@@ -349,6 +361,7 @@ static int fec_open(struct eth_device *edev)
{
struct fec_priv *fec = (struct fec_priv *)edev->priv;
int ret;
+ u32 ecr;
/*
* Initialize RxBD/TxBD rings
@@ -363,7 +376,13 @@ static int fec_open(struct eth_device *edev)
/*
* Enable FEC-Lite controller
*/
- writel(FEC_ECNTRL_ETHER_EN, fec->regs + FEC_ECNTRL);
+ ecr = FEC_ECNTRL_ETHER_EN;
+
+ /* Enable Swap to support little-endian device */
+ if (cpu_is_mx6())
+ ecr |= 0x100;
+
+ writel(ecr, fec->regs + FEC_ECNTRL);
/*
* Enable SmartDMA receive task
*/
diff --git a/include/fec.h b/include/fec.h
index 85691b6..f56b023 100644
--- a/include/fec.h
+++ b/include/fec.h
@@ -33,6 +33,7 @@ typedef enum {
MII10,
MII100,
RMII,
+ RGMII,
} xceiver_type;
/*
--
1.7.10
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next prev parent reply other threads:[~2012-04-13 13:54 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-13 13:54 initial " Sascha Hauer
2012-04-13 13:54 ` [PATCH 1/7] ARM: add " Sascha Hauer
2012-04-14 11:41 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-14 13:19 ` Sascha Hauer
[not found] ` <20120414161123.GB30672@game.jcrosoft.org>
2012-04-14 20:13 ` Sascha Hauer
2012-04-15 1:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-15 9:53 ` Sascha Hauer
2012-04-15 11:47 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-15 13:49 ` Sascha Hauer
2012-04-15 13:51 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-13 13:54 ` [PATCH 2/7] serial i.MX: " Sascha Hauer
2012-04-14 11:34 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-14 13:25 ` Sascha Hauer
2012-04-13 13:54 ` Sascha Hauer [this message]
2012-04-13 13:54 ` [PATCH 4/7] mmc i.MX esdhc: Add " Sascha Hauer
2012-04-13 13:54 ` [PATCH 5/7] net mii: Add mii_open/mii_close functions Sascha Hauer
2012-04-14 10:46 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-14 13:27 ` Sascha Hauer
2012-04-15 4:12 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-15 10:01 ` Sascha Hauer
2012-04-13 13:54 ` [PATCH 6/7] ARM: initial Freescale i.MX6q Armadillo2 support Sascha Hauer
2012-04-14 10:53 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-14 12:57 ` Sascha Hauer
2012-04-15 4:09 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-15 9:53 ` Sascha Hauer
2012-04-15 11:46 ` Jean-Christophe PLAGNIOL-VILLARD
2012-04-14 13:17 ` Eric Bénard
2012-04-14 13:20 ` Sascha Hauer
2012-04-13 13:54 ` [PATCH 7/7] ARM Freescale i.MX6 Armadillo2: Add defconfig Sascha Hauer
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