From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
To: barebox@lists.infradead.org
Cc: "Krzysztof Hałasa" <khc@pm.waw.pl>
Subject: [PATCH 08/10] ARM: Add support for Goramo Multilink router platform.
Date: Mon, 23 Apr 2012 09:02:17 +0200 [thread overview]
Message-ID: <1335164539-2188-8-git-send-email-plagnioj@jcrosoft.com> (raw)
In-Reply-To: <20120423065650.GM20601@game.jcrosoft.org>
From: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
Documentation/boards.dox | 1 +
arch/arm/Makefile | 1 +
arch/arm/boards/multilink/Makefile | 1 +
arch/arm/boards/multilink/env/config | 36 ++++++++
arch/arm/boards/multilink/lowlevel_init.S | 64 ++++++++++++++
arch/arm/boards/multilink/multilink.c | 131 +++++++++++++++++++++++++++++
arch/arm/boards/multilink/multilink.dox | 36 ++++++++
arch/arm/configs/multilink_defconfig | 55 ++++++++++++
arch/arm/mach-ixp4xx/Kconfig | 5 +
9 files changed, 330 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boards/multilink/Makefile
create mode 100644 arch/arm/boards/multilink/config.h
create mode 100644 arch/arm/boards/multilink/env/config
create mode 100644 arch/arm/boards/multilink/lowlevel_init.S
create mode 100644 arch/arm/boards/multilink/multilink.c
create mode 100644 arch/arm/boards/multilink/multilink.dox
create mode 100644 arch/arm/configs/multilink_defconfig
diff --git a/Documentation/boards.dox b/Documentation/boards.dox
index ba332a7..27edc62 100644
--- a/Documentation/boards.dox
+++ b/Documentation/boards.dox
@@ -21,6 +21,7 @@ ARM type:
@li @subpage board_loco
@li @subpage chumbyone
@li @subpage scb9328
+ at li @subpage multilink
@li @subpage netx
@li @subpage dev_omap_arch
@li @subpage a9m2440
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 34abd19..782938a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -94,6 +94,7 @@ board-$(CONFIG_MACH_IMX21ADS) := imx21ads
board-$(CONFIG_MACH_IMX27ADS) := imx27ads
board-$(CONFIG_MACH_MIOA701) := mioa701
board-$(CONFIG_MACH_MMCCPU) := mmccpu
+board-$(CONFIG_MACH_MULTILINK) := multilink
board-$(CONFIG_MACH_MX1ADS) := mx1ads
board-$(CONFIG_MACH_NOMADIK_8815NHK) := nhk8815
board-$(CONFIG_MACH_NXDB500) := netx
diff --git a/arch/arm/boards/multilink/Makefile b/arch/arm/boards/multilink/Makefile
new file mode 100644
index 0000000..d5a8bbc
--- /dev/null
+++ b/arch/arm/boards/multilink/Makefile
@@ -0,0 +1 @@
+obj-y += lowlevel_init.o multilink.o
diff --git a/arch/arm/boards/multilink/config.h b/arch/arm/boards/multilink/config.h
new file mode 100644
index 0000000..e69de29
diff --git a/arch/arm/boards/multilink/env/config b/arch/arm/boards/multilink/env/config
new file mode 100644
index 0000000..3a6eaa2
--- /dev/null
+++ b/arch/arm/boards/multilink/env/config
@@ -0,0 +1,36 @@
+#!/bin/sh
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp-barebox
+dhcp_vendor_id=barebox-nslu2
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'nfs', 'tftp' or 'nor'
+kernel_loc=nfs
+# can be either 'net', 'nor' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root.$rootfs_type
+
+kernelimage=zImage
+#kernelimage=uImage
+#kernelimage=Image
+#kernelimage=Image.lzo
+
+nor_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nor=3
+
+autoboot_timeout=3
+
+bootargs="console=ttyS0,115200"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m\n# "
diff --git a/arch/arm/boards/multilink/lowlevel_init.S b/arch/arm/boards/multilink/lowlevel_init.S
new file mode 100644
index 0000000..970ef72
--- /dev/null
+++ b/arch/arm/boards/multilink/lowlevel_init.S
@@ -0,0 +1,64 @@
+#include <mach/ixp4xx-regs.h>
+
+ .section ".text_bare_init", "ax"
+ .balign 0x40
+ .space 0x40 /* configuration block at 0x40 */
+
+ .macro DELAY_FOR cycles, reg0
+ ldr \reg0, =\cycles
+ subs \reg0, \reg0, #1
+ subne pc, pc, #0xc
+ .endm
+
+#define CFG_SDRAM_SIZE 0x50 /* u32 */
+#define CFG_SDRAM_CONF 0x54 /* u32 */
+#define CFG_SDRAM_MODE 0x58 /* u32 */
+#define CFG_SDRAM_REFRESH 0x5C /* u32 */
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+ mov r8, #IXP4XX_EXP_BASE(0)
+ ldr r1, [r8, #CFG_SDRAM_CONF]
+ ldr r2, =IXP4XX_SDRAM_CONFIG
+ str r1, [r2]
+
+ /* disable refresh cycles */
+ mov r1, #0
+ add r2, r2, #4 /* r2 = IXP4XX_SDRAM_REFRESH */
+ str r1, [r2]
+
+ /* send NOP command */
+ mov r1, #3
+ add r3, r2, #4 /* r3 = IXP4XX_SDRAM_IR */
+ str r1, [r3]
+ DELAY_FOR 0x4000, r0
+
+ /* set SDRAM internal refresh */
+ ldr r1, [r8, #CFG_SDRAM_REFRESH]
+ str r1, [r2]
+ DELAY_FOR 0x4000, r0
+
+ /* send precharge-all command to close all open banks */
+ mov r1, #2
+ str r1, [r3]
+ DELAY_FOR 0x4000, r0
+
+ /* provide 8 auto-refresh cycles */
+ mov r1, #4
+ mov r4, #8
+1: str r1, [r3]
+ DELAY_FOR 0x100, r0
+ subs r4, r4, #1
+ bne 1b
+
+ /* set mode register in SDRAM */
+ ldr r1, [r8, #CFG_SDRAM_MODE]
+ str r1, [r3]
+ DELAY_FOR 0x4000, r0
+
+ /* send normal operation command */
+ mov r1, #6
+ str r1, [r3]
+ DELAY_FOR 0x4000, r0
+
+ mov pc, lr
diff --git a/arch/arm/boards/multilink/multilink.c b/arch/arm/boards/multilink/multilink.c
new file mode 100644
index 0000000..5d497b5
--- /dev/null
+++ b/arch/arm/boards/multilink/multilink.c
@@ -0,0 +1,131 @@
+//#define DEBUG
+#include <common.h>
+#include <errno.h>
+#include <init.h>
+#include <linux/types.h>
+#include <asm/armlinux.h>
+#include <asm/io.h>
+#include <io.h>
+#include <generated/mach-types.h>
+#include <mach/ixp4xx-regs.h>
+#include <mach/platform.h>
+
+/* offsets from start of flash ROM = 0x50000000 */
+#define CFG_ETH0_ADDRESS 0x40 /* 6 bytes */
+#define CFG_ETH1_ADDRESS 0x46 /* 6 bytes */
+#define CFG_REV 0x4C /* u32 */
+#define CFG_SDRAM_SIZE 0x50 /* u32 */
+#define CFG_SDRAM_CONF 0x54 /* u32 */
+#define CFG_SDRAM_MODE 0x58 /* u32 */
+#define CFG_SDRAM_REFRESH 0x5C /* u32 */
+
+#define CFG_HW_BITS 0x60 /* u32 */
+#define CFG_HW_USB_PORTS 0x00000007 /* 0 = no NEC chip, 1-5 = ports # */
+#define CFG_HW_HAS_PCI_SLOT 0x00000008
+#define CFG_HW_HAS_ETH0 0x00000010
+#define CFG_HW_HAS_ETH1 0x00000020
+#define CFG_HW_HAS_HSS0 0x00000040
+#define CFG_HW_HAS_HSS1 0x00000080
+#define CFG_HW_HAS_UART0 0x00000100
+#define CFG_HW_HAS_UART1 0x00000200
+#define CFG_HW_HAS_EEPROM 0x00000400
+
+#define ETH_ALEN 6
+
+#define BAREBOX_START 0x00000
+#define BAREBOX_LENGTH 0x34000
+#define NPE_A_START (BAREBOX_START + BAREBOX_LENGTH)
+#define NPE_A_LENGTH 0x05000
+#define NPE_B_START (NPE_A_START + NPE_A_LENGTH)
+#define NPE_B_LENGTH 0x03000
+#define NPE_C_START (NPE_B_START + NPE_B_LENGTH)
+#define NPE_C_LENGTH 0x04000
+#define NPE_ENV0_START (NPE_C_START + NPE_C_LENGTH)
+#define NPE_ENV0_LENGTH 0x20000
+
+#ifdef CONFIG_DRIVER_NET_IXP4XX_ETH
+static struct eth_plat_info eth_pinfo[2] = {
+ {
+ .npe = 1,
+ .phy = 0,
+ .rxq = 20,
+ .txreadyq = 29,
+ }, {
+ .npe = 2,
+ .phy = 1,
+ .rxq = 21,
+ .txreadyq = 30,
+ }
+};
+
+static void gml_eth_init(void)
+{
+ int i;
+ u32 hw_bits;
+
+ hw_bits = __raw_readl(IXP4XX_EXP_BASE(0) + CFG_HW_BITS);
+
+ if (hw_bits & CFG_HW_HAS_ETH0) {
+ for (i = 0; i < ETH_ALEN; i++)
+ eth_pinfo[0].hwaddr[i] = cpu_readb(CFG_ETH0_ADDRESS + i);
+ ixp4xx_add_eth(1, ð_pinfo[0]);
+ }
+
+ if (hw_bits & CFG_HW_HAS_ETH1) {
+ for (i = 0; i < ETH_ALEN; i++)
+ eth_pinfo[1].hwaddr[i] = cpu_readb(CFG_ETH1_ADDRESS + i);
+ ixp4xx_add_eth(2, ð_pinfo[1]);
+ }
+}
+#else
+static void gml_eth_init(void) {}
+#endif
+
+static int gml_mem_init(void)
+{
+ u32 size = __raw_readl(IXP4XX_EXP_BASE(0) + CFG_SDRAM_SIZE);
+
+ arm_add_mem_device("ram0", 0x00000000, size);
+
+ return 0;
+}
+mem_initcall(gml_mem_init);
+
+static inline u8 __init flash_readb(u32 addr)
+{
+ return __raw_readb(IXP4XX_EXP_BASE(0) + addr);
+}
+
+static int __init gml_devices_init(void)
+{
+ IXP4XX_EXP_CS0 = IXP4XX_EXP_EN | IXP4XX_EXP_INTEL |
+ IXP4XX_EXP_BITS(24) | IXP4XX_EXP_WR_EN | IXP4XX_EXP_BYTE_RD16;
+
+ add_cfi_flash_device(0, IXP4XX_EXP_BASE(0), 0, 0);
+
+ devfs_add_partition("nor0", BAREBOX_START, BAREBOX_LENGTH,
+ DEVFS_PARTITION_FIXED | DEVFS_PARTITION_READONLY, "barebox");
+ devfs_add_partition("nor0", NPE_A_START, NPE_A_LENGTH,
+ DEVFS_PARTITION_FIXED | DEVFS_PARTITION_READONLY, "NPE-A");
+ devfs_add_partition("nor0", NPE_B_START, NPE_B_LENGTH,
+ DEVFS_PARTITION_FIXED | DEVFS_PARTITION_READONLY, "NPE-B");
+ devfs_add_partition("nor0", NPE_C_START, NPE_C_LENGTH,
+ DEVFS_PARTITION_FIXED | DEVFS_PARTITION_READONLY, "NPE-C");
+ devfs_add_partition("nor0", NPE_ENV0_START, NPE_ENV0_LENGTH,
+ DEVFS_PARTITION_FIXED, "env0");
+
+ gml_eth_init();
+
+ armlinux_set_bootparams((void *)(0x00000100));
+ armlinux_set_architecture(MACH_TYPE_GORAMO_MLR);
+
+ return 0;
+}
+device_initcall(gml_devices_init);
+
+static int gml_console_init(void)
+{
+ ixp4xx_add_uart1();
+ return 0;
+}
+console_initcall(gml_console_init);
diff --git a/arch/arm/boards/multilink/multilink.dox b/arch/arm/boards/multilink/multilink.dox
new file mode 100644
index 0000000..eada1e1
--- /dev/null
+++ b/arch/arm/boards/multilink/multilink.dox
@@ -0,0 +1,36 @@
+/** @page multilink Goramo MultiLink
+
+These boards are based on Intel IXP42x CPU.
+
+Variants:
+
+MicroRouter module: IXP421 or IXP425 266 MHz CPU, 32 MiB SDRAM,
+ 1 or 2 Fast Ethernet ports, 2 sync serial ports, 1 RS-232 (console) port.
+
+MultiLink v.1: IXP425 266 or 533 MHz CPU, 64 - 256 MiB SDRAM,
+ 2 Fast Ethernet ports, 2 sync serial ports, 1 - 2 RS-232 ports,
+ a mini-PCI slot, 2 optional USB host connectors.
+
+MultiLink v.2: IXP425 266 or 533 MHz CPU, 64 - 256 MiB SDRAM,
+ 2 Fast Ethernet ports, 2 sync serial ports, 1 - 2 RS-232 ports,
+ 2 additional optional Fast or Gigabit Ethernet ports, a mini-PCI slot,
+ 4 optional USB host connectors, optional Real-Time Clock,
+ optional IDE connector.
+
+16 MiB Intel StrataFlash memory is partitioned as follows:
+
+0x00000-0x34000 : Barebox image
+0x34000-0x39000 : NPE-A microcode
+0x39000-0x3c000 : NPE-B microcode
+0x3c000-0x40000 : NPE-C microcode
+0x40000-0x60000 : env0
+
+There is a factory configuration region within Barebox image at locations
+0x40 - 0x7F. Details are in file multilink.c
+
+Barebox image and NPE microcode files are combined in first two blocks
+of flash memory. NPE-A microcode is not used by Barebox (but may be used
+by Linux HSS driver). NPE-B microcode is needed for eth0 and NPE-C for
+eth1. Barebox needs version 2.4 of regular non-VLAN-aware microcode files
+(with or without crypto support).
+*/
diff --git a/arch/arm/configs/multilink_defconfig b/arch/arm/configs/multilink_defconfig
new file mode 100644
index 0000000..f090ec8
--- /dev/null
+++ b/arch/arm/configs/multilink_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARCH_IXP4XX=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+# CONFIG_ARM_EXCEPTIONS is not set
+CONFIG_TEXT_BASE=0x01d00000
+CONFIG_EXPERIMENTAL=y
+# CONFIG_MACH_DO_LOWLEVEL_INIT is not set
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_PROMPT_HUSH_PS2="mgl# "
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/multilink/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_BOOTM_ZLIB=y
+CONFIG_CMD_BOOTM_BZLIB=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_UNLZO=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_NFS=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_NET_TFTP_PUSH=y
+CONFIG_NET_NETCONSOLE=y
+CONFIG_DRIVER_SERIAL_ARM_DCC=y
+CONFIG_DRIVER_SERIAL_NS16550=y
+# CONFIG_SPI is not set
+CONFIG_FS_CRAMFS=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 480511c..3960811 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -10,6 +10,10 @@ config IXP4XX_GENERIC_LOWLEVEL_INIT
choice
prompt "IXP4xx Board Type"
+config MACH_MULTILINK
+ bool "Goramo MultiLink"
+ select MACH_HAS_LOWLEVEL_INIT
+
config MACH_NSLU2
bool "Linksys NSLU2"
select MACH_HAS_LOWLEVEL_INIT
@@ -18,6 +22,7 @@ config MACH_NSLU2
endchoice
config BOARDINFO
+ default "Goramo MultiLink" if MACH_MULTILINK
default "Linksys NSLU2" if MACH_NSLU2
config IXP4XX_QMGR
--
1.7.9.1
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next prev parent reply other threads:[~2012-04-23 7:33 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-23 6:56 [PATCH 00/10] IXP4xx rebase WIP Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 01/10] ARM: add support of in_be16/32 and out_be16/32 Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 02/10] ARM: Add support for IXP4xx CPU Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 03/10] ARM: Add support for IXP4xx Network Process Engine and queue Manager support Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 04/10] net: Add support for IXP4xx ethernet support Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 05/10] ixp4xx: add gpio support Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 06/10] ixp4xx: add generic board lowlevel_init Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 07/10] ARM: Add support for Linksys NSLU2 support Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` Jean-Christophe PLAGNIOL-VILLARD [this message]
2012-04-23 7:02 ` [PATCH 09/10] nslu2: NPE-B firmware + boot script Jean-Christophe PLAGNIOL-VILLARD
2012-04-23 7:02 ` [PATCH 10/10] multilink: " Jean-Christophe PLAGNIOL-VILLARD
2012-04-24 8:08 ` [PATCH 00/10] IXP4xx rebase WIP Sascha Hauer
2012-04-28 8:32 ` Krzysztof Halasa
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