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From: Renaud Barbier <renaud.barbier@ge.com>
To: barebox@lists.infradead.org
Subject: [PATCH 3/3] ppc: P2020RDB Ethernet configuration
Date: Wed, 25 Jul 2012 17:01:01 +0100	[thread overview]
Message-ID: <1343232061-1789-4-git-send-email-renaud.barbier@ge.com> (raw)
In-Reply-To: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>

Minimal support of the Ethernet interface on the P2020RDB board. Only
the eTSEC3 interface is supported.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
---
 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c |   38 +++++++++++++++++++++++++
 arch/ppc/configs/p2020rdb_defconfig           |    6 ++++
 2 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
index 20897cb..201220f 100644
--- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
+++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
@@ -35,6 +35,7 @@
 #include <mach/mmu.h>
 #include <mach/immap_85xx.h>
 #include <mach/clocks.h>
+#include <mach/gianfar.h>
 #include <mach/early_udelay.h>
 
 #define VSC7385_RST_SET		0x00080000
@@ -61,10 +62,47 @@
 #define SYSCLK_50	50000000
 #define SYSCLK_100	100000000
 
+/* Ethernet. Use eTSEC3 */
+static struct gfar_info_struct gfar_info[] = {
+	{
+	.phyaddr = 1,
+	.tbiana = 0,
+	.tbicr = 0,
+	.flags = 0,
+	},
+};
+
+static int board_eth_init(int num, int idx)
+{
+	struct resource *res;
+
+	res = xzalloc(3 * sizeof(struct resource));
+	/* TSEC interface registers */
+	res[0].start = GFAR_BASE_ADDR + ((num - 1) * 0x1000);
+	res[0].end = res[0].start + 0x1000;
+	res[0].flags = IORESOURCE_MEM;
+	/* External PHY access always through eTSEC1 */
+	res[1].start = MDIO_BASE_ADDR;
+	res[1].end = res[1].start + 0x1000;
+	res[1].flags = IORESOURCE_MEM;
+	/* Access to TBI/RTBI interface. */
+	res[2].start = MDIO_BASE_ADDR + ((num - 1) * 0x1000);
+	res[2].end = res[2].start + 0x1000;
+	res[2].flags = IORESOURCE_MEM;
+
+	add_generic_device_res("gfar", DEVICE_ID_DYNAMIC, res, 3,
+				&gfar_info[idx]);
+
+	return 0;
+}
+
 static int devices_init(void)
 {
 	add_cfi_flash_device(-1, CFG_FLASH_BASE, 16 << 20, 0);
 
+	/* eTSEC3 */
+	board_eth_init(3, 0);
+
 	devfs_add_partition("nor0", 0xf80000, 0x80000, DEVFS_PARTITION_FIXED,
 			    "self0");
 	return 0;
diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig
index f8a0687..d025a40 100644
--- a/arch/ppc/configs/p2020rdb_defconfig
+++ b/arch/ppc/configs/p2020rdb_defconfig
@@ -21,3 +21,9 @@ CONFIG_MALLOC_SIZE=0x200000
 CONFIG_BAUDRATE=115200
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_RELOCATABLE=y
+CONFIG_DRIVER_NET_GIANFAR=y
+CONFIG_NET=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_PING=y
+CONFIG_TFTP=y
-- 
1.7.1


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  parent reply	other threads:[~2012-07-25 16:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-25 16:00 [PATCH 0/3] ppc: Freescale TSEC driver Renaud Barbier
2012-07-25 16:00 ` [PATCH 1/3] ppc: GIANFAR base address definition Renaud Barbier
2012-07-25 16:01 ` [PATCH 2/3] net: GIANFAR driver Renaud Barbier
2012-07-27  7:43   ` Sascha Hauer
2012-07-25 16:01 ` Renaud Barbier [this message]
2012-07-27  7:45   ` [PATCH 3/3] ppc: P2020RDB Ethernet configuration Sascha Hauer
2012-08-07 14:30 ` [PATCH V2 0/4] ppc: Freescale TSEC driver Renaud Barbier
2012-08-10 19:16   ` Sascha Hauer
2012-08-07 14:30 ` [PATCH 1/4] ppc: GIANFAR base address definition Renaud Barbier
2012-08-07 14:30 ` [PATCH 2/4] net: GIANFAR driver Renaud Barbier
2012-08-07 14:30 ` [PATCH 3/4] fsl: Freescale TSEC specific initialization Renaud Barbier
2012-08-07 14:30 ` [PATCH 4/4] ppc: P2020RDB Ethernet configuration Renaud Barbier

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