From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 4/4] create a common ARM flush_icache function
Date: Sun, 12 Aug 2012 16:30:32 +0200 [thread overview]
Message-ID: <1344781832-17978-5-git-send-email-s.hauer@pengutronix.de> (raw)
In-Reply-To: <1344781832-17978-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/cpu/start-pbl.c | 7 +++----
arch/arm/cpu/start.c | 4 ++--
arch/arm/include/asm/cache.h | 9 +++++++++
3 files changed, 14 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/include/asm/cache.h
diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
index 1b67e2a..3f2eb07 100644
--- a/arch/arm/cpu/start-pbl.c
+++ b/arch/arm/cpu/start-pbl.c
@@ -29,6 +29,7 @@
#include <asm-generic/memory_layout.h>
#include <asm/sections.h>
#include <asm/pgtable.h>
+#include <asm/cache.h>
#include "mmu.h"
@@ -113,8 +114,7 @@ static void barebox_uncompress(void *compressed_start, unsigned int len)
if (use_mmu)
mmu_disable();
- /* flush I-cache before jumping to the uncompressed binary */
- __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+ flush_icache();
barebox();
}
@@ -173,8 +173,7 @@ copy_link:
/* clear bss */
memset(__bss_start, 0, __bss_stop - __bss_start);
- /* flush I-cache before jumping to the copied binary */
- __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+ flush_icache();
r = (unsigned int)&barebox_uncompress;
/* call barebox_uncompress with its absolute address */
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 8365a75..07e7dfe 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -26,6 +26,7 @@
#include <asm/barebox-arm-head.h>
#include <asm-generic/memory_layout.h>
#include <asm/sections.h>
+#include <asm/cache.h>
#ifdef CONFIG_PBL_IMAGE
/*
@@ -80,8 +81,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
/* clear bss */
memset(__bss_start, 0, __bss_stop - __bss_start);
- /* flush I-cache before jumping to the copied binary */
- __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+ flush_icache();
/* call start_barebox with its absolute address */
r = (unsigned int)&start_barebox;
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
new file mode 100644
index 0000000..ff79749
--- /dev/null
+++ b/arch/arm/include/asm/cache.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_CACHE_H
+#define __ASM_CACHE_H
+
+static inline void flush_icache(void)
+{
+ asm volatile("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+}
+
+#endif
--
1.7.10.4
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next prev parent reply other threads:[~2012-08-12 14:30 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-12 14:30 [PATCH] ARM: enable MMU in pbl Sascha Hauer
2012-08-12 14:30 ` [PATCH 1/4] ARM __mmu_cache_*: Do not clobber registers Sascha Hauer
2012-08-12 14:30 ` [PATCH 2/4] ARM MMU: call __mmu_cache_* as regular C functions Sascha Hauer
2012-08-12 14:30 ` [PATCH 3/4] ARM pbl: enable MMU during decompression Sascha Hauer
2012-08-12 18:09 ` Jean-Christophe PLAGNIOL-VILLARD
2012-08-13 18:29 ` Sascha Hauer
2012-09-21 13:18 ` Jean-Christophe PLAGNIOL-VILLARD
2012-08-12 14:30 ` Sascha Hauer [this message]
2012-09-20 18:52 ` [PATCH] ARM: enable MMU in pbl Jean-Christophe PLAGNIOL-VILLARD
2012-09-20 19:56 ` Sascha Hauer
2012-09-21 13:23 ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-21 14:46 ` Jean-Christophe PLAGNIOL-VILLARD
2012-09-22 10:21 ` Sascha Hauer
2012-09-22 11:41 ` Jean-Christophe PLAGNIOL-VILLARD
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