From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T8Qnn-0004Gw-Rv for barebox@lists.infradead.org; Mon, 03 Sep 2012 07:10:32 +0000 From: Steffen Trumtrar Date: Mon, 3 Sep 2012 09:10:28 +0200 Message-Id: <1346656228-301-1-git-send-email-s.trumtrar@pengutronix.de> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: barebox-bounces@lists.infradead.org Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH v2] ARM i.MX6: query silicon revision To: barebox@lists.infradead.org Cc: Steffen Trumtrar Read silicon revision from ???-register. This is based on a7683867463481bfea84af4d60af832ddfb3da7f from u-boot. The address 0x020c8260 is used and decoded. I haven't found that in my datasheet, so I must trust the code to be correct. At least on a SabreLite v1.0 I get the correct version though. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-imx/imx6.c | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index b6067d7..fef0a00 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include "gpio.h" @@ -35,6 +35,38 @@ void *imx_gpio_base[] = { int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32; +static u32 mx6_silicon_revision; +static char *mx6_rev_string = "unknown"; + +int imx_silicon_revision(void) +{ + return mx6_silicon_revision; +} + +static int query_silicon_revision(void) +{ + void __iomem *anatop = (void *) MX6_ANATOP_BASE_ADDR; + u32 rev, reg; + + reg = readl(anatop + 0x260); + rev = (reg & 0xff) + 0x10; + switch (rev) { + case 0x10: + mx6_silicon_revision = IMX_CHIP_REV_1_0; + mx6_rev_string = "1.0"; + break; + case 0x11: + mx6_silicon_revision = IMX_CHIP_REV_1_1; + mx6_rev_string = "1.1"; + break; + default: + mx6_silicon_revision = 0; + } + + return 0; +} +core_initcall(query_silicon_revision); + void imx6_init_lowlevel(void) { void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR; -- 1.7.10.4 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox