* [PATCH] mtd: nand: Add K9LBG08U0D chip to flash ids
@ 2012-09-07 10:46 Alex Gershgorin
2012-09-10 6:36 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Alex Gershgorin @ 2012-09-07 10:46 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox, Alex Gershgorin
Signed-off-by: Alex Gershgorin <alexg@meprolight.com>
---
drivers/mtd/nand/nand_ids.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index cb53fc6..469e8dd 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -118,6 +118,9 @@ struct nand_flash_dev nand_flash_ids[] = {
{__NANDSTR("NAND 2GiB 1,8V 16-bit"), 0xB5, 0, 2048, 0, LP_OPTIONS16},
{__NANDSTR("NAND 2GiB 3,3V 16-bit"), 0xC5, 0, 2048, 0, LP_OPTIONS16},
+ /* 32 Gigabit */
+ {__NANDSTR("NAND 4GiB 3,3V 8-bit"), 0xD7, 0, 4096, 0, LP_OPTIONS},
+
/*
* Renesas AND 1 Gigabit. Those chips do not support extended id and
* have a strange page/block layout ! The chosen minimum erasesize is
--
1.7.1
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] mtd: nand: Add K9LBG08U0D chip to flash ids
2012-09-07 10:46 [PATCH] mtd: nand: Add K9LBG08U0D chip to flash ids Alex Gershgorin
@ 2012-09-10 6:36 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2012-09-10 6:36 UTC (permalink / raw)
To: Alex Gershgorin; +Cc: barebox, Alex Gershgorin
On Fri, Sep 07, 2012 at 01:46:20PM +0300, Alex Gershgorin wrote:
> Signed-off-by: Alex Gershgorin <alexg@meprolight.com>
Applied, thanks
Sascha
> ---
> drivers/mtd/nand/nand_ids.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
> index cb53fc6..469e8dd 100644
> --- a/drivers/mtd/nand/nand_ids.c
> +++ b/drivers/mtd/nand/nand_ids.c
> @@ -118,6 +118,9 @@ struct nand_flash_dev nand_flash_ids[] = {
> {__NANDSTR("NAND 2GiB 1,8V 16-bit"), 0xB5, 0, 2048, 0, LP_OPTIONS16},
> {__NANDSTR("NAND 2GiB 3,3V 16-bit"), 0xC5, 0, 2048, 0, LP_OPTIONS16},
>
> + /* 32 Gigabit */
> + {__NANDSTR("NAND 4GiB 3,3V 8-bit"), 0xD7, 0, 4096, 0, LP_OPTIONS},
> +
> /*
> * Renesas AND 1 Gigabit. Those chips do not support extended id and
> * have a strange page/block layout ! The chosen minimum erasesize is
> --
> 1.7.1
>
>
--
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