[PATCH 1/1] designware: add clock support

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

allow the driver to request it's clock and enable it

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/net/designware.c |   20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ec51825..1cbcd5a 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -32,8 +32,10 @@
 #include <asm/mmu.h>
 #include <net/designware.h>
 #include <linux/phy.h>
-#include "designware.h"
+#include <linux/clk.h>
+#include <linux/err.h>
 
+#include "designware.h"
 
 struct dw_eth_dev {
 	struct eth_device netdev;
@@ -390,6 +392,8 @@ static int dwc_ether_probe(struct device_d *dev)
 	struct mii_bus *miibus;
 	void __iomem *base;
 	struct dwc_ether_platform_data *pdata = dev->platform_data;
+	struct clk *clk;
+	int ret;
 
 	if (!pdata) {
 		printf("dwc_ether: no platform_data\n");
@@ -427,6 +431,20 @@ static int dwc_ether_probe(struct device_d *dev)
 	miibus->write = dwc_ether_mii_write;
 	miibus->priv = priv;
 
+	clk = clk_get(dev, NULL);
+	if (IS_ERR(clk)) {
+		ret = PTR_ERR(clk);
+		dev_err(dev, "no clk ret = %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_enable(clk);
+	if (ret) {
+		dev_err(dev, "can not enable clk ret = %d\n", ret);
+		clk_put(clk);
+		return ret;
+	}
+
 	mdiobus_register(miibus);
 	eth_register(edev);
 	return 0;
-- 
1.7.10.4


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