mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Renaud Barbier <renaud.barbier@ge.com>
To: barebox@lists.infradead.org
Subject: [PATCH 2/2] ppc: update I/O accessors
Date: Thu, 30 May 2013 16:17:25 +0100	[thread overview]
Message-ID: <1369927045-24309-2-git-send-email-renaud.barbier@ge.com> (raw)
In-Reply-To: <1369927045-24309-1-git-send-email-renaud.barbier@ge.com>

The I/O accessors in_bexx, out_bexx, in_lexx and out_lexx are updated
to the latest Linux version.

The patch is tested on a MPC8544 based board and solved I/O access
issues on I2C devices.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
---
 arch/ppc/include/asm/io.h |   61 +++++++++++++++++++++++---------------------
 1 files changed, 32 insertions(+), 29 deletions(-)

diff --git a/arch/ppc/include/asm/io.h b/arch/ppc/include/asm/io.h
index 62e6de2..d3473e5 100644
--- a/arch/ppc/include/asm/io.h
+++ b/arch/ppc/include/asm/io.h
@@ -135,73 +135,76 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
 /*
  * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
  */
-extern inline int in_8(volatile u8 *addr)
+extern inline u8 in_8(const volatile u8 __iomem *addr)
 {
-	int ret;
+	u8 ret;
 
-	__asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
+	__asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
+			: "=r" (ret) : "m" (*addr));
 	return ret;
 }
 
-extern inline void out_8(volatile u8 *addr, int val)
+extern inline void out_8(volatile u8 __iomem *addr, u8 val)
 {
-	__asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+	__asm__ __volatile__("sync;stb%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
-extern inline int in_le16(volatile u16 *addr)
+extern inline u16 in_le16(const volatile u16 __iomem *addr)
 {
-	int ret;
+	u16 ret;
 
-	__asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
-			"r" (addr), "m" (*addr));
+	__asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync"
+			: "=r" (ret) : "r" (addr), "m" (*addr));
 	return ret;
 }
 
-extern inline int in_be16(volatile u16 *addr)
+extern inline u16 in_be16(const volatile u16 __iomem *addr)
 {
-	int ret;
+	u16 ret;
 
-	__asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
+	__asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
+			: "=r" (ret) : "m" (*addr));
 	return ret;
 }
 
-extern inline void out_le16(volatile u16 *addr, int val)
+extern inline void out_le16(volatile u16 __iomem *addr, u16 val)
 {
-	__asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
-			"r" (val), "r" (addr));
+	__asm__ __volatile__("sync; sthbrx %1,0,%2"
+			: "=m" (*addr) : "r" (val), "r" (addr));
 }
 
-extern inline void out_be16(volatile u16 *addr, int val)
+extern inline void out_be16(volatile u16 __iomem *addr, u16 val)
 {
-	__asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+	__asm__ __volatile__("sync;sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
-extern inline unsigned in_le32(volatile u32 *addr)
+extern inline u32 in_le32(const volatile u32 __iomem *addr)
 {
-	unsigned ret;
+	u32 ret;
 
-	__asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
-			"r" (addr), "m" (*addr));
+	__asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync"
+			: "=r" (ret) : "r" (addr), "m" (*addr));
 	return ret;
 }
 
-extern inline unsigned in_be32(volatile u32 *addr)
+extern inline u32 in_be32(const volatile u32 __iomem *addr)
 {
-	unsigned ret;
+	u32 ret;
 
-	__asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
+	__asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
+			: "=r" (ret) : "m" (*addr));
 	return ret;
 }
 
-extern inline void out_le32(volatile unsigned *addr, int val)
+extern inline void out_le32(volatile u32 __iomem *addr, u32 val)
 {
-	__asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
-			"r" (val), "r" (addr));
+	__asm__ __volatile__("sync; stwbrx %1,0,%2"
+			: "=m" (*addr) : "r" (val), "r" (addr));
 }
 
-extern inline void out_be32(volatile unsigned *addr, int val)
+extern inline void out_be32(volatile u32 __iomem *addr, u32 val)
 {
-	__asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+	__asm__ __volatile__("sync;stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
 }
 
 /*
-- 
1.7.1


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  reply	other threads:[~2013-05-30 15:18 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-30 15:17 [PATCH 1/2] ppc io.h: fix indentation Renaud Barbier
2013-05-30 15:17 ` Renaud Barbier [this message]
2013-05-31  6:52 ` Sascha Hauer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1369927045-24309-2-git-send-email-renaud.barbier@ge.com \
    --to=renaud.barbier@ge.com \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox