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* [PATCH] ARM: i.MX6: Add cputype detection
@ 2013-06-25 14:05 Sascha Hauer
  0 siblings, 0 replies; only message in thread
From: Sascha Hauer @ 2013-06-25 14:05 UTC (permalink / raw)
  To: barebox

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c              | 16 +++++++++++++++-
 arch/arm/mach-imx/include/mach/imx6.h | 31 +++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 9e7dd7a..ed1edd7 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -15,6 +15,7 @@
 #include <common.h>
 #include <io.h>
 #include <sizes.h>
+#include <mach/imx6.h>
 #include <mach/generic.h>
 #include <mach/revision.h>
 #include <mach/imx6-regs.h>
@@ -59,6 +60,7 @@ void imx6_init_lowlevel(void)
 
 int imx6_init(void)
 {
+	const char *cputypestr;
 	u32 rev;
 	u32 mx6_silicon_revision;
 
@@ -82,7 +84,19 @@ int imx6_init(void)
 		mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN;
 	}
 
-	imx_set_silicon_revision("i.MX6", mx6_silicon_revision);
+	switch (imx6_cpu_type()) {
+	case IMX6_CPUTYPE_IMX6Q:
+		cputypestr = "i.MX6 Dual/Quad";
+		break;
+	case IMX6_CPUTYPE_IMX6DL:
+		cputypestr = "i.MX6 Solo/DualLite";
+		break;
+	default:
+		cputypestr = "unknown i.MX6";
+		break;
+	}
+
+	imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
 
 	return 0;
 }
diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h
index 518cf98..4b2b1c7 100644
--- a/arch/arm/mach-imx/include/mach/imx6.h
+++ b/arch/arm/mach-imx/include/mach/imx6.h
@@ -1,6 +1,37 @@
 #ifndef __MACH_IMX6_H
 #define __MACH_IMX6_H
 
+#include <io.h>
+#include <mach/generic.h>
+#include <mach/imx6-regs.h>
+
 void imx6_init_lowlevel(void);
 
+#define IMX6_ANATOP_SI_REV 0x260
+
+#define IMX6_CPUTYPE_IMX6Q	0x63
+#define IMX6_CPUTYPE_IMX6DL	0x61
+
+static inline int imx6_cpu_type(void)
+{
+	uint32_t val;
+
+	if (!cpu_is_mx6())
+		return 0;
+
+	val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV);
+
+	return (val >> 16) & 0xff;
+}
+
+static inline int cpu_is_mx6q(void)
+{
+	return imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q;
+}
+
+static inline int cpu_is_mx6dl(void)
+{
+	return imx6_cpu_type() == IMX6_CPUTYPE_IMX6DL;
+}
+
 #endif /* __MACH_IMX6_H */
-- 
1.8.3.1


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