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* [PATCH] imx-image: Align image size
@ 2013-08-15 12:52 Sascha Hauer
  0 siblings, 0 replies; only message in thread
From: Sascha Hauer @ 2013-08-15 12:52 UTC (permalink / raw)
  To: barebox

Several boot modes on i.MX can't cope with partial pages or
non word aligned image lengths, so align the size to 4k.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 scripts/imx/imx-image.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c
index 09fdc5f..ec571eb 100644
--- a/scripts/imx/imx-image.c
+++ b/scripts/imx/imx-image.c
@@ -632,7 +632,7 @@ int main(int argc, char *argv[])
 	char *imagename = NULL;
 	char *outfile = NULL;
 	void *buf;
-	size_t image_size = 0;
+	size_t image_size = 0, load_size;
 	struct stat s;
 	int infd, outfd;
 	int dcd_only = 0;
@@ -714,12 +714,22 @@ int main(int argc, char *argv[])
 		exit (0);
 	}
 
+	/*
+	 * Add 0x1000 to the image size for the DCD.
+	 * Align up to a 4k boundary, because:
+	 * - at least i.MX5 NAND boot only reads full NAND pages and misses the
+	 *   last partial NAND page.
+	 * - i.MX6 SPI NOR boot corrupts the last few bytes of an image loaded
+	 *   in ver funy ways when the image size is not 4 byte aligned
+	 */
+	load_size = ((image_size + 0x1000) + 0xfff) & ~0xfff;
+
 	switch (header_version) {
 	case 1:
-		add_header_v1(buf, image_dcd_offset, image_load_addr, image_size + 0x1000);
+		add_header_v1(buf, image_dcd_offset, image_load_addr, load_size);
 		break;
 	case 2:
-		add_header_v2(buf, image_dcd_offset, image_load_addr, image_size + 0x1000);
+		add_header_v2(buf, image_dcd_offset, image_load_addr, load_size);
 		break;
 	default:
 		fprintf(stderr, "Congratulations! You're welcome to implement header version %d\n",
-- 
1.8.4.rc2


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