* OMAP: devicetree preparation patches
@ 2013-11-22 14:54 Sascha Hauer
2013-11-22 14:54 ` [PATCH 01/16] ARM: OMAP: select SoC variant from boards Sascha Hauer
` (15 more replies)
0 siblings, 16 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
The following are various patches to prepare OMAP devicetree
support. The am33xx devicetree is added, but remains unused
for now.
Sascha
----------------------------------------------------------------
Sascha Hauer (16):
ARM: OMAP: select SoC variant from boards
ARM: OMAP: Add SoC prefix to running_in_* functions
ARM: OMAP: select correct reset_cpu function at runtime
ARM: OMAP: Make cpu_is_* macros runtime if necessary
ARM: dtb: create dt-bindings link
dt-bindings: Add gpio header file
dt-bindings: Add omap/am33xx pinctrl header file
images: socfpga: Do not pollute Make variable namespace
ARM: Add am33xx SoC dtsi file
ARM: am335x: Add reg-shift property to uarts
ARM: dts: AM33xx: Add gpio aliases
ARM: am33xx: Add am33xx_ prefix to SoC specific functions
ARM: OMAP: Make debug_ll UART Kconfig selectable
ARM: OMAP: centralize omap startup
ARM: am33xx: compile SoC files for pbl aswell
ARM: OMAP: let UART selection depend on its only user
arch/arm/boards/beagle/lowlevel.c | 2 +-
arch/arm/boards/beaglebone/lowlevel.c | 8 +-
arch/arm/boards/omap343xdsp/lowlevel.c | 2 +-
arch/arm/boards/omap3evm/lowlevel.c | 2 +-
arch/arm/boards/pcm051/lowlevel.c | 4 +-
arch/arm/boards/phycard-a-l1/lowlevel.c | 2 +-
arch/arm/dts/am33xx.dtsi | 806 +++++++++++++++++++++++
arch/arm/dts/include/dt-bindings | 1 +
arch/arm/mach-omap/Kconfig | 32 +-
arch/arm/mach-omap/Makefile | 1 +
arch/arm/mach-omap/am33xx_clock.c | 4 +-
arch/arm/mach-omap/am33xx_generic.c | 26 +-
arch/arm/mach-omap/gpmc.c | 17 +-
arch/arm/mach-omap/include/mach/am33xx-clock.h | 4 +-
arch/arm/mach-omap/include/mach/am33xx-generic.h | 9 +
arch/arm/mach-omap/include/mach/debug_ll.h | 71 +-
arch/arm/mach-omap/include/mach/generic.h | 40 +-
arch/arm/mach-omap/include/mach/omap3-generic.h | 10 +
arch/arm/mach-omap/include/mach/omap4-generic.h | 5 +
arch/arm/mach-omap/include/mach/sys_info.h | 4 -
arch/arm/mach-omap/omap3_clock.c | 9 +-
arch/arm/mach-omap/omap3_generic.c | 28 +-
arch/arm/mach-omap/omap4_generic.c | 19 +-
arch/arm/mach-omap/omap_generic.c | 70 +-
common/Kconfig | 34 +
images/Makefile.socfpga | 12 +-
include/dt-bindings/gpio/gpio.h | 15 +
include/dt-bindings/pinctrl/am33xx.h | 42 ++
include/dt-bindings/pinctrl/omap.h | 53 ++
29 files changed, 1201 insertions(+), 131 deletions(-)
create mode 100644 arch/arm/dts/am33xx.dtsi
create mode 120000 arch/arm/dts/include/dt-bindings
create mode 100644 include/dt-bindings/gpio/gpio.h
create mode 100644 include/dt-bindings/pinctrl/am33xx.h
create mode 100644 include/dt-bindings/pinctrl/omap.h
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 01/16] ARM: OMAP: select SoC variant from boards
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 02/16] ARM: OMAP: Add SoC prefix to running_in_* functions Sascha Hauer
` (14 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
To be able to compile multiple SoC types later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/Kconfig | 31 +++++++++++++------------------
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index b2eec30..79e75d8 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -22,11 +22,8 @@ menu "OMAP Features"
config MACH_OMAP
bool
-choice
- prompt "Select OMAP Variant"
-
config ARCH_OMAP3
- bool "OMAP3"
+ bool
select CPU_V7
select GENERIC_GPIO
select OMAP_CLOCK_SOURCE_S32K
@@ -34,7 +31,7 @@ config ARCH_OMAP3
Say Y here if you are using Texas Instrument's OMAP343x based platform
config ARCH_OMAP4
- bool "OMAP4"
+ bool
select CPU_V7
select GENERIC_GPIO
select OMAP_CLOCK_SOURCE_S32K
@@ -42,15 +39,13 @@ config ARCH_OMAP4
Say Y here if you are using Texas Instrument's OMAP4 based platform
config ARCH_AM33XX
- bool "AM33xx"
+ bool
select CPU_V7
select GENERIC_GPIO
select OMAP_CLOCK_SOURCE_DMTIMER0
help
Say Y here if you are using Texas Instrument's AM33xx based platform
-endchoice
-
# Blind enable all possible clocks.. think twice before you do this.
config OMAP_CLOCK_SOURCE_S32K
bool
@@ -124,65 +119,65 @@ choice
config MACH_OMAP343xSDP
bool "Texas Instrument's SDP343x"
- depends on ARCH_OMAP3
+ select ARCH_OMAP3
help
Say Y here if you are using SDP343x platform
config MACH_BEAGLE
bool "Texas Instrument's Beagle Board"
select HAVE_DEFAULT_ENVIRONMENT_NEW
- depends on ARCH_OMAP3
+ select ARCH_OMAP3
help
Say Y here if you are using Beagle Board
config MACH_BEAGLEBONE
bool "Texas Instrument's Beagle Bone"
- depends on ARCH_AM33XX
+ select ARCH_AM33XX
help
Say Y here if you are using Beagle Bone
config MACH_OMAP3EVM
bool "Texas Instrument's OMAP3 EVM"
- depends on ARCH_OMAP3
+ select ARCH_OMAP3
help
Say Y here if you are using OMAP3EVM
config MACH_PANDA
bool "Texas Instrument's Panda Board"
select HAVE_DEFAULT_ENVIRONMENT_NEW
- depends on ARCH_OMAP4
+ select ARCH_OMAP4
help
Say Y here if you are using OMAP4 Panda board
config MACH_ARCHOSG9
bool "Archos G9 tablets"
- depends on ARCH_OMAP4
+ select ARCH_OMAP4
help
Say Y here if you are using OMAP4-based Archos G9 tablet
config MACH_PCM049
bool "Phytec phyCORE pcm049"
- depends on ARCH_OMAP4
+ select ARCH_OMAP4
help
Say Y here if you are using Phytecs phyCORE pcm049 board
based on OMAP4
config MACH_PCAAL1
bool "Phytec phyCARD-A-L1"
- depends on ARCH_OMAP3
+ select ARCH_OMAP3
help
Say Y here if you are using a phyCARD-A-L1 PCA-A-L1
config MACH_PCAAXL2
bool "Phytec phyCARD XL2"
- depends on ARCH_OMAP4
+ select ARCH_OMAP4
help
Say Y here if you are using a phyCARD-A-XL1 PCA-A-XL1
config MACH_PCM051
bool "Phytec phyCORE pcm051"
select HAVE_DEFAULT_ENVIRONMENT_NEW
- depends on ARCH_AM33XX
+ select ARCH_AM33XX
help
Say Y here if you are using Phytecs phyCORE pcm051 board
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 02/16] ARM: OMAP: Add SoC prefix to running_in_* functions
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
2013-11-22 14:54 ` [PATCH 01/16] ARM: OMAP: select SoC variant from boards Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 03/16] ARM: OMAP: select correct reset_cpu function at runtime Sascha Hauer
` (13 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/beagle/lowlevel.c | 2 +-
arch/arm/boards/beaglebone/lowlevel.c | 2 +-
arch/arm/boards/omap343xdsp/lowlevel.c | 2 +-
arch/arm/boards/omap3evm/lowlevel.c | 2 +-
arch/arm/boards/pcm051/lowlevel.c | 2 +-
arch/arm/boards/phycard-a-l1/lowlevel.c | 2 +-
arch/arm/mach-omap/am33xx_generic.c | 8 ++++----
arch/arm/mach-omap/include/mach/am33xx-generic.h | 4 ++++
arch/arm/mach-omap/include/mach/omap3-generic.h | 5 +++++
arch/arm/mach-omap/include/mach/sys_info.h | 4 ----
arch/arm/mach-omap/omap3_clock.c | 9 +++++----
arch/arm/mach-omap/omap3_generic.c | 12 ++++++------
12 files changed, 30 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boards/beagle/lowlevel.c b/arch/arm/boards/beagle/lowlevel.c
index ad46386..cdb88ca 100644
--- a/arch/arm/boards/beagle/lowlevel.c
+++ b/arch/arm/boards/beagle/lowlevel.c
@@ -168,7 +168,7 @@ static void sdrc_init(void)
*/
static int beagle_board_init(void)
{
- int in_sdram = running_in_sdram();
+ int in_sdram = omap3_running_in_sdram();
if (!in_sdram)
omap3_core_init();
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
index e993c89..1f2b833 100644
--- a/arch/arm/boards/beaglebone/lowlevel.c
+++ b/arch/arm/boards/beaglebone/lowlevel.c
@@ -121,7 +121,7 @@ static int beaglebone_board_init(void)
__raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
- if (running_in_sdram())
+ if (am33xx_running_in_sdram())
return 0;
/* Setup the PLLs and the clocks for the peripherals */
diff --git a/arch/arm/boards/omap343xdsp/lowlevel.c b/arch/arm/boards/omap343xdsp/lowlevel.c
index fcb9571..816f400 100644
--- a/arch/arm/boards/omap343xdsp/lowlevel.c
+++ b/arch/arm/boards/omap343xdsp/lowlevel.c
@@ -536,7 +536,7 @@ static void mux_config(void)
*/
static int sdp343x_board_init(void)
{
- int in_sdram = running_in_sdram();
+ int in_sdram = omap3_running_in_sdram();
if (!in_sdram)
omap3_core_init();
diff --git a/arch/arm/boards/omap3evm/lowlevel.c b/arch/arm/boards/omap3evm/lowlevel.c
index 98f1476..56075c1 100644
--- a/arch/arm/boards/omap3evm/lowlevel.c
+++ b/arch/arm/boards/omap3evm/lowlevel.c
@@ -148,7 +148,7 @@ static void mux_config(void)
*/
static int omap3_evm_board_init(void)
{
- int in_sdram = running_in_sdram();
+ int in_sdram = omap3_running_in_sdram();
omap3_core_init();
diff --git a/arch/arm/boards/pcm051/lowlevel.c b/arch/arm/boards/pcm051/lowlevel.c
index 48578cd..0a55ad7 100644
--- a/arch/arm/boards/pcm051/lowlevel.c
+++ b/arch/arm/boards/pcm051/lowlevel.c
@@ -65,7 +65,7 @@ static int pcm051_board_init(void)
writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
- if (running_in_sdram())
+ if (am33xx_running_in_sdram())
return 0;
pll_init(MPUPLL_M_600, 25, DDRPLL_M_303);
diff --git a/arch/arm/boards/phycard-a-l1/lowlevel.c b/arch/arm/boards/phycard-a-l1/lowlevel.c
index 353b58f..7a67493 100644
--- a/arch/arm/boards/phycard-a-l1/lowlevel.c
+++ b/arch/arm/boards/phycard-a-l1/lowlevel.c
@@ -239,7 +239,7 @@ static void pcaal1_mux_config(void)
*/
static int pcaal1_board_init(void)
{
- int in_sdram = running_in_sdram();
+ int in_sdram = omap3_running_in_sdram();
if (!in_sdram)
omap3_core_init();
diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
index 3e2b6c4..8a883e3 100644
--- a/arch/arm/mach-omap/am33xx_generic.c
+++ b/arch/arm/mach-omap/am33xx_generic.c
@@ -68,7 +68,7 @@ u32 am33xx_get_cpu_rev(void)
*
* @return base address
*/
-u32 get_base(void)
+static u32 get_base(void)
{
u32 val;
__asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
@@ -84,7 +84,7 @@ u32 get_base(void)
*
* @return 1 if we are running in XIP mode, else return 0
*/
-u32 running_in_flash(void)
+u32 am33xx_running_in_flash(void)
{
if (get_base() < 4)
return 1; /* in flash */
@@ -98,7 +98,7 @@ u32 running_in_flash(void)
*
* @return 1 if we are running in SRAM, else return 0
*/
-u32 running_in_sram(void)
+u32 am33xx_running_in_sram(void)
{
if (get_base() == 4)
return 1; /* in SRAM */
@@ -113,7 +113,7 @@ u32 running_in_sram(void)
*
* @return 1 if we are running from SDRAM, else return 0
*/
-u32 running_in_sdram(void)
+u32 am33xx_running_in_sdram(void)
{
if (get_base() > 4)
return 1; /* in sdram */
diff --git a/arch/arm/mach-omap/include/mach/am33xx-generic.h b/arch/arm/mach-omap/include/mach/am33xx-generic.h
index ec22ad2..07c72e4 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-generic.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-generic.h
@@ -22,4 +22,8 @@ static inline void am33xx_save_bootinfo(uint32_t *info)
omap_save_bootinfo(info);
}
+u32 am33xx_running_in_flash(void);
+u32 am33xx_running_in_sram(void);
+u32 am33xx_running_in_sdram(void);
+
#endif /* __MACH_AM33XX_GENERIC_H */
diff --git a/arch/arm/mach-omap/include/mach/omap3-generic.h b/arch/arm/mach-omap/include/mach/omap3-generic.h
index 7f0da4e..a6af2ff 100644
--- a/arch/arm/mach-omap/include/mach/omap3-generic.h
+++ b/arch/arm/mach-omap/include/mach/omap3-generic.h
@@ -1,6 +1,7 @@
#ifndef __MACH_OMAP3_GENERIC_H
#define __MACH_OMAP3_GENERIC_H
+#include <sizes.h>
#include <mach/generic.h>
#include <mach/omap3-silicon.h>
@@ -18,4 +19,8 @@ static inline void omap3_save_bootinfo(uint32_t *info)
omap_save_bootinfo(info);
}
+u32 omap3_running_in_flash(void);
+u32 omap3_running_in_sram(void);
+u32 omap3_running_in_sdram(void);
+
#endif /* __MACH_OMAP3_GENERIC_H */
diff --git a/arch/arm/mach-omap/include/mach/sys_info.h b/arch/arm/mach-omap/include/mach/sys_info.h
index fce5895..fbac9b5 100644
--- a/arch/arm/mach-omap/include/mach/sys_info.h
+++ b/arch/arm/mach-omap/include/mach/sys_info.h
@@ -91,10 +91,6 @@ u32 get_cpu_rev(void);
u32 get_sdr_cs_size(u32 offset);
u32 get_sdr_cs1_base(void);
inline u32 get_sysboot_value(void);
-u32 get_base(void);
-u32 running_in_flash(void);
-u32 running_in_sram(void);
-u32 running_in_sdram(void);
u32 get_boot_type(void);
u32 get_device_type(void);
diff --git a/arch/arm/mach-omap/omap3_clock.c b/arch/arm/mach-omap/omap3_clock.c
index 03aca49..6700f56 100644
--- a/arch/arm/mach-omap/omap3_clock.c
+++ b/arch/arm/mach-omap/omap3_clock.c
@@ -33,6 +33,7 @@
#include <common.h>
#include <io.h>
#include <mach/omap3-silicon.h>
+#include <mach/omap3-generic.h>
#include <mach/clocks.h>
#include <mach/omap3-clock.h>
#include <mach/timers.h>
@@ -170,7 +171,7 @@ static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
dp += clk_sel;
- if (running_in_sram()) {
+ if (omap3_running_in_sram()) {
sr32(OMAP3_CM_REG(CLKEN_PLL), 0, 3, PLL_FAST_RELOCK_BYPASS);
wait_on_value((0x1 << 0), 0, OMAP3_CM_REG(IDLEST_CKGEN), LDELAY);
@@ -209,7 +210,7 @@ static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
/* Lock Mode */
sr32(OMAP3_CM_REG(CLKEN_PLL), 0, 3, PLL_LOCK);
wait_on_value((0x1 << 0), 1, OMAP3_CM_REG(IDLEST_CKGEN), LDELAY);
- } else if (running_in_flash()) {
+ } else if (omap3_running_in_flash()) {
/***Oopps.. Wrong .config!! *****/
hang();
}
@@ -403,7 +404,7 @@ static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
dp += clk_sel;
- if (running_in_sram()) {
+ if (omap3_running_in_sram()) {
sr32(OMAP3_CM_REG(CLKEN_PLL), 0, 3, PLL_FAST_RELOCK_BYPASS);
wait_on_value((0x1 << 0), 0, OMAP3_CM_REG(IDLEST_CKGEN), LDELAY);
@@ -435,7 +436,7 @@ static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
/* Lock Mode */
sr32(OMAP3_CM_REG(CLKEN_PLL), 0, 3, PLL_LOCK);
wait_on_value((0x1 << 0), 1, OMAP3_CM_REG(IDLEST_CKGEN), LDELAY);
- } else if (running_in_flash()) {
+ } else if (omap3_running_in_flash()) {
/***Oopps.. Wrong .config!! *****/
hang();
}
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index 8b661ff..1046417 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -213,7 +213,7 @@ inline u32 get_sysboot_value(void)
*
* @return base address
*/
-u32 get_base(void)
+static u32 get_base(void)
{
u32 val;
__asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
@@ -229,7 +229,7 @@ u32 get_base(void)
*
* @return 1 if we are running in XIP mode, else return 0
*/
-u32 running_in_flash(void)
+u32 omap3_running_in_flash(void)
{
if (get_base() < 4)
return 1; /* in flash */
@@ -243,7 +243,7 @@ u32 running_in_flash(void)
*
* @return 1 if we are running in SRAM, else return 0
*/
-u32 running_in_sram(void)
+u32 omap3_running_in_sram(void)
{
if (get_base() == 4)
return 1; /* in SRAM */
@@ -258,13 +258,13 @@ u32 running_in_sram(void)
*
* @return 1 if we are running from SDRAM, else return 0
*/
-u32 running_in_sdram(void)
+u32 omap3_running_in_sdram(void)
{
if (get_base() > 4)
return 1; /* in sdram */
return 0; /* running in SRAM or FLASH */
}
-EXPORT_SYMBOL(running_in_sdram);
+EXPORT_SYMBOL(omap3_running_in_sdram);
/**
* @brief Is this an XIP type device or a stream one
@@ -408,7 +408,7 @@ void setup_auxcr(void);
static void try_unlock_memory(void)
{
int mode;
- int in_sdram = running_in_sdram();
+ int in_sdram = omap3_running_in_sdram();
/* if GP device unlock device SRAM for general use */
/* secure code breaks for Secure/Emulation device - HS/E/T */
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 03/16] ARM: OMAP: select correct reset_cpu function at runtime
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
2013-11-22 14:54 ` [PATCH 01/16] ARM: OMAP: select SoC variant from boards Sascha Hauer
2013-11-22 14:54 ` [PATCH 02/16] ARM: OMAP: Add SoC prefix to running_in_* functions Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 04/16] ARM: OMAP: Make cpu_is_* macros runtime if necessary Sascha Hauer
` (12 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/am33xx_generic.c | 2 +-
arch/arm/mach-omap/include/mach/am33xx-generic.h | 2 ++
arch/arm/mach-omap/include/mach/omap3-generic.h | 2 ++
arch/arm/mach-omap/include/mach/omap4-generic.h | 2 ++
arch/arm/mach-omap/omap3_generic.c | 2 +-
arch/arm/mach-omap/omap4_generic.c | 2 +-
arch/arm/mach-omap/omap_generic.c | 14 ++++++++++++++
7 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
index 8a883e3..864f210 100644
--- a/arch/arm/mach-omap/am33xx_generic.c
+++ b/arch/arm/mach-omap/am33xx_generic.c
@@ -30,7 +30,7 @@
#include <mach/am33xx-generic.h>
#include <mach/gpmc.h>
-void __noreturn reset_cpu(unsigned long addr)
+void __noreturn am33xx_reset_cpu(unsigned long addr)
{
writel(AM33XX_PRM_RSTCTRL_RESET, AM33XX_PRM_RSTCTRL);
diff --git a/arch/arm/mach-omap/include/mach/am33xx-generic.h b/arch/arm/mach-omap/include/mach/am33xx-generic.h
index 07c72e4..ed77b64 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-generic.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-generic.h
@@ -26,4 +26,6 @@ u32 am33xx_running_in_flash(void);
u32 am33xx_running_in_sram(void);
u32 am33xx_running_in_sdram(void);
+void __noreturn am33xx_reset_cpu(unsigned long addr);
+
#endif /* __MACH_AM33XX_GENERIC_H */
diff --git a/arch/arm/mach-omap/include/mach/omap3-generic.h b/arch/arm/mach-omap/include/mach/omap3-generic.h
index a6af2ff..c847bfa 100644
--- a/arch/arm/mach-omap/include/mach/omap3-generic.h
+++ b/arch/arm/mach-omap/include/mach/omap3-generic.h
@@ -23,4 +23,6 @@ u32 omap3_running_in_flash(void);
u32 omap3_running_in_sram(void);
u32 omap3_running_in_sdram(void);
+void __noreturn omap3_reset_cpu(unsigned long addr);
+
#endif /* __MACH_OMAP3_GENERIC_H */
diff --git a/arch/arm/mach-omap/include/mach/omap4-generic.h b/arch/arm/mach-omap/include/mach/omap4-generic.h
index 44f5a12..06bc031 100644
--- a/arch/arm/mach-omap/include/mach/omap4-generic.h
+++ b/arch/arm/mach-omap/include/mach/omap4-generic.h
@@ -18,4 +18,6 @@ static inline void omap4_save_bootinfo(uint32_t *info)
omap_save_bootinfo(info);
}
+void __noreturn omap4_reset_cpu(unsigned long addr);
+
#endif /* __MACH_OMAP4_GENERIC_H */
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index 1046417..e53b363 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -52,7 +52,7 @@
*
* @return void
*/
-void __noreturn reset_cpu(unsigned long addr)
+void __noreturn omap3_reset_cpu(unsigned long addr)
{
writel(OMAP3_PRM_RSTCTRL_RESET, OMAP3_PRM_REG(RSTCTRL));
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index 64b0024..58051a3 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -34,7 +34,7 @@
#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0 0x0A0000FF
#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0 0x0A300000
-void __noreturn reset_cpu(unsigned long addr)
+void __noreturn omap4_reset_cpu(unsigned long addr)
{
writel(OMAP44XX_PRM_RSTCTRL_RESET, OMAP44XX_PRM_RSTCTRL);
diff --git a/arch/arm/mach-omap/omap_generic.c b/arch/arm/mach-omap/omap_generic.c
index 79e37e2..2c12ad4 100644
--- a/arch/arm/mach-omap/omap_generic.c
+++ b/arch/arm/mach-omap/omap_generic.c
@@ -25,6 +25,9 @@
#include <mach/am33xx-silicon.h>
#include <mach/omap3-silicon.h>
#include <mach/omap4-silicon.h>
+#include <mach/am33xx-generic.h>
+#include <mach/omap3-generic.h>
+#include <mach/omap4-generic.h>
static void *omap_sram_start(void)
{
@@ -130,3 +133,14 @@ static int omap_env_init(void)
}
late_initcall(omap_env_init);
#endif
+
+void __noreturn reset_cpu(unsigned long addr)
+{
+ if (cpu_is_omap34xx())
+ omap3_reset_cpu(addr);
+ if (cpu_is_omap4xxx())
+ omap4_reset_cpu(addr);
+ if (cpu_is_am33xx())
+ am33xx_reset_cpu(addr);
+ while (1);
+}
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 04/16] ARM: OMAP: Make cpu_is_* macros runtime if necessary
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (2 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 03/16] ARM: OMAP: select correct reset_cpu function at runtime Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 05/16] ARM: dtb: create dt-bindings link Sascha Hauer
` (11 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Currently unused, just preparation for the next steps when we'll
get multiarch support for OMAP.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/include/mach/generic.h | 40 ++++++++++++++++++++++---------
arch/arm/mach-omap/omap_generic.c | 11 +++++----
2 files changed, 36 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h
index b05fdee..f4e18f3 100644
--- a/arch/arm/mach-omap/include/mach/generic.h
+++ b/arch/arm/mach-omap/include/mach/generic.h
@@ -10,28 +10,46 @@
#define OMAP_I2C_REV_ON_3630 0x00000040
#define OMAP_I2C_REV_ON_4430_PLUS 0x50400002
-#ifdef CONFIG_ARCH_OMAP
-#define cpu_is_omap2430() (1)
-#else
-#define cpu_is_omap2430() (0)
-#endif
+extern unsigned int __omap_cpu_type;
+
+#define OMAP_CPU_OMAP3 3
+#define OMAP_CPU_OMAP4 4
+#define OMAP_CPU_AM33XX 33
#ifdef CONFIG_ARCH_OMAP3
-#define cpu_is_omap34xx() (1)
+# ifdef omap_cpu_type
+# undef omap_cpu_type
+# define omap_cpu_type __omap_cpu_type
+# else
+# define omap_cpu_type OMAP_CPU_OMAP3
+# endif
+# define cpu_is_omap3() (omap_cpu_type == OMAP_CPU_OMAP3)
#else
-#define cpu_is_omap34xx() (0)
+# define cpu_is_omap3() (0)
#endif
#ifdef CONFIG_ARCH_OMAP4
-#define cpu_is_omap4xxx() (1)
+# ifdef omap_cpu_type
+# undef omap_cpu_type
+# define omap_cpu_type __omap_cpu_type
+# else
+# define omap_cpu_type OMAP_CPU_OMAP4
+# endif
+# define cpu_is_omap4() (omap_cpu_type == OMAP_CPU_OMAP4)
#else
-#define cpu_is_omap4xxx() (0)
+# define cpu_is_omap4() (0)
#endif
#ifdef CONFIG_ARCH_AM33XX
-#define cpu_is_am33xx() (1)
+# ifdef omap_cpu_type
+# undef omap_cpu_type
+# define omap_cpu_type __omap_cpu_type
+# else
+# define omap_cpu_type OMAP_CPU_AM33XX
+# endif
+# define cpu_is_am33xx() (omap_cpu_type == OMAP_CPU_AM33XX)
#else
-#define cpu_is_am33xx() (0)
+# define cpu_is_am33xx() (0)
#endif
struct omap_barebox_part {
diff --git a/arch/arm/mach-omap/omap_generic.c b/arch/arm/mach-omap/omap_generic.c
index 2c12ad4..b999ea4 100644
--- a/arch/arm/mach-omap/omap_generic.c
+++ b/arch/arm/mach-omap/omap_generic.c
@@ -29,14 +29,17 @@
#include <mach/omap3-generic.h>
#include <mach/omap4-generic.h>
+unsigned int __omap_cpu_type;
+
static void *omap_sram_start(void)
{
if (cpu_is_am33xx())
return (void *)AM33XX_SRAM0_START;
- if (cpu_is_omap34xx())
+ if (cpu_is_omap3())
return (void *)OMAP3_SRAM_BASE;
- if (cpu_is_omap4xxx())
+ if (cpu_is_omap4())
return (void *)OMAP44XX_SRAM_BASE;
+ return NULL;
}
void __noreturn omap_start_barebox(void *barebox)
@@ -136,9 +139,9 @@ late_initcall(omap_env_init);
void __noreturn reset_cpu(unsigned long addr)
{
- if (cpu_is_omap34xx())
+ if (cpu_is_omap3())
omap3_reset_cpu(addr);
- if (cpu_is_omap4xxx())
+ if (cpu_is_omap4())
omap4_reset_cpu(addr);
if (cpu_is_am33xx())
am33xx_reset_cpu(addr);
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 05/16] ARM: dtb: create dt-bindings link
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (3 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 04/16] ARM: OMAP: Make cpu_is_* macros runtime if necessary Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 06/16] dt-bindings: Add gpio header file Sascha Hauer
` (10 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
For making #include <dt-bindings/...> work
We already have the necessary -I flag in dtc_cpp_flags, no nothing
needs to be done here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/include/dt-bindings | 1 +
1 file changed, 1 insertion(+)
create mode 120000 arch/arm/dts/include/dt-bindings
diff --git a/arch/arm/dts/include/dt-bindings b/arch/arm/dts/include/dt-bindings
new file mode 120000
index 0000000..0cecb3d
--- /dev/null
+++ b/arch/arm/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../include/dt-bindings
\ No newline at end of file
--
1.8.4.2
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 06/16] dt-bindings: Add gpio header file
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (4 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 05/16] ARM: dtb: create dt-bindings link Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 07/16] dt-bindings: Add omap/am33xx pinctrl " Sascha Hauer
` (9 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
include/dt-bindings/gpio/gpio.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
create mode 100644 include/dt-bindings/gpio/gpio.h
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
new file mode 100644
index 0000000..e6b1e0a
--- /dev/null
+++ b/include/dt-bindings/gpio/gpio.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants for most GPIO bindings.
+ *
+ * Most GPIO bindings include a flags cell as part of the GPIO specifier.
+ * In most cases, the format of the flags cell uses the standard values
+ * defined in this header.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_GPIO_H
+#define _DT_BINDINGS_GPIO_GPIO_H
+
+#define GPIO_ACTIVE_HIGH 0
+#define GPIO_ACTIVE_LOW 1
+
+#endif
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 07/16] dt-bindings: Add omap/am33xx pinctrl header file
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (5 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 06/16] dt-bindings: Add gpio header file Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 08/16] images: socfpga: Do not pollute Make variable namespace Sascha Hauer
` (8 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
include/dt-bindings/pinctrl/am33xx.h | 42 ++++++++++++++++++++++++++++
include/dt-bindings/pinctrl/omap.h | 53 ++++++++++++++++++++++++++++++++++++
2 files changed, 95 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/am33xx.h
create mode 100644 include/dt-bindings/pinctrl/omap.h
diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h
new file mode 100644
index 0000000..2fbc804
--- /dev/null
+++ b/include/dt-bindings/pinctrl/am33xx.h
@@ -0,0 +1,42 @@
+/*
+ * This header provides constants specific to AM33XX pinctrl bindings.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H
+#define _DT_BINDINGS_PINCTRL_AM33XX_H
+
+#include <dt-bindings/pinctrl/omap.h>
+
+/* am33xx specific mux bit defines */
+#undef PULL_ENA
+#undef INPUT_EN
+
+#define PULL_DISABLE (1 << 3)
+#define INPUT_EN (1 << 5)
+#define SLEWCTRL_FAST (1 << 6)
+
+/* update macro depending on INPUT_EN and PULL_ENA */
+#undef PIN_OUTPUT
+#undef PIN_OUTPUT_PULLUP
+#undef PIN_OUTPUT_PULLDOWN
+#undef PIN_INPUT
+#undef PIN_INPUT_PULLUP
+#undef PIN_INPUT_PULLDOWN
+
+#define PIN_OUTPUT (PULL_DISABLE)
+#define PIN_OUTPUT_PULLUP (PULL_UP)
+#define PIN_OUTPUT_PULLDOWN 0
+#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
+#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
+#define PIN_INPUT_PULLDOWN (INPUT_EN)
+
+/* undef non-existing modes */
+#undef PIN_OFF_NONE
+#undef PIN_OFF_OUTPUT_HIGH
+#undef PIN_OFF_OUTPUT_LOW
+#undef PIN_OFF_INPUT_PULLUP
+#undef PIN_OFF_INPUT_PULLDOWN
+#undef PIN_OFF_WAKEUPENABLE
+
+#endif
+
diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
new file mode 100644
index 0000000..bed35e3
--- /dev/null
+++ b/include/dt-bindings/pinctrl/omap.h
@@ -0,0 +1,53 @@
+/*
+ * This header provides constants for OMAP pinctrl bindings.
+ *
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009-2010 Texas Instruments
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_OMAP_H
+#define _DT_BINDINGS_PINCTRL_OMAP_H
+
+/* 34xx mux mode options for each pin. See TRM for options */
+#define MUX_MODE0 0
+#define MUX_MODE1 1
+#define MUX_MODE2 2
+#define MUX_MODE3 3
+#define MUX_MODE4 4
+#define MUX_MODE5 5
+#define MUX_MODE6 6
+#define MUX_MODE7 7
+
+/* 24xx/34xx mux bit defines */
+#define PULL_ENA (1 << 3)
+#define PULL_UP (1 << 4)
+#define ALTELECTRICALSEL (1 << 5)
+
+/* omap3/4/5 specific mux bit defines */
+#define INPUT_EN (1 << 8)
+#define OFF_EN (1 << 9)
+#define OFFOUT_EN (1 << 10)
+#define OFFOUT_VAL (1 << 11)
+#define OFF_PULL_EN (1 << 12)
+#define OFF_PULL_UP (1 << 13)
+#define WAKEUP_EN (1 << 14)
+#define WAKEUP_EVENT (1 << 15)
+
+/* Active pin states */
+#define PIN_OUTPUT 0
+#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
+#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
+#define PIN_INPUT INPUT_EN
+#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
+#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
+
+/* Off mode states */
+#define PIN_OFF_NONE 0
+#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
+#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
+#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
+#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
+#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
+
+#endif
+
--
1.8.4.2
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 08/16] images: socfpga: Do not pollute Make variable namespace
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (6 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 07/16] dt-bindings: Add omap/am33xx pinctrl " Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 09/16] ARM: Add am33xx SoC dtsi file Sascha Hauer
` (7 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
images/Makefile.socfpga | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/images/Makefile.socfpga b/images/Makefile.socfpga
index 5eed83c..2fca1b7 100644
--- a/images/Makefile.socfpga
+++ b/images/Makefile.socfpga
@@ -13,22 +13,22 @@ $(obj)/%.socfpgaimg: $(obj)/% FORCE
# ----------------------- Cyclone5 based boards ---------------------------
pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload
FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblx.socfpgaimg
-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img
+socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img
pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit
FILE_barebox-socfpga-sockit.img = start_socfpga_sockit.pblx
-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit.img
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit.img
pblx-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += start_socfpga_socrates_xload
FILE_barebox-socfpga-socrates-xload.img = start_socfpga_socrates_xload.pblx.socfpgaimg
-xload-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += barebox-socfpga-socrates-xload.img
+socfpga-xload-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += barebox-socfpga-socrates-xload.img
pblx-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += start_socfpga_socrates
FILE_barebox-socfpga-socrates.img = start_socfpga_socrates.pblx
-barebox-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += barebox-socfpga-socrates.img
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += barebox-socfpga-socrates.img
ifdef CONFIG_ARCH_SOCFPGA_XLOAD
-image-y += $(xload-y)
+image-y += $(socfpga-xload-y)
else
-image-y += $(barebox-y)
+image-y += $(socfpga-barebox-y)
endif
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 09/16] ARM: Add am33xx SoC dtsi file
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (7 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 08/16] images: socfpga: Do not pollute Make variable namespace Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 10/16] ARM: am335x: Add reg-shift property to uarts Sascha Hauer
` (6 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/am33xx.dtsi | 796 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 796 insertions(+)
create mode 100644 arch/arm/dts/am33xx.dtsi
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
new file mode 100644
index 0000000..f6d8ffe
--- /dev/null
+++ b/arch/arm/dts/am33xx.dtsi
@@ -0,0 +1,796 @@
+/*
+ * Device Tree Source for AM33XX SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/am33xx.h>
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "ti,am33xx";
+ interrupt-parent = <&intc>;
+
+ aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ d_can0 = &dcan0;
+ d_can1 = &dcan1;
+ usb0 = &usb0;
+ usb1 = &usb1;
+ phy0 = &usb0_phy;
+ phy1 = &usb1_phy;
+ ethernet0 = &cpsw_emac0;
+ ethernet1 = &cpsw_emac1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ compatible = "arm,cortex-a8";
+ device_type = "cpu";
+ reg = <0>;
+
+ /*
+ * To consider voltage drop between PMIC and SoC,
+ * tolerance value is reduced to 2% from 4% and
+ * voltage value is increased as a precaution.
+ */
+ operating-points = <
+ /* kHz uV */
+ 720000 1285000
+ 600000 1225000
+ 500000 1125000
+ 275000 1125000
+ >;
+ voltage-tolerance = <2>; /* 2 percentage */
+ clock-latency = <300000>; /* From omap-cpufreq driver */
+ };
+ };
+
+ pmu {
+ compatible = "arm,cortex-a8-pmu";
+ interrupts = <3>;
+ };
+
+ /*
+ * The soc node represents the soc top level view. It is uses for IPs
+ * that are not memory mapped in the MPU view or for the MPU itself.
+ */
+ soc {
+ compatible = "ti,omap-infra";
+ mpu {
+ compatible = "ti,omap3-mpu";
+ ti,hwmods = "mpu";
+ };
+ };
+
+ am33xx_pinmux: pinmux@44e10800 {
+ compatible = "pinctrl-single";
+ reg = <0x44e10800 0x0238>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x7f>;
+ };
+
+ /*
+ * XXX: Use a flat representation of the AM33XX interconnect.
+ * The real AM33XX interconnect network is quite complex.Since
+ * that will not bring real advantage to represent that in DT
+ * for the moment, just use a fake OCP bus entry to represent
+ * the whole bus hierarchy.
+ */
+ ocp {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ ti,hwmods = "l3_main";
+
+ intc: interrupt-controller@48200000 {
+ compatible = "ti,omap2-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <128>;
+ reg = <0x48200000 0x1000>;
+ };
+
+ edma: edma@49000000 {
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ reg = <0x49000000 0x10000>,
+ <0x44e10f90 0x10>;
+ interrupts = <12 13 14>;
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ };
+
+ gpio0: gpio@44e07000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio1";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x44e07000 0x1000>;
+ interrupts = <96>;
+ };
+
+ gpio1: gpio@4804c000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x4804c000 0x1000>;
+ interrupts = <98>;
+ };
+
+ gpio2: gpio@481ac000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio3";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x481ac000 0x1000>;
+ interrupts = <32>;
+ };
+
+ gpio3: gpio@481ae000 {
+ compatible = "ti,omap4-gpio";
+ ti,hwmods = "gpio4";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x481ae000 0x1000>;
+ interrupts = <62>;
+ };
+
+ uart0: serial@44e09000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart1";
+ clock-frequency = <48000000>;
+ reg = <0x44e09000 0x2000>;
+ interrupts = <72>;
+ status = "disabled";
+ };
+
+ uart1: serial@48022000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart2";
+ clock-frequency = <48000000>;
+ reg = <0x48022000 0x2000>;
+ interrupts = <73>;
+ status = "disabled";
+ };
+
+ uart2: serial@48024000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart3";
+ clock-frequency = <48000000>;
+ reg = <0x48024000 0x2000>;
+ interrupts = <74>;
+ status = "disabled";
+ };
+
+ uart3: serial@481a6000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart4";
+ clock-frequency = <48000000>;
+ reg = <0x481a6000 0x2000>;
+ interrupts = <44>;
+ status = "disabled";
+ };
+
+ uart4: serial@481a8000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart5";
+ clock-frequency = <48000000>;
+ reg = <0x481a8000 0x2000>;
+ interrupts = <45>;
+ status = "disabled";
+ };
+
+ uart5: serial@481aa000 {
+ compatible = "ti,omap3-uart";
+ ti,hwmods = "uart6";
+ clock-frequency = <48000000>;
+ reg = <0x481aa000 0x2000>;
+ interrupts = <46>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@44e0b000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c1";
+ reg = <0x44e0b000 0x1000>;
+ interrupts = <70>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@4802a000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c2";
+ reg = <0x4802a000 0x1000>;
+ interrupts = <71>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@4819c000 {
+ compatible = "ti,omap4-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c3";
+ reg = <0x4819c000 0x1000>;
+ interrupts = <30>;
+ status = "disabled";
+ };
+
+ mmc1: mmc@48060000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ ti,needs-special-reset;
+ ti,needs-special-hs-handling;
+ dmas = <&edma 24
+ &edma 25>;
+ dma-names = "tx", "rx";
+ interrupts = <64>;
+ interrupt-parent = <&intc>;
+ reg = <0x48060000 0x1000>;
+ status = "disabled";
+ };
+
+ mmc2: mmc@481d8000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc2";
+ ti,needs-special-reset;
+ dmas = <&edma 2
+ &edma 3>;
+ dma-names = "tx", "rx";
+ interrupts = <28>;
+ interrupt-parent = <&intc>;
+ reg = <0x481d8000 0x1000>;
+ status = "disabled";
+ };
+
+ mmc3: mmc@47810000 {
+ compatible = "ti,omap4-hsmmc";
+ ti,hwmods = "mmc3";
+ ti,needs-special-reset;
+ interrupts = <29>;
+ interrupt-parent = <&intc>;
+ reg = <0x47810000 0x1000>;
+ status = "disabled";
+ };
+
+ hwspinlock: spinlock@480ca000 {
+ compatible = "ti,omap4-hwspinlock";
+ reg = <0x480ca000 0x1000>;
+ ti,hwmods = "spinlock";
+ };
+
+ wdt2: wdt@44e35000 {
+ compatible = "ti,omap3-wdt";
+ ti,hwmods = "wd_timer2";
+ reg = <0x44e35000 0x1000>;
+ interrupts = <91>;
+ };
+
+ dcan0: d_can@481cc000 {
+ compatible = "bosch,d_can";
+ ti,hwmods = "d_can0";
+ reg = <0x481cc000 0x2000
+ 0x44e10644 0x4>;
+ interrupts = <52>;
+ status = "disabled";
+ };
+
+ dcan1: d_can@481d0000 {
+ compatible = "bosch,d_can";
+ ti,hwmods = "d_can1";
+ reg = <0x481d0000 0x2000
+ 0x44e10644 0x4>;
+ interrupts = <55>;
+ status = "disabled";
+ };
+
+ timer1: timer@44e31000 {
+ compatible = "ti,am335x-timer-1ms";
+ reg = <0x44e31000 0x400>;
+ interrupts = <67>;
+ ti,hwmods = "timer1";
+ ti,timer-alwon;
+ };
+
+ timer2: timer@48040000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48040000 0x400>;
+ interrupts = <68>;
+ ti,hwmods = "timer2";
+ };
+
+ timer3: timer@48042000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48042000 0x400>;
+ interrupts = <69>;
+ ti,hwmods = "timer3";
+ };
+
+ timer4: timer@48044000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48044000 0x400>;
+ interrupts = <92>;
+ ti,hwmods = "timer4";
+ ti,timer-pwm;
+ };
+
+ timer5: timer@48046000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48046000 0x400>;
+ interrupts = <93>;
+ ti,hwmods = "timer5";
+ ti,timer-pwm;
+ };
+
+ timer6: timer@48048000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x48048000 0x400>;
+ interrupts = <94>;
+ ti,hwmods = "timer6";
+ ti,timer-pwm;
+ };
+
+ timer7: timer@4804a000 {
+ compatible = "ti,am335x-timer";
+ reg = <0x4804a000 0x400>;
+ interrupts = <95>;
+ ti,hwmods = "timer7";
+ ti,timer-pwm;
+ };
+
+ rtc@44e3e000 {
+ compatible = "ti,da830-rtc";
+ reg = <0x44e3e000 0x1000>;
+ interrupts = <75
+ 76>;
+ ti,hwmods = "rtc";
+ };
+
+ spi0: spi@48030000 {
+ compatible = "ti,omap4-mcspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x48030000 0x400>;
+ interrupts = <65>;
+ ti,spi-num-cs = <2>;
+ ti,hwmods = "spi0";
+ dmas = <&edma 16
+ &edma 17
+ &edma 18
+ &edma 19>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+ status = "disabled";
+ };
+
+ spi1: spi@481a0000 {
+ compatible = "ti,omap4-mcspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x481a0000 0x400>;
+ interrupts = <125>;
+ ti,spi-num-cs = <2>;
+ ti,hwmods = "spi1";
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+ status = "disabled";
+ };
+
+ usb: usb@47400000 {
+ compatible = "ti,am33xx-usb";
+ reg = <0x47400000 0x1000>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ti,hwmods = "usb_otg_hs";
+ status = "disabled";
+
+ usb_ctrl_mod: control@44e10000 {
+ compatible = "ti,am335x-usb-ctrl-module";
+ reg = <0x44e10620 0x10
+ 0x44e10648 0x4>;
+ reg-names = "phy_ctrl", "wakeup";
+ status = "disabled";
+ };
+
+ usb0_phy: usb-phy@47401300 {
+ compatible = "ti,am335x-usb-phy";
+ reg = <0x47401300 0x100>;
+ reg-names = "phy";
+ status = "disabled";
+ ti,ctrl_mod = <&usb_ctrl_mod>;
+ };
+
+ usb0: usb@47401000 {
+ compatible = "ti,musb-am33xx";
+ status = "disabled";
+ reg = <0x47401400 0x400
+ 0x47401000 0x200>;
+ reg-names = "mc", "control";
+
+ interrupts = <18>;
+ interrupt-names = "mc";
+ dr_mode = "otg";
+ mentor,multipoint = <1>;
+ mentor,num-eps = <16>;
+ mentor,ram-bits = <12>;
+ mentor,power = <500>;
+ phys = <&usb0_phy>;
+
+ dmas = <&cppi41dma 0 0 &cppi41dma 1 0
+ &cppi41dma 2 0 &cppi41dma 3 0
+ &cppi41dma 4 0 &cppi41dma 5 0
+ &cppi41dma 6 0 &cppi41dma 7 0
+ &cppi41dma 8 0 &cppi41dma 9 0
+ &cppi41dma 10 0 &cppi41dma 11 0
+ &cppi41dma 12 0 &cppi41dma 13 0
+ &cppi41dma 14 0 &cppi41dma 0 1
+ &cppi41dma 1 1 &cppi41dma 2 1
+ &cppi41dma 3 1 &cppi41dma 4 1
+ &cppi41dma 5 1 &cppi41dma 6 1
+ &cppi41dma 7 1 &cppi41dma 8 1
+ &cppi41dma 9 1 &cppi41dma 10 1
+ &cppi41dma 11 1 &cppi41dma 12 1
+ &cppi41dma 13 1 &cppi41dma 14 1>;
+ dma-names =
+ "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+ "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+ "rx14", "rx15",
+ "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+ "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+ "tx14", "tx15";
+ };
+
+ usb1_phy: usb-phy@47401b00 {
+ compatible = "ti,am335x-usb-phy";
+ reg = <0x47401b00 0x100>;
+ reg-names = "phy";
+ status = "disabled";
+ ti,ctrl_mod = <&usb_ctrl_mod>;
+ };
+
+ usb1: usb@47401800 {
+ compatible = "ti,musb-am33xx";
+ status = "disabled";
+ reg = <0x47401c00 0x400
+ 0x47401800 0x200>;
+ reg-names = "mc", "control";
+ interrupts = <19>;
+ interrupt-names = "mc";
+ dr_mode = "otg";
+ mentor,multipoint = <1>;
+ mentor,num-eps = <16>;
+ mentor,ram-bits = <12>;
+ mentor,power = <500>;
+ phys = <&usb1_phy>;
+
+ dmas = <&cppi41dma 15 0 &cppi41dma 16 0
+ &cppi41dma 17 0 &cppi41dma 18 0
+ &cppi41dma 19 0 &cppi41dma 20 0
+ &cppi41dma 21 0 &cppi41dma 22 0
+ &cppi41dma 23 0 &cppi41dma 24 0
+ &cppi41dma 25 0 &cppi41dma 26 0
+ &cppi41dma 27 0 &cppi41dma 28 0
+ &cppi41dma 29 0 &cppi41dma 15 1
+ &cppi41dma 16 1 &cppi41dma 17 1
+ &cppi41dma 18 1 &cppi41dma 19 1
+ &cppi41dma 20 1 &cppi41dma 21 1
+ &cppi41dma 22 1 &cppi41dma 23 1
+ &cppi41dma 24 1 &cppi41dma 25 1
+ &cppi41dma 26 1 &cppi41dma 27 1
+ &cppi41dma 28 1 &cppi41dma 29 1>;
+ dma-names =
+ "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+ "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
+ "rx14", "rx15",
+ "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
+ "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
+ "tx14", "tx15";
+ };
+
+ cppi41dma: dma-controller@07402000 {
+ compatible = "ti,am3359-cppi41";
+ reg = <0x47400000 0x1000
+ 0x47402000 0x1000
+ 0x47403000 0x1000
+ 0x47404000 0x4000>;
+ reg-names = "glue", "controller", "scheduler", "queuemgr";
+ interrupts = <17>;
+ interrupt-names = "glue";
+ #dma-cells = <2>;
+ #dma-channels = <30>;
+ #dma-requests = <256>;
+ status = "disabled";
+ };
+ };
+
+ epwmss0: epwmss@48300000 {
+ compatible = "ti,am33xx-pwmss";
+ reg = <0x48300000 0x10>;
+ ti,hwmods = "epwmss0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48300100 0x48300100 0x80 /* ECAP */
+ 0x48300180 0x48300180 0x80 /* EQEP */
+ 0x48300200 0x48300200 0x80>; /* EHRPWM */
+
+ ecap0: ecap@48300100 {
+ compatible = "ti,am33xx-ecap";
+ #pwm-cells = <3>;
+ reg = <0x48300100 0x80>;
+ ti,hwmods = "ecap0";
+ status = "disabled";
+ };
+
+ ehrpwm0: ehrpwm@48300200 {
+ compatible = "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48300200 0x80>;
+ ti,hwmods = "ehrpwm0";
+ status = "disabled";
+ };
+ };
+
+ epwmss1: epwmss@48302000 {
+ compatible = "ti,am33xx-pwmss";
+ reg = <0x48302000 0x10>;
+ ti,hwmods = "epwmss1";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48302100 0x48302100 0x80 /* ECAP */
+ 0x48302180 0x48302180 0x80 /* EQEP */
+ 0x48302200 0x48302200 0x80>; /* EHRPWM */
+
+ ecap1: ecap@48302100 {
+ compatible = "ti,am33xx-ecap";
+ #pwm-cells = <3>;
+ reg = <0x48302100 0x80>;
+ ti,hwmods = "ecap1";
+ status = "disabled";
+ };
+
+ ehrpwm1: ehrpwm@48302200 {
+ compatible = "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48302200 0x80>;
+ ti,hwmods = "ehrpwm1";
+ status = "disabled";
+ };
+ };
+
+ epwmss2: epwmss@48304000 {
+ compatible = "ti,am33xx-pwmss";
+ reg = <0x48304000 0x10>;
+ ti,hwmods = "epwmss2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48304100 0x48304100 0x80 /* ECAP */
+ 0x48304180 0x48304180 0x80 /* EQEP */
+ 0x48304200 0x48304200 0x80>; /* EHRPWM */
+
+ ecap2: ecap@48304100 {
+ compatible = "ti,am33xx-ecap";
+ #pwm-cells = <3>;
+ reg = <0x48304100 0x80>;
+ ti,hwmods = "ecap2";
+ status = "disabled";
+ };
+
+ ehrpwm2: ehrpwm@48304200 {
+ compatible = "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48304200 0x80>;
+ ti,hwmods = "ehrpwm2";
+ status = "disabled";
+ };
+ };
+
+ mac: ethernet@4a100000 {
+ compatible = "ti,cpsw";
+ ti,hwmods = "cpgmac0";
+ cpdma_channels = <8>;
+ ale_entries = <1024>;
+ bd_ram_size = <0x2000>;
+ no_bd_ram = <0>;
+ rx_descs = <64>;
+ mac_control = <0x20>;
+ slaves = <2>;
+ active_slave = <0>;
+ cpts_clock_mult = <0x80000000>;
+ cpts_clock_shift = <29>;
+ reg = <0x4a100000 0x800
+ 0x4a101200 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+ /*
+ * c0_rx_thresh_pend
+ * c0_rx_pend
+ * c0_tx_pend
+ * c0_misc_pend
+ */
+ interrupts = <40 41 42 43>;
+ ranges;
+
+ davinci_mdio: mdio@4a101000 {
+ compatible = "ti,davinci_mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "davinci_mdio";
+ bus_freq = <1000000>;
+ reg = <0x4a101000 0x100>;
+ };
+
+ cpsw_emac0: slave@4a100200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave@4a100300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ phy_sel: cpsw-phy-sel@44e10650 {
+ compatible = "ti,am3352-cpsw-phy-sel";
+ reg= <0x44e10650 0x4>;
+ reg-names = "gmii-sel";
+ };
+ };
+
+ ocmcram: ocmcram@40300000 {
+ compatible = "ti,am3352-ocmcram";
+ reg = <0x40300000 0x10000>;
+ ti,hwmods = "ocmcram";
+ };
+
+ wkup_m3: wkup_m3@44d00000 {
+ compatible = "ti,am3353-wkup-m3";
+ reg = <0x44d00000 0x4000 /* M3 UMEM */
+ 0x44d80000 0x2000>; /* M3 DMEM */
+ ti,hwmods = "wkup_m3";
+ ti,no-reset-on-init;
+ };
+
+ elm: elm@48080000 {
+ compatible = "ti,am3352-elm";
+ reg = <0x48080000 0x2000>;
+ interrupts = <4>;
+ ti,hwmods = "elm";
+ status = "disabled";
+ };
+
+ lcdc: lcdc@4830e000 {
+ compatible = "ti,am33xx-tilcdc";
+ reg = <0x4830e000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <36>;
+ ti,hwmods = "lcdc";
+ status = "disabled";
+ };
+
+ tscadc: tscadc@44e0d000 {
+ compatible = "ti,am3359-tscadc";
+ reg = <0x44e0d000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <16>;
+ ti,hwmods = "adc_tsc";
+ status = "disabled";
+
+ tsc {
+ compatible = "ti,am3359-tsc";
+ };
+ am335x_adc: adc {
+ #io-channel-cells = <1>;
+ compatible = "ti,am3359-adc";
+ };
+ };
+
+ gpmc: gpmc@50000000 {
+ compatible = "ti,am3352-gpmc";
+ ti,hwmods = "gpmc";
+ ti,no-idle-on-init;
+ reg = <0x50000000 0x2000>;
+ interrupts = <100>;
+ gpmc,num-cs = <7>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ status = "disabled";
+ };
+
+ sham: sham@53100000 {
+ compatible = "ti,omap4-sham";
+ ti,hwmods = "sham";
+ reg = <0x53100000 0x200>;
+ interrupts = <109>;
+ dmas = <&edma 36>;
+ dma-names = "rx";
+ };
+
+ aes: aes@53500000 {
+ compatible = "ti,omap4-aes";
+ ti,hwmods = "aes";
+ reg = <0x53500000 0xa0>;
+ interrupts = <103>;
+ dmas = <&edma 6>,
+ <&edma 5>;
+ dma-names = "tx", "rx";
+ };
+
+ mcasp0: mcasp@48038000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ ti,hwmods = "mcasp0";
+ reg = <0x48038000 0x2000>,
+ <0x46000000 0x400000>;
+ reg-names = "mpu", "dat";
+ interrupts = <80>, <81>;
+ interrupts-names = "tx", "rx";
+ status = "disabled";
+ dmas = <&edma 8>,
+ <&edma 9>;
+ dma-names = "tx", "rx";
+ };
+
+ mcasp1: mcasp@4803C000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ ti,hwmods = "mcasp1";
+ reg = <0x4803C000 0x2000>,
+ <0x46400000 0x400000>;
+ reg-names = "mpu", "dat";
+ interrupts = <82>, <83>;
+ interrupts-names = "tx", "rx";
+ status = "disabled";
+ dmas = <&edma 10>,
+ <&edma 11>;
+ dma-names = "tx", "rx";
+ };
+
+ rng: rng@48310000 {
+ compatible = "ti,omap4-rng";
+ ti,hwmods = "rng";
+ reg = <0x48310000 0x2000>;
+ interrupts = <111>;
+ };
+ };
+};
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 10/16] ARM: am335x: Add reg-shift property to uarts
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (8 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 09/16] ARM: Add am33xx SoC dtsi file Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 11/16] ARM: dts: AM33xx: Add gpio aliases Sascha Hauer
` (5 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Since we use the generic ns16550 driver we need the regshift property
to correcty access the UART.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/am33xx.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index f6d8ffe..a9ca40c 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -171,6 +171,7 @@
ti,hwmods = "uart1";
clock-frequency = <48000000>;
reg = <0x44e09000 0x2000>;
+ reg-shift = <2>;
interrupts = <72>;
status = "disabled";
};
@@ -180,6 +181,7 @@
ti,hwmods = "uart2";
clock-frequency = <48000000>;
reg = <0x48022000 0x2000>;
+ reg-shift = <2>;
interrupts = <73>;
status = "disabled";
};
@@ -189,6 +191,7 @@
ti,hwmods = "uart3";
clock-frequency = <48000000>;
reg = <0x48024000 0x2000>;
+ reg-shift = <2>;
interrupts = <74>;
status = "disabled";
};
@@ -198,6 +201,7 @@
ti,hwmods = "uart4";
clock-frequency = <48000000>;
reg = <0x481a6000 0x2000>;
+ reg-shift = <2>;
interrupts = <44>;
status = "disabled";
};
@@ -207,6 +211,7 @@
ti,hwmods = "uart5";
clock-frequency = <48000000>;
reg = <0x481a8000 0x2000>;
+ reg-shift = <2>;
interrupts = <45>;
status = "disabled";
};
@@ -216,6 +221,7 @@
ti,hwmods = "uart6";
clock-frequency = <48000000>;
reg = <0x481aa000 0x2000>;
+ reg-shift = <2>;
interrupts = <46>;
status = "disabled";
};
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 11/16] ARM: dts: AM33xx: Add gpio aliases
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (9 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 10/16] ARM: am335x: Add reg-shift property to uarts Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 12/16] ARM: am33xx: Add am33xx_ prefix to SoC specific functions Sascha Hauer
` (4 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
barebox depends on these to number the gpio banks correctly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/am33xx.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index a9ca40c..1f1339f 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -18,6 +18,10 @@
interrupt-parent = <&intc>;
aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 12/16] ARM: am33xx: Add am33xx_ prefix to SoC specific functions
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (10 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 11/16] ARM: dts: AM33xx: Add gpio aliases Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 13/16] ARM: OMAP: Make debug_ll UART Kconfig selectable Sascha Hauer
` (3 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/beaglebone/lowlevel.c | 4 ++--
arch/arm/boards/pcm051/lowlevel.c | 2 +-
arch/arm/mach-omap/am33xx_clock.c | 4 ++--
arch/arm/mach-omap/am33xx_generic.c | 2 +-
arch/arm/mach-omap/include/mach/am33xx-clock.h | 4 ++--
5 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
index 1f2b833..a4d3232 100644
--- a/arch/arm/boards/beaglebone/lowlevel.c
+++ b/arch/arm/boards/beaglebone/lowlevel.c
@@ -126,11 +126,11 @@ static int beaglebone_board_init(void)
/* Setup the PLLs and the clocks for the peripherals */
if (is_beaglebone_black()) {
- pll_init(MPUPLL_M_500, 24, DDRPLL_M_400);
+ am33xx_pll_init(MPUPLL_M_500, 24, DDRPLL_M_400);
am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs,
&ddr3_data);
} else {
- pll_init(MPUPLL_M_500, 24, DDRPLL_M_266);
+ am33xx_pll_init(MPUPLL_M_500, 24, DDRPLL_M_266);
am335x_sdram_init(0x18B, &ddr2_cmd_ctrl, &ddr2_regs,
&ddr2_data);
}
diff --git a/arch/arm/boards/pcm051/lowlevel.c b/arch/arm/boards/pcm051/lowlevel.c
index 0a55ad7..ded108e 100644
--- a/arch/arm/boards/pcm051/lowlevel.c
+++ b/arch/arm/boards/pcm051/lowlevel.c
@@ -68,7 +68,7 @@ static int pcm051_board_init(void)
if (am33xx_running_in_sdram())
return 0;
- pll_init(MPUPLL_M_600, 25, DDRPLL_M_303);
+ am33xx_pll_init(MPUPLL_M_600, 25, DDRPLL_M_303);
am335x_sdram_init(0x18B, &MT41J256M8HX15E_2x256M8_cmd,
&MT41J256M8HX15E_2x256M8_regs,
diff --git a/arch/arm/mach-omap/am33xx_clock.c b/arch/arm/mach-omap/am33xx_clock.c
index 692b0ec..9105ddc 100644
--- a/arch/arm/mach-omap/am33xx_clock.c
+++ b/arch/arm/mach-omap/am33xx_clock.c
@@ -276,7 +276,7 @@ static void ddr_pll_config(int osc, int ddrpll_M)
while ((__raw_readl(CM_IDLEST_DPLL_DDR) & 0x00000001) != 0x1);
}
-void enable_ddr_clocks(void)
+void am33xx_enable_ddr_clocks(void)
{
/* Enable the EMIF_FW Functional clock */
__raw_writel(PRCM_MOD_EN, CM_PER_EMIF_FW_CLKCTRL);
@@ -293,7 +293,7 @@ void enable_ddr_clocks(void)
/*
* Configure the PLL/PRCM for necessary peripherals
*/
-void pll_init(int mpupll_M, int osc, int ddrpll_M)
+void am33xx_pll_init(int mpupll_M, int osc, int ddrpll_M)
{
mpu_pll_config(mpupll_M, osc);
core_pll_config(osc);
diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
index 864f210..4e81fcd 100644
--- a/arch/arm/mach-omap/am33xx_generic.c
+++ b/arch/arm/mach-omap/am33xx_generic.c
@@ -337,7 +337,7 @@ void am335x_sdram_init(int ioctrl, const struct am33xx_cmd_control *cmd_ctrl,
{
uint32_t val;
- enable_ddr_clocks();
+ am33xx_enable_ddr_clocks();
am33xx_config_vtp();
diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h
index ecd90b2..65fbed6 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-clock.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h
@@ -184,7 +184,7 @@
#define CM_ALWON_GPMC_CLKCTRL CM_PER_GPMC_CLKCTRL
-extern void pll_init(int mpupll_M, int osc, int ddrpll_M);
-extern void enable_ddr_clocks(void);
+void am33xx_pll_init(int mpupll_M, int osc, int ddrpll_M);
+void am33xx_enable_ddr_clocks(void);
#endif /* endif _AM33XX_CLOCKS_H_ */
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 13/16] ARM: OMAP: Make debug_ll UART Kconfig selectable
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (11 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 12/16] ARM: am33xx: Add am33xx_ prefix to SoC specific functions Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 14/16] ARM: OMAP: centralize omap startup Sascha Hauer
` (2 subsequent siblings)
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/beaglebone/lowlevel.c | 2 +-
arch/arm/mach-omap/include/mach/debug_ll.h | 71 +++++++++++++++---------------
common/Kconfig | 34 ++++++++++++++
3 files changed, 70 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
index a4d3232..992e3e4 100644
--- a/arch/arm/boards/beaglebone/lowlevel.c
+++ b/arch/arm/boards/beaglebone/lowlevel.c
@@ -137,7 +137,7 @@ static int beaglebone_board_init(void)
am33xx_uart0_soft_reset();
am33xx_enable_uart0_pin_mux();
- omap_uart_lowlevel_init();
+ omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
putc_ll('>');
return 0;
diff --git a/arch/arm/mach-omap/include/mach/debug_ll.h b/arch/arm/mach-omap/include/mach/debug_ll.h
index 2917558..25ddd48 100644
--- a/arch/arm/mach-omap/include/mach/debug_ll.h
+++ b/arch/arm/mach-omap/include/mach/debug_ll.h
@@ -18,31 +18,9 @@
#define __MACH_DEBUG_LL_H__
#include <io.h>
-
-#ifdef CONFIG_ARCH_OMAP3
#include <mach/omap3-silicon.h>
-
-#ifdef CONFIG_OMAP_UART1
-#define UART_BASE OMAP3_UART1_BASE
-#else
-#define UART_BASE OMAP3_UART3_BASE
-#endif
-
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
#include <mach/omap4-silicon.h>
-#ifdef CONFIG_OMAP_UART1
-#define UART_BASE OMAP44XX_UART1_BASE
-#else
-#define UART_BASE OMAP44XX_UART3_BASE
-#endif
-#endif
-
-#ifdef CONFIG_ARCH_AM33XX
#include <mach/am33xx-silicon.h>
-#define UART_BASE AM33XX_UART0_BASE
-#endif
#define LSR_THRE 0x20 /* Xmit holding register empty */
#define LCR_BKSE 0x80 /* Bank select enable */
@@ -56,26 +34,47 @@
#define MCR (4 << 2)
#define MDR (8 << 2)
-static inline void omap_uart_lowlevel_init(void)
+static inline void omap_uart_lowlevel_init(void __iomem *base)
{
- writeb(0x00, UART_BASE + LCR);
- writeb(0x00, UART_BASE + IER);
- writeb(0x07, UART_BASE + MDR);
- writeb(LCR_BKSE, UART_BASE + LCR);
- writeb(26, UART_BASE + DLL); /* 115200 */
- writeb(0, UART_BASE + DLM);
- writeb(0x03, UART_BASE + LCR);
- writeb(0x03, UART_BASE + MCR);
- writeb(0x07, UART_BASE + FCR);
- writeb(0x00, UART_BASE + MDR);
+ writeb(0x00, base + LCR);
+ writeb(0x00, base + IER);
+ writeb(0x07, base + MDR);
+ writeb(LCR_BKSE, base + LCR);
+ writeb(26, base + DLL); /* 115200 */
+ writeb(0, base + DLM);
+ writeb(0x03, base + LCR);
+ writeb(0x03, base + MCR);
+ writeb(0x07, base + FCR);
+ writeb(0x00, base + MDR);
}
+
+#ifdef CONFIG_DEBUG_LL
+
+#ifdef CONFIG_DEBUG_OMAP3_UART
+#define OMAP_DEBUG_SOC OMAP3
+#elif defined CONFIG_DEBUG_OMAP4_UART
+#define OMAP_DEBUG_SOC OMAP44XX
+#elif defined CONFIG_DEBUG_AM33XX_UART
+#define OMAP_DEBUG_SOC AM33XX
+#else
+#error "unknown OMAP debug uart soc type"
+#endif
+
+#define __OMAP_UART_BASE(soc, num) soc##_UART##num##_BASE
+#define OMAP_UART_BASE(soc, num) __OMAP_UART_BASE(soc, num)
+
static inline void PUTC_LL(char c)
{
+ void __iomem *base = (void *)OMAP_UART_BASE(OMAP_DEBUG_SOC,
+ CONFIG_DEBUG_OMAP_UART_PORT);
+
/* Wait until there is space in the FIFO */
- while ((readb(UART_BASE + LSR) & LSR_THRE) == 0);
+ while ((readb(base + LSR) & LSR_THRE) == 0);
/* Send the character */
- writeb(c, UART_BASE + THR);
+ writeb(c, base + THR);
/* Wait to make sure it hits the line, in case we die too soon. */
- while ((readb(UART_BASE + LSR) & LSR_THRE) == 0);
+ while ((readb(base + LSR) & LSR_THRE) == 0);
}
#endif
+
+#endif
diff --git a/common/Kconfig b/common/Kconfig
index 06edbc2..8fd23aa 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -746,6 +746,27 @@ config DEBUG_IMX6Q_UART
Say Y here if you want kernel low-level debugging support
on i.MX6Q.
+config DEBUG_OMAP3_UART
+ bool "OMAP3 Debug UART"
+ depends on ARCH_OMAP3
+ help
+ Say Y here if you want kernel low-level debugging support
+ on OMAP3.
+
+config DEBUG_OMAP4_UART
+ bool "OMAP4 Debug UART"
+ depends on ARCH_OMAP4
+ help
+ Say Y here if you want kernel low-level debugging support
+ on OMAP4.
+
+config DEBUG_AM33XX_UART
+ bool "AM33XX Debug UART"
+ depends on ARCH_AM33XX
+ help
+ Say Y here if you want kernel low-level debugging support
+ on AM33XX.
+
endchoice
config DEBUG_IMX_UART_PORT
@@ -765,6 +786,19 @@ config DEBUG_IMX_UART_PORT
Choose UART port on which kernel low-level debug messages
should be output.
+config DEBUG_OMAP_UART_PORT
+ int "OMAP Debug UART Port Selection" if DEBUG_OMAP3_UART || \
+ DEBUG_OMAP4_UART || \
+ DEBUG_AM33XX_UART
+ default 1
+ depends on ARCH_OMAP
+ help
+ Choose UART port on which kernel low-level debug messages
+ should be output. Possible values are:
+ OMAP3: 1 - 3
+ OMAP4: 1 - 3
+ AM33XX: 0 - 2
+
config DEBUG_INITCALLS
bool "Trace initcalls"
help
--
1.8.4.2
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 14/16] ARM: OMAP: centralize omap startup
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (12 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 13/16] ARM: OMAP: Make debug_ll UART Kconfig selectable Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 14:54 ` [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell Sascha Hauer
2013-11-22 14:54 ` [PATCH 16/16] ARM: OMAP: let UART selection depend on its only user Sascha Hauer
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
This introduces a single omap_init function which detects the
SoC and does all further SoC initialization. This is done to get
rid of initcalls without proper SoC protection. The same has been
done for i.MX already.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/am33xx_generic.c | 14 ++++++-
arch/arm/mach-omap/gpmc.c | 17 +-------
arch/arm/mach-omap/include/mach/am33xx-generic.h | 3 ++
arch/arm/mach-omap/include/mach/omap3-generic.h | 3 ++
arch/arm/mach-omap/include/mach/omap4-generic.h | 3 ++
arch/arm/mach-omap/omap3_generic.c | 14 ++++++-
arch/arm/mach-omap/omap4_generic.c | 17 +++++++-
arch/arm/mach-omap/omap_generic.c | 49 ++++++++++++++++++++++++
8 files changed, 98 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
index 4e81fcd..68dc933 100644
--- a/arch/arm/mach-omap/am33xx_generic.c
+++ b/arch/arm/mach-omap/am33xx_generic.c
@@ -147,7 +147,6 @@ static int am33xx_bootsource(void)
bootsource_set_instance(instance);
return 0;
}
-postcore_initcall(am33xx_bootsource);
int am33xx_register_ethaddr(int eth_id, int mac_id)
{
@@ -199,7 +198,18 @@ static int am33xx_gpio_init(void)
0xf00, IORESOURCE_MEM, NULL);
return 0;
}
-coredevice_initcall(am33xx_gpio_init);
+
+int am33xx_init(void)
+{
+ omap_gpmc_base = (void *)AM33XX_GPMC_BASE;
+
+ return am33xx_bootsource();
+}
+
+int am33xx_devices_init(void)
+{
+ return am33xx_gpio_init();
+}
/* UART Defines */
#define UART_SYSCFG_OFFSET 0x54
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index bb84b38..630351b 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -30,25 +30,10 @@
#include <mach/gpmc.h>
#include <mach/sys_info.h>
#include <mach/syslib.h>
+#include <mach/generic.h>
void __iomem *omap_gpmc_base;
-static int gpmc_init(void)
-{
-#if defined(CONFIG_ARCH_OMAP3)
- omap_gpmc_base = (void *)OMAP3_GPMC_BASE;
-#elif defined(CONFIG_ARCH_OMAP4)
- omap_gpmc_base = (void *)OMAP44XX_GPMC_BASE;
-#elif defined(CONFIG_ARCH_AM33XX)
- omap_gpmc_base = (void *)AM33XX_GPMC_BASE;
-#else
-#error "Unknown ARCH"
-#endif
-
- return 0;
-}
-pure_initcall(gpmc_init);
-
/**
* @brief Do a Generic initialization of GPMC. if you choose otherwise,
* Use gpmc registers to modify the values. The defaults configured are:
diff --git a/arch/arm/mach-omap/include/mach/am33xx-generic.h b/arch/arm/mach-omap/include/mach/am33xx-generic.h
index ed77b64..e74a666 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-generic.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-generic.h
@@ -28,4 +28,7 @@ u32 am33xx_running_in_sdram(void);
void __noreturn am33xx_reset_cpu(unsigned long addr);
+int am33xx_init(void);
+int am33xx_devices_init(void);
+
#endif /* __MACH_AM33XX_GENERIC_H */
diff --git a/arch/arm/mach-omap/include/mach/omap3-generic.h b/arch/arm/mach-omap/include/mach/omap3-generic.h
index c847bfa..2210d87 100644
--- a/arch/arm/mach-omap/include/mach/omap3-generic.h
+++ b/arch/arm/mach-omap/include/mach/omap3-generic.h
@@ -25,4 +25,7 @@ u32 omap3_running_in_sdram(void);
void __noreturn omap3_reset_cpu(unsigned long addr);
+int omap3_init(void);
+int omap3_devices_init(void);
+
#endif /* __MACH_OMAP3_GENERIC_H */
diff --git a/arch/arm/mach-omap/include/mach/omap4-generic.h b/arch/arm/mach-omap/include/mach/omap4-generic.h
index 06bc031..85c92e1 100644
--- a/arch/arm/mach-omap/include/mach/omap4-generic.h
+++ b/arch/arm/mach-omap/include/mach/omap4-generic.h
@@ -20,4 +20,7 @@ static inline void omap4_save_bootinfo(uint32_t *info)
void __noreturn omap4_reset_cpu(unsigned long addr);
+int omap4_init(void);
+int omap4_devices_init(void);
+
#endif /* __MACH_OMAP4_GENERIC_H */
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index e53b363..d36d63b 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -489,7 +489,13 @@ static int omap3_bootsource(void)
return 0;
}
-postcore_initcall(omap3_bootsource);
+
+int omap3_init(void)
+{
+ omap_gpmc_base = (void *)OMAP3_GPMC_BASE;
+
+ return omap3_bootsource();
+}
/* GPMC timing for OMAP3 nand device */
const struct gpmc_config omap3_nand_cfg = {
@@ -525,5 +531,9 @@ static int omap3_gpio_init(void)
return 0;
}
-coredevice_initcall(omap3_gpio_init);
+
+int omap3_devices_init(void)
+{
+ return omap3_gpio_init();
+}
#endif
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index 58051a3..3acbcaa 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -470,6 +470,9 @@ static int watchdog_init(void)
{
void __iomem *wd2_base = (void *)OMAP44XX_WDT2_BASE;
+ if (!cpu_is_omap4())
+ return 0;
+
writel(WD_UNLOCK1, wd2_base + WATCHDOG_WSPR);
wait_for_command_complete();
writel(WD_UNLOCK2, wd2_base + WATCHDOG_WSPR);
@@ -526,7 +529,13 @@ static int omap4_bootsource(void)
return 0;
}
-core_initcall(omap4_bootsource);
+
+int omap4_init(void)
+{
+ omap_gpmc_base = (void *)OMAP44XX_GPMC_BASE;
+
+ return omap4_bootsource();
+}
#define GPIO_MASK 0x1f
@@ -670,4 +679,8 @@ static int omap4_gpio_init(void)
return 0;
}
-coredevice_initcall(omap4_gpio_init);
+
+int omap4_devices_init(void)
+{
+ return omap4_gpio_init();
+}
diff --git a/arch/arm/mach-omap/omap_generic.c b/arch/arm/mach-omap/omap_generic.c
index b999ea4..581e710 100644
--- a/arch/arm/mach-omap/omap_generic.c
+++ b/arch/arm/mach-omap/omap_generic.c
@@ -147,3 +147,52 @@ void __noreturn reset_cpu(unsigned long addr)
am33xx_reset_cpu(addr);
while (1);
}
+
+static int omap_soc_from_dt(void)
+{
+ if (of_machine_is_compatible("ti,am33xx"))
+ return OMAP_CPU_AM33XX;
+ if (of_machine_is_compatible("ti,omap4"))
+ return OMAP_CPU_OMAP4;
+ if (of_machine_is_compatible("ti,omap3"))
+ return OMAP_CPU_OMAP3;
+
+ return 0;
+}
+
+static int omap_init(void)
+{
+ int ret;
+ struct device_node *root;
+
+ root = of_get_root_node();
+ if (root) {
+ __omap_cpu_type = omap_soc_from_dt();
+ if (!__omap_cpu_type)
+ hang();
+ }
+
+ if (cpu_is_omap3())
+ ret = omap3_init();
+ else if (cpu_is_omap4())
+ ret = omap4_init();
+ else if (cpu_is_am33xx())
+ ret = am33xx_init();
+ else
+ return -EINVAL;
+
+ if (root)
+ return ret;
+
+ if (cpu_is_omap3())
+ ret = omap3_devices_init();
+ else if (cpu_is_omap4())
+ ret = omap4_devices_init();
+ else if (cpu_is_am33xx())
+ ret = am33xx_devices_init();
+ else
+ return -EINVAL;
+
+ return ret;
+}
+postcore_initcall(omap_init);
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (13 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 14/16] ARM: OMAP: centralize omap startup Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
2013-11-22 18:23 ` [SPAM] " Jean-Christophe PLAGNIOL-VILLARD
2013-11-22 14:54 ` [PATCH 16/16] ARM: OMAP: let UART selection depend on its only user Sascha Hauer
15 siblings, 1 reply; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
This is necessary for successful pbl compilation on am33xx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index cf2d5ee..ed44cb8 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
+pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
pbl-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 16/16] ARM: OMAP: let UART selection depend on its only user
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
` (14 preceding siblings ...)
2013-11-22 14:54 ` [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell Sascha Hauer
@ 2013-11-22 14:54 ` Sascha Hauer
15 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 14:54 UTC (permalink / raw)
To: barebox
The UART selection is only meaningful to omap3evm, so hide it
from other users.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-omap/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 79e75d8..3d680ac 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -188,6 +188,7 @@ if ARCH_OMAP
choice
prompt "Select UART"
default OMAP_UART3
+ depends on MACH_OMAP3EVM
config OMAP_UART1
bool "Use UART1"
--
1.8.4.2
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-22 14:54 ` [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell Sascha Hauer
@ 2013-11-22 18:23 ` Jean-Christophe PLAGNIOL-VILLARD
2013-11-22 18:35 ` Sascha Hauer
0 siblings, 1 reply; 24+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-11-22 18:23 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> This is necessary for successful pbl compilation on am33xx.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> arch/arm/mach-omap/Makefile | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> index cf2d5ee..ed44cb8 100644
> --- a/arch/arm/mach-omap/Makefile
> +++ b/arch/arm/mach-omap/Makefile
> @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
so use lwl-
> obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
> pbl-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
> obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
> --
> 1.8.4.2
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-22 18:23 ` [SPAM] " Jean-Christophe PLAGNIOL-VILLARD
@ 2013-11-22 18:35 ` Sascha Hauer
2013-11-22 18:41 ` Alexander Aring
2013-11-23 14:54 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 2 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 18:35 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD; +Cc: barebox
On Fri, Nov 22, 2013 at 07:23:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> > This is necessary for successful pbl compilation on am33xx.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > ---
> > arch/arm/mach-omap/Makefile | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> > index cf2d5ee..ed44cb8 100644
> > --- a/arch/arm/mach-omap/Makefile
> > +++ b/arch/arm/mach-omap/Makefile
> > @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> > obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> so use lwl-
Some functions are just in the regular binary, others in pbl. It's
really needed twice.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-22 18:35 ` Sascha Hauer
@ 2013-11-22 18:41 ` Alexander Aring
2013-11-22 20:30 ` Sascha Hauer
2013-11-23 14:54 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 24+ messages in thread
From: Alexander Aring @ 2013-11-22 18:41 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On Fri, Nov 22, 2013 at 07:35:19PM +0100, Sascha Hauer wrote:
> On Fri, Nov 22, 2013 at 07:23:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> > > This is necessary for successful pbl compilation on am33xx.
> > >
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > ---
> > > arch/arm/mach-omap/Makefile | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> > > index cf2d5ee..ed44cb8 100644
> > > --- a/arch/arm/mach-omap/Makefile
> > > +++ b/arch/arm/mach-omap/Makefile
> > > @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> > > obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > so use lwl-
>
> Some functions are just in the regular binary, others in pbl. It's
> really needed twice.
>
Sorry for my question, but what exactly do "lwl-"?
I suppose something with "lowlevel..."
- Alex
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-22 18:41 ` Alexander Aring
@ 2013-11-22 20:30 ` Sascha Hauer
0 siblings, 0 replies; 24+ messages in thread
From: Sascha Hauer @ 2013-11-22 20:30 UTC (permalink / raw)
To: Alexander Aring; +Cc: barebox
On Fri, Nov 22, 2013 at 07:41:30PM +0100, Alexander Aring wrote:
> On Fri, Nov 22, 2013 at 07:35:19PM +0100, Sascha Hauer wrote:
> > On Fri, Nov 22, 2013 at 07:23:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> > > > This is necessary for successful pbl compilation on am33xx.
> > > >
> > > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > > ---
> > > > arch/arm/mach-omap/Makefile | 1 +
> > > > 1 file changed, 1 insertion(+)
> > > >
> > > > diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> > > > index cf2d5ee..ed44cb8 100644
> > > > --- a/arch/arm/mach-omap/Makefile
> > > > +++ b/arch/arm/mach-omap/Makefile
> > > > @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> > > > obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > > pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > > obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > > +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > so use lwl-
> >
> > Some functions are just in the regular binary, others in pbl. It's
> > really needed twice.
> >
> Sorry for my question, but what exactly do "lwl-"?
>
> I suppose something with "lowlevel..."
lwl-y expands to pbl-y if pbl is enabled or to obj-y if it's disabled.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-22 18:35 ` Sascha Hauer
2013-11-22 18:41 ` Alexander Aring
@ 2013-11-23 14:54 ` Jean-Christophe PLAGNIOL-VILLARD
2013-11-25 8:13 ` Sascha Hauer
1 sibling, 1 reply; 24+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-11-23 14:54 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On 19:35 Fri 22 Nov , Sascha Hauer wrote:
> On Fri, Nov 22, 2013 at 07:23:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> > > This is necessary for successful pbl compilation on am33xx.
> > >
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > ---
> > > arch/arm/mach-omap/Makefile | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> > > index cf2d5ee..ed44cb8 100644
> > > --- a/arch/arm/mach-omap/Makefile
> > > +++ b/arch/arm/mach-omap/Makefile
> > > @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> > > obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > so use lwl-
>
> Some functions are just in the regular binary, others in pbl. It's
> really needed twice.
I hate duplicated code
can you add a obj-pbl-y support for this instead of duplicating?
Best Regards,
J.
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-23 14:54 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2013-11-25 8:13 ` Sascha Hauer
2013-11-25 15:59 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 24+ messages in thread
From: Sascha Hauer @ 2013-11-25 8:13 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD; +Cc: barebox
On Sat, Nov 23, 2013 at 03:54:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 19:35 Fri 22 Nov , Sascha Hauer wrote:
> > On Fri, Nov 22, 2013 at 07:23:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> > > > This is necessary for successful pbl compilation on am33xx.
> > > >
> > > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > > ---
> > > > arch/arm/mach-omap/Makefile | 1 +
> > > > 1 file changed, 1 insertion(+)
> > > >
> > > > diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> > > > index cf2d5ee..ed44cb8 100644
> > > > --- a/arch/arm/mach-omap/Makefile
> > > > +++ b/arch/arm/mach-omap/Makefile
> > > > @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> > > > obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > > pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > > obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > > +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > so use lwl-
> >
> > Some functions are just in the regular binary, others in pbl. It's
> > really needed twice.
>
> I hate duplicated code
>
> can you add a obj-pbl-y support for this instead of duplicating?
Just changed that to this:
From 2155ed411eccde1bff809d00fd89bfe5ae6d2020 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Mon, 25 Nov 2013 08:43:42 +0100
Subject: [PATCH] Make: introduce obj-pbl-y
For compiling object files both in the regular binary and the pbl.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
scripts/Makefile.lib | 3 +++
1 file changed, 3 insertions(+)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 3ff094f..6ccf572 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -29,6 +29,9 @@ else
obj-y += $(lwl-y)
endif
+obj-y += $(obj-pbl-y)
+pbl-y += $(obj-pbl-y)
+
# for non dirs add pbl- prefix to the target
# so we recompile the source with custom flags and custom quiet
__pbl-y := $(notdir $(pbl-y))
--
1.8.4.2
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [SPAM] [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell
2013-11-25 8:13 ` Sascha Hauer
@ 2013-11-25 15:59 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 24+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-11-25 15:59 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On 09:13 Mon 25 Nov , Sascha Hauer wrote:
> On Sat, Nov 23, 2013 at 03:54:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 19:35 Fri 22 Nov , Sascha Hauer wrote:
> > > On Fri, Nov 22, 2013 at 07:23:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > On 15:54 Fri 22 Nov , Sascha Hauer wrote:
> > > > > This is necessary for successful pbl compilation on am33xx.
> > > > >
> > > > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > > > ---
> > > > > arch/arm/mach-omap/Makefile | 1 +
> > > > > 1 file changed, 1 insertion(+)
> > > > >
> > > > > diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> > > > > index cf2d5ee..ed44cb8 100644
> > > > > --- a/arch/arm/mach-omap/Makefile
> > > > > +++ b/arch/arm/mach-omap/Makefile
> > > > > @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> > > > > obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > > > pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> > > > > obj-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > > > +pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
> > > > so use lwl-
> > >
> > > Some functions are just in the regular binary, others in pbl. It's
> > > really needed twice.
> >
> > I hate duplicated code
> >
> > can you add a obj-pbl-y support for this instead of duplicating?
>
> Just changed that to this:
perfect
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
> From 2155ed411eccde1bff809d00fd89bfe5ae6d2020 Mon Sep 17 00:00:00 2001
> From: Sascha Hauer <s.hauer@pengutronix.de>
> Date: Mon, 25 Nov 2013 08:43:42 +0100
> Subject: [PATCH] Make: introduce obj-pbl-y
>
> For compiling object files both in the regular binary and the pbl.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> scripts/Makefile.lib | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> index 3ff094f..6ccf572 100644
> --- a/scripts/Makefile.lib
> +++ b/scripts/Makefile.lib
> @@ -29,6 +29,9 @@ else
> obj-y += $(lwl-y)
> endif
>
> +obj-y += $(obj-pbl-y)
> +pbl-y += $(obj-pbl-y)
> +
> # for non dirs add pbl- prefix to the target
> # so we recompile the source with custom flags and custom quiet
> __pbl-y := $(notdir $(pbl-y))
> --
> 1.8.4.2
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2013-11-25 15:57 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-11-22 14:54 OMAP: devicetree preparation patches Sascha Hauer
2013-11-22 14:54 ` [PATCH 01/16] ARM: OMAP: select SoC variant from boards Sascha Hauer
2013-11-22 14:54 ` [PATCH 02/16] ARM: OMAP: Add SoC prefix to running_in_* functions Sascha Hauer
2013-11-22 14:54 ` [PATCH 03/16] ARM: OMAP: select correct reset_cpu function at runtime Sascha Hauer
2013-11-22 14:54 ` [PATCH 04/16] ARM: OMAP: Make cpu_is_* macros runtime if necessary Sascha Hauer
2013-11-22 14:54 ` [PATCH 05/16] ARM: dtb: create dt-bindings link Sascha Hauer
2013-11-22 14:54 ` [PATCH 06/16] dt-bindings: Add gpio header file Sascha Hauer
2013-11-22 14:54 ` [PATCH 07/16] dt-bindings: Add omap/am33xx pinctrl " Sascha Hauer
2013-11-22 14:54 ` [PATCH 08/16] images: socfpga: Do not pollute Make variable namespace Sascha Hauer
2013-11-22 14:54 ` [PATCH 09/16] ARM: Add am33xx SoC dtsi file Sascha Hauer
2013-11-22 14:54 ` [PATCH 10/16] ARM: am335x: Add reg-shift property to uarts Sascha Hauer
2013-11-22 14:54 ` [PATCH 11/16] ARM: dts: AM33xx: Add gpio aliases Sascha Hauer
2013-11-22 14:54 ` [PATCH 12/16] ARM: am33xx: Add am33xx_ prefix to SoC specific functions Sascha Hauer
2013-11-22 14:54 ` [PATCH 13/16] ARM: OMAP: Make debug_ll UART Kconfig selectable Sascha Hauer
2013-11-22 14:54 ` [PATCH 14/16] ARM: OMAP: centralize omap startup Sascha Hauer
2013-11-22 14:54 ` [PATCH 15/16] ARM: am33xx: compile SoC files for pbl aswell Sascha Hauer
2013-11-22 18:23 ` [SPAM] " Jean-Christophe PLAGNIOL-VILLARD
2013-11-22 18:35 ` Sascha Hauer
2013-11-22 18:41 ` Alexander Aring
2013-11-22 20:30 ` Sascha Hauer
2013-11-23 14:54 ` Jean-Christophe PLAGNIOL-VILLARD
2013-11-25 8:13 ` Sascha Hauer
2013-11-25 15:59 ` Jean-Christophe PLAGNIOL-VILLARD
2013-11-22 14:54 ` [PATCH 16/16] ARM: OMAP: let UART selection depend on its only user Sascha Hauer
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