* [PATCH 1/9] MIPS: lib: add BAREBOX_CLK_TABLE to linker script
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 2/9] MIPS: add Atheros ar933x family support Antony Pavlov
` (8 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
This commit is based on
commit fa1a406f7245c5482a17014d5b97e8948352e5a5
Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Date: Sat Nov 9 14:24:18 2013 +0100
ARM: lib: add BAREBOX_CLK_TABLE to linker script
This adds an .oftables section right before .dtb section with
BAREBOX_CLK_TABLE to ARM linker script.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/lib/barebox.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/lib/barebox.lds.S b/arch/mips/lib/barebox.lds.S
index bc78d2b..4ee4252 100644
--- a/arch/mips/lib/barebox.lds.S
+++ b/arch/mips/lib/barebox.lds.S
@@ -69,6 +69,8 @@ SECTIONS
__usymtab : { BAREBOX_SYMS }
__usymtab_end = .;
+ .oftables : { BAREBOX_CLK_TABLE() }
+
.dtb : { BAREBOX_DTB() }
_edata = .;
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 2/9] MIPS: add Atheros ar933x family support
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
2014-03-27 21:26 ` [PATCH 1/9] MIPS: lib: add BAREBOX_CLK_TABLE to linker script Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 3/9] MIPS: ath79: add DEBUG_LL support for Atheros AR933x Antony Pavlov
` (7 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
From: Du Huanpeng <u74147@gmail.com>
Use the mach-ath79 name for compatibility with linux kernel.
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
---
arch/mips/Kconfig | 13 +++++
arch/mips/Makefile | 2 +
arch/mips/mach-ath79/Kconfig | 7 +++
arch/mips/mach-ath79/Makefile | 1 +
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 64 +++++++++++++++++++++++++
arch/mips/mach-ath79/include/mach/ath79.h | 33 +++++++++++++
arch/mips/mach-ath79/reset.c | 32 +++++++++++++
7 files changed, 152 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b819b49..521af7c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -54,6 +54,18 @@ config MACH_MIPS_AR231X
select DRIVER_SERIAL_NS16550
select HAS_DEBUG_LL
+config MACH_MIPS_ATH79
+ bool "Atheros AR71XX/AR724X/AR913X/AR933X based boards"
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select CSRC_R4K_LIB
+ select HAVE_CLK
+ select COMMON_CLK
+ select COMMON_CLK_OF_PROVIDER
+ select CLKDEV_LOOKUP
+ select OFTREE
+
config MACH_MIPS_BCM47XX
bool "Broadcom BCM47xx-based boards"
select CSRC_R4K_LIB
@@ -80,6 +92,7 @@ endchoice
source arch/mips/mach-malta/Kconfig
source arch/mips/mach-ar231x/Kconfig
+source arch/mips/mach-ath79/Kconfig
source arch/mips/mach-bcm47xx/Kconfig
source arch/mips/mach-loongson/Kconfig
source arch/mips/mach-xburst/Kconfig
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index e3d65c8..5ca5fc9 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -78,6 +78,8 @@ board-$(CONFIG_BOARD_QEMU_MALTA) := qemu-malta
machine-$(CONFIG_MACH_MIPS_AR231X) := ar231x
board-$(CONFIG_BOARD_NETGEAR_WG102) := netgear-wg102
+machine-$(CONFIG_MACH_MIPS_ATH79) := ath79
+
machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig
new file mode 100644
index 0000000..5f73e0a
--- /dev/null
+++ b/arch/mips/mach-ath79/Kconfig
@@ -0,0 +1,7 @@
+if MACH_MIPS_ATH79
+
+config ARCH_TEXT_BASE
+ hex
+ default 0xa0800000
+
+endif
diff --git a/arch/mips/mach-ath79/Makefile b/arch/mips/mach-ath79/Makefile
new file mode 100644
index 0000000..f3cc668
--- /dev/null
+++ b/arch/mips/mach-ath79/Makefile
@@ -0,0 +1 @@
+obj-y += reset.o
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
new file mode 100644
index 0000000..0c6ddd6
--- /dev/null
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -0,0 +1,64 @@
+/*
+ * Atheros AR71XX/AR724X/AR913X SoC register definitions
+ *
+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
+ * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_AR71XX_REGS_H
+#define __ASM_MACH_AR71XX_REGS_H
+
+#include <linux/bitops.h>
+
+#define AR71XX_APB_BASE 0x18000000
+
+#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
+#define AR71XX_PLL_SIZE 0x100
+#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
+#define AR71XX_RESET_SIZE 0x100
+
+#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)
+#define AR933X_UART_SIZE 0x14
+
+/*
+ * PLL block
+ */
+#define AR933X_PLL_CPU_CONFIG_REG 0x00
+#define AR933X_PLL_CPU_CONFIG2_REG 0x04
+#define AR933X_PLL_CLOCK_CTRL_REG 0x08
+#define AR933X_PLL_DITHER_FRAC_REG 0x10
+#define AR933X_PLL_DITHER_REG 0x14
+
+#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT 10
+#define AR933X_PLL_CPU_CONFIG_NINT_MASK 0x3f
+#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT 16
+#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
+#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23
+#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7
+
+#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2)
+#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5
+#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK 0x3
+#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT 10
+#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK 0x3
+#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15
+#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7
+
+/*
+ * RESET block
+ */
+#define AR933X_RESET_REG_RESET_MODULE 0x1c
+#define AR933X_RESET_REG_BOOTSTRAP 0xac
+
+#define AR71XX_RESET_FULL_CHIP BIT(24)
+
+#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
+
+#endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h
new file mode 100644
index 0000000..ff53406
--- /dev/null
+++ b/arch/mips/mach-ath79/include/mach/ath79.h
@@ -0,0 +1,33 @@
+/*
+ * Atheros AR71XX/AR724X/AR913X common definitions
+ *
+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_H
+#define __ASM_MACH_ATH79_H
+
+#include <common.h>
+#include <io.h>
+#include <asm/memory.h>
+
+#include <mach/ar71xx_regs.h>
+
+static inline void ath79_reset_wr(unsigned reg, u32 val)
+{
+ __raw_writel(val, (char *)KSEG1ADDR(AR71XX_RESET_BASE + reg));
+}
+
+static inline u32 ath79_reset_rr(unsigned reg)
+{
+ return __raw_readl((char *)KSEG1ADDR(AR71XX_RESET_BASE + reg));
+}
+
+#endif /* __ASM_MACH_ATH79_H */
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
new file mode 100644
index 0000000..a0e9b34
--- /dev/null
+++ b/arch/mips/mach-ath79/reset.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2013 Du Huanpeng <u74147@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <mach/ath79.h>
+
+void __noreturn reset_cpu(ulong addr)
+{
+ ath79_reset_wr(AR933X_RESET_REG_RESET_MODULE, AR71XX_RESET_FULL_CHIP);
+ /*
+ * Used to command a full chip reset. This is the software equivalent of
+ * pulling the reset pin. The system will reboot with PLL disabled.
+ * Always zero when read.
+ */
+ unreachable();
+ /*NOTREACHED*/
+}
+EXPORT_SYMBOL(reset_cpu);
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 3/9] MIPS: ath79: add DEBUG_LL support for Atheros AR933x
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
2014-03-27 21:26 ` [PATCH 1/9] MIPS: lib: add BAREBOX_CLK_TABLE to linker script Antony Pavlov
2014-03-27 21:26 ` [PATCH 2/9] MIPS: add Atheros ar933x family support Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 4/9] serial: add Atheros AR933x driver Antony Pavlov
` (6 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Kconfig | 1 +
arch/mips/mach-ath79/include/mach/debug_ll.h | 56 ++++++++++++++++++++++++++++
2 files changed, 57 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 521af7c..9a240b7 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -60,6 +60,7 @@ config MACH_MIPS_ATH79
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select CSRC_R4K_LIB
+ select HAS_DEBUG_LL
select HAVE_CLK
select COMMON_CLK
select COMMON_CLK_OF_PROVIDER
diff --git a/arch/mips/mach-ath79/include/mach/debug_ll.h b/arch/mips/mach-ath79/include/mach/debug_ll.h
new file mode 100644
index 0000000..de4c00d
--- /dev/null
+++ b/arch/mips/mach-ath79/include/mach/debug_ll.h
@@ -0,0 +1,56 @@
+/*
+ * based on linux.git/drivers/tty/serial/ar933x_uart.c
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __AR933X_DEBUG_LL__
+#define __AR933X_DEBUG_LL__
+
+#include <io.h>
+#include <linux/bitops.h>
+#include <asm/addrspace.h>
+
+#include <mach/ar71xx_regs.h>
+
+#define AR933X_UART_DATA_REG 0x00
+#define AR933X_UART_DATA_TX_RX_MASK 0xff
+#define AR933X_UART_DATA_TX_CSR BIT(9)
+
+#define DEBUG_LL_UART_ADDR KSEG1ADDR(AR933X_UART_BASE)
+
+static inline void ar933x_debug_ll_writel(u32 b, int offset)
+{
+ cpu_writel(b, (u8 *)DEBUG_LL_UART_ADDR + offset);
+}
+
+static inline u32 ar933x_debug_ll_readl(int offset)
+{
+ return cpu_readl((u8 *)DEBUG_LL_UART_ADDR + offset);
+}
+
+static inline void PUTC_LL(int ch)
+{
+ u32 data;
+
+ /* wait transmitter ready */
+ data = ar933x_debug_ll_readl(AR933X_UART_DATA_REG);
+ while (!(data & AR933X_UART_DATA_TX_CSR))
+ data = ar933x_debug_ll_readl(AR933X_UART_DATA_REG);
+
+ data = (ch & AR933X_UART_DATA_TX_RX_MASK) | AR933X_UART_DATA_TX_CSR;
+ ar933x_debug_ll_writel(data, AR933X_UART_DATA_REG);
+}
+
+#endif /* __AR933X_DEBUG_LL__ */
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 4/9] serial: add Atheros AR933x driver
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (2 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 3/9] MIPS: ath79: add DEBUG_LL support for Atheros AR933x Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 5/9] clk: " Antony Pavlov
` (5 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
---
drivers/serial/Kconfig | 7 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_ar933x.c | 204 +++++++++++++++++++++++++++++++++++++++++
drivers/serial/serial_ar933x.h | 69 ++++++++++++++
4 files changed, 281 insertions(+)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 11fc155..f51c6e6 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -14,6 +14,13 @@ config SERIAL_AMBA_PL011
If unsure, say N.
+config DRIVER_SERIAL_AR933X
+ bool "AR933X serial driver"
+ depends on MACH_MIPS_ATH79
+ help
+ If you have an Atheros AR933X SOC based board and want to use the
+ built-in UART of the SoC, say Y to this option.
+
config DRIVER_SERIAL_IMX
depends on ARCH_IMX
default y
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 93790b5..e1865f7 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -1,5 +1,6 @@
obj-$(CONFIG_DRIVER_SERIAL_ARM_DCC) += arm_dcc.o
obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o
+obj-$(CONFIG_DRIVER_SERIAL_AR933X) += serial_ar933x.o
obj-$(CONFIG_DRIVER_SERIAL_IMX) += serial_imx.o
obj-$(CONFIG_DRIVER_SERIAL_STM378X) += stm-serial.o
obj-$(CONFIG_DRIVER_SERIAL_ATMEL) += atmel.o
diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c
new file mode 100644
index 0000000..27cccba
--- /dev/null
+++ b/drivers/serial/serial_ar933x.c
@@ -0,0 +1,204 @@
+/*
+ * based on linux.git/drivers/tty/serial/serial_ar933x.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <malloc.h>
+#include <io.h>
+#include <asm-generic/div64.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include "serial_ar933x.h"
+
+#define AR933X_UART_MAX_SCALE 0xff
+#define AR933X_UART_MAX_STEP 0xffff
+
+struct ar933x_uart_priv {
+ void __iomem *base;
+ struct clk *clk;
+};
+
+static inline void ar933x_serial_writel(struct console_device *cdev,
+ u32 b, int offset)
+{
+ struct ar933x_uart_priv *priv = cdev->dev->priv;
+
+ cpu_writel(b, priv->base + offset);
+}
+
+static inline u32 ar933x_serial_readl(struct console_device *cdev,
+ int offset)
+{
+ struct ar933x_uart_priv *priv = cdev->dev->priv;
+
+ return cpu_readl(priv->base + offset);
+}
+
+/*
+ * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
+ * take from linux.
+ */
+static unsigned long ar933x_uart_get_baud(unsigned int clk,
+ unsigned int scale,
+ unsigned int step)
+{
+ u64 t;
+ u32 div;
+
+ div = (2 << 16) * (scale + 1);
+ t = clk;
+ t *= step;
+ t += (div / 2);
+ do_div(t, div);
+
+ return t;
+}
+
+static void ar933x_uart_get_scale_step(unsigned int clk,
+ unsigned int baud,
+ unsigned int *scale,
+ unsigned int *step)
+{
+ unsigned int tscale;
+ long min_diff;
+
+ *scale = 0;
+ *step = 0;
+
+ min_diff = baud;
+ for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
+ u64 tstep;
+ int diff;
+
+ tstep = baud * (tscale + 1);
+ tstep *= (2 << 16);
+ do_div(tstep, clk);
+
+ if (tstep > AR933X_UART_MAX_STEP)
+ break;
+
+ diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
+ if (diff < min_diff) {
+ min_diff = diff;
+ *scale = tscale;
+ *step = tstep;
+ }
+ }
+}
+
+static int ar933x_serial_setbaudrate(struct console_device *cdev, int baudrate)
+{
+ struct ar933x_uart_priv *priv = cdev->dev->priv;
+ unsigned int scale, step;
+
+ ar933x_uart_get_scale_step(clk_get_rate(priv->clk), baudrate, &scale,
+ &step);
+ ar933x_serial_writel(cdev, (scale << AR933X_UART_CLOCK_SCALE_S) | step,
+ AR933X_UART_CLOCK_REG);
+
+ return 0;
+}
+
+static void ar933x_serial_putc(struct console_device *cdev, char ch)
+{
+ u32 data;
+
+ /* wait transmitter ready */
+ data = ar933x_serial_readl(cdev, AR933X_UART_DATA_REG);
+ while (!(data & AR933X_UART_DATA_TX_CSR))
+ data = ar933x_serial_readl(cdev, AR933X_UART_DATA_REG);
+
+ data = (ch & AR933X_UART_DATA_TX_RX_MASK) | AR933X_UART_DATA_TX_CSR;
+ ar933x_serial_writel(cdev, data, AR933X_UART_DATA_REG);
+}
+
+static int ar933x_serial_tstc(struct console_device *cdev)
+{
+ u32 rdata;
+
+ rdata = ar933x_serial_readl(cdev, AR933X_UART_DATA_REG);
+
+ return rdata & AR933X_UART_DATA_RX_CSR;
+}
+
+static int ar933x_serial_getc(struct console_device *cdev)
+{
+ u32 rdata;
+
+ while (!ar933x_serial_tstc(cdev))
+ ;
+
+ rdata = ar933x_serial_readl(cdev, AR933X_UART_DATA_REG);
+
+ /* remove the character from the FIFO */
+ ar933x_serial_writel(cdev, AR933X_UART_DATA_RX_CSR,
+ AR933X_UART_DATA_REG);
+
+ return rdata & AR933X_UART_DATA_TX_RX_MASK;
+}
+
+static int ar933x_serial_probe(struct device_d *dev)
+{
+ struct console_device *cdev;
+ struct ar933x_uart_priv *priv;
+ u32 uart_cs;
+
+ cdev = xzalloc(sizeof(struct console_device));
+ priv = xzalloc(sizeof(struct ar933x_uart_priv));
+ priv->base = dev_request_mem_region(dev, 0);
+ dev->priv = priv;
+
+ cdev->dev = dev;
+ cdev->tstc = ar933x_serial_tstc;
+ cdev->putc = ar933x_serial_putc;
+ cdev->getc = ar933x_serial_getc;
+ cdev->setbrg = ar933x_serial_setbaudrate;
+
+ priv->clk = clk_get(dev, NULL);
+ if (IS_ERR(priv->clk)) {
+ dev_err(dev, "unable to get UART clock\n");
+ return PTR_ERR(priv->clk);
+ }
+
+ uart_cs = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S)
+ | AR933X_UART_CS_TX_READY_ORIDE
+ | AR933X_UART_CS_RX_READY_ORIDE;
+ ar933x_serial_writel(cdev, uart_cs, AR933X_UART_CS_REG);
+ /* FIXME: need ar933x_serial_init_port(cdev); */
+
+ console_register(cdev);
+
+ return 0;
+}
+
+static struct of_device_id ar933x_serial_dt_ids[] = {
+ {
+ .compatible = "qca,ar9330-uart",
+ }, {
+ /* sentinel */
+ },
+};
+
+static struct driver_d ar933x_serial_driver = {
+ .name = "ar933x_serial",
+ .probe = ar933x_serial_probe,
+ .of_compatible = DRV_OF_COMPAT(ar933x_serial_dt_ids),
+};
+console_platform_driver(ar933x_serial_driver);
diff --git a/drivers/serial/serial_ar933x.h b/drivers/serial/serial_ar933x.h
new file mode 100644
index 0000000..f55f0fa
--- /dev/null
+++ b/drivers/serial/serial_ar933x.h
@@ -0,0 +1,69 @@
+/*
+ * Atheros AR933X UART defines
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __AR933X_UART_H
+#define __AR933X_UART_H
+
+#include <linux/bitops.h>
+
+#define AR933X_UART_REGS_SIZE 20
+#define AR933X_UART_FIFO_SIZE 16
+
+#define AR933X_UART_DATA_REG 0x00
+#define AR933X_UART_CS_REG 0x04
+#define AR933X_UART_CLOCK_REG 0x08
+#define AR933X_UART_INT_REG 0x0c
+#define AR933X_UART_INT_EN_REG 0x10
+
+#define AR933X_UART_DATA_TX_RX_MASK 0xff
+#define AR933X_UART_DATA_RX_CSR BIT(8)
+#define AR933X_UART_DATA_TX_CSR BIT(9)
+
+#define AR933X_UART_CS_PARITY_S 0
+#define AR933X_UART_CS_PARITY_M 0x3
+#define AR933X_UART_CS_PARITY_NONE 0
+#define AR933X_UART_CS_PARITY_ODD 1
+#define AR933X_UART_CS_PARITY_EVEN 2
+#define AR933X_UART_CS_IF_MODE_S 2
+#define AR933X_UART_CS_IF_MODE_M 0x3
+#define AR933X_UART_CS_IF_MODE_NONE 0
+#define AR933X_UART_CS_IF_MODE_DTE 1
+#define AR933X_UART_CS_IF_MODE_DCE 2
+#define AR933X_UART_CS_FLOW_CTRL_S 4
+#define AR933X_UART_CS_FLOW_CTRL_M 0x3
+#define AR933X_UART_CS_DMA_EN BIT(6)
+#define AR933X_UART_CS_TX_READY_ORIDE BIT(7)
+#define AR933X_UART_CS_RX_READY_ORIDE BIT(8)
+#define AR933X_UART_CS_TX_READY BIT(9)
+#define AR933X_UART_CS_RX_BREAK BIT(10)
+#define AR933X_UART_CS_TX_BREAK BIT(11)
+#define AR933X_UART_CS_HOST_INT BIT(12)
+#define AR933X_UART_CS_HOST_INT_EN BIT(13)
+#define AR933X_UART_CS_TX_BUSY BIT(14)
+#define AR933X_UART_CS_RX_BUSY BIT(15)
+
+#define AR933X_UART_CLOCK_STEP_M 0xffff
+#define AR933X_UART_CLOCK_SCALE_M 0xfff
+#define AR933X_UART_CLOCK_SCALE_S 16
+#define AR933X_UART_CLOCK_STEP_M 0xffff
+
+#define AR933X_UART_INT_RX_VALID BIT(0)
+#define AR933X_UART_INT_TX_READY BIT(1)
+#define AR933X_UART_INT_RX_FRAMING_ERR BIT(2)
+#define AR933X_UART_INT_RX_OFLOW_ERR BIT(3)
+#define AR933X_UART_INT_TX_OFLOW_ERR BIT(4)
+#define AR933X_UART_INT_RX_PARITY_ERR BIT(5)
+#define AR933X_UART_INT_RX_BREAK_ON BIT(6)
+#define AR933X_UART_INT_RX_BREAK_OFF BIT(7)
+#define AR933X_UART_INT_RX_FULL BIT(8)
+#define AR933X_UART_INT_TX_EMPTY BIT(9)
+#define AR933X_UART_INT_ALLINTS 0x3ff
+
+#endif /* __AR933X_UART_H */
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 5/9] clk: add Atheros AR933x driver
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (3 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 4/9] serial: add Atheros AR933x driver Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 6/9] MIPS: ath79: ar9331: add devicetree files Antony Pavlov
` (4 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
drivers/clk/Makefile | 1 +
drivers/clk/clk-ar933x.c | 175 +++++++++++++++++++++++++++++++++
include/dt-bindings/clock/ar933x-clk.h | 22 +++++
3 files changed, 198 insertions(+)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index f5c0592..b4b5414 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_MVEBU) += mvebu/
obj-$(CONFIG_ARCH_MXS) += mxs/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_CLK_SOCFPGA) += socfpga.o
+obj-$(CONFIG_MACH_MIPS_ATH79) += clk-ar933x.o
diff --git a/drivers/clk/clk-ar933x.c b/drivers/clk/clk-ar933x.c
new file mode 100644
index 0000000..f9701ae
--- /dev/null
+++ b/drivers/clk/clk-ar933x.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * Based on the Linux Tegra clock code
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+
+#include <mach/ath79.h>
+#include <dt-bindings/clock/ar933x-clk.h>
+
+static struct clk *clks[AR933X_CLK_END];
+static struct clk_onecell_data clk_data;
+
+struct clk_ar933x {
+ struct clk clk;
+ void __iomem *base;
+ u32 div_shift;
+ u32 div_mask;
+ const char *parent;
+};
+
+static unsigned long clk_ar933x_recalc_rate(struct clk *clk,
+ unsigned long parent_rate)
+{
+ struct clk_ar933x *f = container_of(clk, struct clk_ar933x, clk);
+ unsigned long rate;
+ unsigned long freq;
+ u32 clock_ctrl;
+ u32 cpu_config;
+ u32 t;
+
+ clock_ctrl = __raw_readl(f->base + AR933X_PLL_CLOCK_CTRL_REG);
+
+ if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) {
+ rate = parent_rate;
+ } else {
+ cpu_config = __raw_readl(f->base + AR933X_PLL_CPU_CONFIG_REG);
+
+ t = (cpu_config >> AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
+ AR933X_PLL_CPU_CONFIG_REFDIV_MASK;
+ freq = parent_rate / t;
+
+ t = (cpu_config >> AR933X_PLL_CPU_CONFIG_NINT_SHIFT) &
+ AR933X_PLL_CPU_CONFIG_NINT_MASK;
+ freq *= t;
+
+ t = (cpu_config >> AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
+ AR933X_PLL_CPU_CONFIG_OUTDIV_MASK;
+ if (t == 0)
+ t = 1;
+
+ freq >>= t;
+
+ t = ((clock_ctrl >> f->div_shift) & f->div_mask) + 1;
+ rate = freq / t;
+ }
+
+ return rate;
+}
+
+struct clk_ops clk_ar933x_ops = {
+ .recalc_rate = clk_ar933x_recalc_rate,
+};
+
+static struct clk *clk_ar933x(const char *name, const char *parent,
+ void __iomem *base, u32 div_shift, u32 div_mask)
+{
+ struct clk_ar933x *f = xzalloc(sizeof(*f));
+
+ f->parent = parent;
+ f->base = base;
+ f->div_shift = div_shift;
+ f->div_mask = div_mask;
+
+ f->clk.ops = &clk_ar933x_ops;
+ f->clk.name = name;
+ f->clk.parent_names = &f->parent;
+ f->clk.num_parents = 1;
+
+ clk_register(&f->clk);
+
+ return &f->clk;
+}
+
+static void ar933x_ref_clk_init(void __iomem *base)
+{
+ u32 t;
+ unsigned long ref_rate;
+ struct clk *clk;
+ int err;
+
+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
+ if (t & AR933X_BOOTSTRAP_REF_CLK_40)
+ ref_rate = (40 * 1000 * 1000);
+ else
+ ref_rate = (25 * 1000 * 1000);
+
+ clks[AR933X_CLK_REF] = clk_fixed("ref", ref_rate);
+}
+
+static void ar933x_pll_init(void __iomem *base)
+{
+ clks[AR933X_CLK_UART] = clk_fixed_factor("uart", "ref", 1, 1);
+
+ clks[AR933X_CLK_CPU] = clk_ar933x("cpu", "ref", base,
+ AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT,
+ AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK);
+
+ clks[AR933X_CLK_DDR] = clk_ar933x("ddr", "ref", base,
+ AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT,
+ AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK);
+
+ clks[AR933X_CLK_AHB] = clk_ar933x("ahb", "ref", base,
+ AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT,
+ AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK);
+
+ clks[AR933X_CLK_WDT] = clk_fixed_factor("wdt", "ahb", 1, 1);
+}
+
+static int ar933x_clk_probe(struct device_d *dev)
+{
+ void __iomem *base;
+
+ base = dev_request_mem_region(dev, 0);
+ if (!base)
+ return -EBUSY;
+
+ ar933x_ref_clk_init(base);
+ ar933x_pll_init(base);
+
+ clk_data.clks = clks;
+ clk_data.clk_num = ARRAY_SIZE(clks);
+ of_clk_add_provider(dev->device_node, of_clk_src_onecell_get,
+ &clk_data);
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id ar933x_clk_dt_ids[] = {
+ {
+ .compatible = "qca,ar933x-clk",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d ar933x_clk_driver = {
+ .probe = ar933x_clk_probe,
+ .name = "ar933x_clk",
+ .of_compatible = DRV_OF_COMPAT(ar933x_clk_dt_ids),
+};
+
+static int ar933x_clk_init(void)
+{
+ return platform_driver_register(&ar933x_clk_driver);
+}
+postcore_initcall(ar933x_clk_init);
diff --git a/include/dt-bindings/clock/ar933x-clk.h b/include/dt-bindings/clock/ar933x-clk.h
new file mode 100644
index 0000000..f048930
--- /dev/null
+++ b/include/dt-bindings/clock/ar933x-clk.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DT_BINDINGS_AR933X_CLK_H
+#define __DT_BINDINGS_AR933X_CLK_H
+
+#define AR933X_CLK_REF 0
+#define AR933X_CLK_UART 1
+#define AR933X_CLK_CPU 2
+#define AR933X_CLK_DDR 3
+#define AR933X_CLK_AHB 4
+#define AR933X_CLK_WDT 5
+
+#define AR933X_CLK_END 6
+
+#endif /* __DT_BINDINGS_AR933X_CLK_H */
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 6/9] MIPS: ath79: ar9331: add devicetree files
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (4 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 5/9] clk: " Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 7/9] MIPS: ath79: add tplink-mr3020 board support Antony Pavlov
` (3 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/dts/ar9331.dtsi | 26 ++++++++++++++++++++++++++
arch/mips/dts/include/dt-bindings | 1 +
2 files changed, 27 insertions(+)
diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi
new file mode 100644
index 0000000..890fda8
--- /dev/null
+++ b/arch/mips/dts/ar9331.dtsi
@@ -0,0 +1,26 @@
+#include <dt-bindings/clock/ar933x-clk.h>
+
+#include "skeleton.dtsi"
+
+/ {
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ device_type = "soc";
+ ranges;
+
+ serial0: serial@b8020000 {
+ compatible = "qca,ar9330-uart";
+ reg = <0xb8020000 0x14>;
+ clocks = <&ar9331_clk AR933X_CLK_UART>;
+ status = "disabled";
+ };
+
+ ar9331_clk: clock {
+ compatible = "qca,ar933x-clk";
+ reg = <0xb8050000 0x48>;
+ #clock-cells = <1>;
+ };
+ };
+};
diff --git a/arch/mips/dts/include/dt-bindings b/arch/mips/dts/include/dt-bindings
new file mode 120000
index 0000000..0cecb3d
--- /dev/null
+++ b/arch/mips/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../include/dt-bindings
\ No newline at end of file
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 7/9] MIPS: ath79: add tplink-mr3020 board support
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (5 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 6/9] MIPS: ath79: ar9331: add devicetree files Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-28 9:44 ` Sascha Hauer
2014-03-27 21:26 ` [PATCH 8/9] MIPS: tplink-mr3020: add documentation Antony Pavlov
` (2 subsequent siblings)
9 siblings, 1 reply; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
This board support code can be used for TP-LINK WR703 too.
TP-LINK WR703 is very similar to TP-LINK MR3020, there are
some non-essential differences:
* WR703 is smaller and cheaper;
* WR703 has only one led, but MR3020 has five leds;
* MR3020 uses mini-USB connector, WR703 uses micro-USB connector.
See https://forum.openwrt.org/viewtopic.php?id=45159 for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Makefile | 1 +
arch/mips/boards/tplink-mr3020/Makefile | 1 +
arch/mips/boards/tplink-mr3020/board.c | 27 +++++++++++++++++++++++++++
arch/mips/dts/tplink-mr3020.dts | 18 ++++++++++++++++++
arch/mips/mach-ath79/Kconfig | 8 ++++++++
5 files changed, 55 insertions(+)
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 5ca5fc9..b3bacf3 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -79,6 +79,7 @@ machine-$(CONFIG_MACH_MIPS_AR231X) := ar231x
board-$(CONFIG_BOARD_NETGEAR_WG102) := netgear-wg102
machine-$(CONFIG_MACH_MIPS_ATH79) := ath79
+board-$(CONFIG_BOARD_TPLINK_MR3020) := tplink-mr3020
machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
diff --git a/arch/mips/boards/tplink-mr3020/Makefile b/arch/mips/boards/tplink-mr3020/Makefile
new file mode 100644
index 0000000..dcfc293
--- /dev/null
+++ b/arch/mips/boards/tplink-mr3020/Makefile
@@ -0,0 +1 @@
+obj-y += board.o
diff --git a/arch/mips/boards/tplink-mr3020/board.c b/arch/mips/boards/tplink-mr3020/board.c
new file mode 100644
index 0000000..318998c
--- /dev/null
+++ b/arch/mips/boards/tplink-mr3020/board.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+
+static int model_hostname_init(void)
+{
+ barebox_set_hostname("mr3020");
+
+ return 0;
+}
+postcore_initcall(model_hostname_init);
diff --git a/arch/mips/dts/tplink-mr3020.dts b/arch/mips/dts/tplink-mr3020.dts
new file mode 100644
index 0000000..b9539c5
--- /dev/null
+++ b/arch/mips/dts/tplink-mr3020.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+
+#include <ar9331.dtsi>
+
+/ {
+ model = "TP-LINK MR3020";
+ compatible = "tplink,mr3020";
+
+ memory {
+ reg = <0x00000000 0x2000000>;
+ };
+
+ soc {
+ serial0: serial@b8020000 {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig
index 5f73e0a..96fffd3 100644
--- a/arch/mips/mach-ath79/Kconfig
+++ b/arch/mips/mach-ath79/Kconfig
@@ -4,4 +4,12 @@ config ARCH_TEXT_BASE
hex
default 0xa0800000
+choice
+ prompt "Board type"
+
+config BOARD_TPLINK_MR3020
+ bool "TP-LINK MR3020"
+
+endchoice
+
endif
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 7/9] MIPS: ath79: add tplink-mr3020 board support
2014-03-27 21:26 ` [PATCH 7/9] MIPS: ath79: add tplink-mr3020 board support Antony Pavlov
@ 2014-03-28 9:44 ` Sascha Hauer
0 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2014-03-28 9:44 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Fri, Mar 28, 2014 at 01:26:42AM +0400, Antony Pavlov wrote:
> This board support code can be used for TP-LINK WR703 too.
>
> TP-LINK WR703 is very similar to TP-LINK MR3020, there are
> some non-essential differences:
>
> * WR703 is smaller and cheaper;
> * WR703 has only one led, but MR3020 has five leds;
> * MR3020 uses mini-USB connector, WR703 uses micro-USB connector.
>
> See https://forum.openwrt.org/viewtopic.php?id=45159 for details.
>
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
> arch/mips/Makefile | 1 +
> arch/mips/boards/tplink-mr3020/Makefile | 1 +
> arch/mips/boards/tplink-mr3020/board.c | 27 +++++++++++++++++++++++++++
> arch/mips/dts/tplink-mr3020.dts | 18 ++++++++++++++++++
> arch/mips/mach-ath79/Kconfig | 8 ++++++++
> 5 files changed, 55 insertions(+)
>
> diff --git a/arch/mips/Makefile b/arch/mips/Makefile
> index 5ca5fc9..b3bacf3 100644
> --- a/arch/mips/Makefile
> +++ b/arch/mips/Makefile
> @@ -79,6 +79,7 @@ machine-$(CONFIG_MACH_MIPS_AR231X) := ar231x
> board-$(CONFIG_BOARD_NETGEAR_WG102) := netgear-wg102
>
> machine-$(CONFIG_MACH_MIPS_ATH79) := ath79
> +board-$(CONFIG_BOARD_TPLINK_MR3020) := tplink-mr3020
>
> machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
> board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
> diff --git a/arch/mips/boards/tplink-mr3020/Makefile b/arch/mips/boards/tplink-mr3020/Makefile
> new file mode 100644
> index 0000000..dcfc293
> --- /dev/null
> +++ b/arch/mips/boards/tplink-mr3020/Makefile
> @@ -0,0 +1 @@
> +obj-y += board.o
> diff --git a/arch/mips/boards/tplink-mr3020/board.c b/arch/mips/boards/tplink-mr3020/board.c
> new file mode 100644
> index 0000000..318998c
> --- /dev/null
> +++ b/arch/mips/boards/tplink-mr3020/board.c
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
> + *
> + * This file is part of barebox.
> + * See file CREDITS for list of people who contributed to this project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +
> +static int model_hostname_init(void)
> +{
> + barebox_set_hostname("mr3020");
> +
> + return 0;
> +}
> +postcore_initcall(model_hostname_init);
> diff --git a/arch/mips/dts/tplink-mr3020.dts b/arch/mips/dts/tplink-mr3020.dts
> new file mode 100644
> index 0000000..b9539c5
> --- /dev/null
> +++ b/arch/mips/dts/tplink-mr3020.dts
> @@ -0,0 +1,18 @@
> +/dts-v1/;
> +
> +#include <ar9331.dtsi>
> +
> +/ {
> + model = "TP-LINK MR3020";
> + compatible = "tplink,mr3020";
> +
> + memory {
> + reg = <0x00000000 0x2000000>;
> + };
> +
> + soc {
> + serial0: serial@b8020000 {
> + status = "okay";
> + };
> + };
This can be easier written as:
&serial0 {
status = "okay";
};
With bigger board dts files this is much nicer since you don't have to
resemble the tree structure in your board dts.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 8/9] MIPS: tplink-mr3020: add documentation
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (6 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 7/9] MIPS: ath79: add tplink-mr3020 board support Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-27 21:26 ` [PATCH 9/9] MIPS: add tplink-mr3020_defconfig Antony Pavlov
2014-03-28 9:28 ` [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
Documentation/boards.dox | 1 +
arch/mips/boards/tplink-mr3020/tplink-mr3020.dox | 64 ++++++++++++++++++++++++
2 files changed, 65 insertions(+)
diff --git a/Documentation/boards.dox b/Documentation/boards.dox
index 42bc5e6..8d4fabb 100644
--- a/Documentation/boards.dox
+++ b/Documentation/boards.dox
@@ -60,6 +60,7 @@ MIPS type:
@li @subpage loongson_ls1b
@li @subpage qemu_malta
@li @subpage ritmix-rzx50
+@li @subpage tplink-mr3020
*/
diff --git a/arch/mips/boards/tplink-mr3020/tplink-mr3020.dox b/arch/mips/boards/tplink-mr3020/tplink-mr3020.dox
new file mode 100644
index 0000000..16fe465
--- /dev/null
+++ b/arch/mips/boards/tplink-mr3020/tplink-mr3020.dox
@@ -0,0 +1,64 @@
+/** @page tplink-mr3020 TP-LINK MR3020 wireless router
+
+The router has
+@li Atheros ar9331 SoC;
+@li 32 MiB SDRAM;
+@li 4 MiB NOR type SPI Flash Memory;
+@li RS232 serial interface (LV-TTL levels on board!);
+@li 1 USB interface;
+@li 1 Ethernet interfaces;
+@li 802.11b/g/n (WiFi) interface;
+@li LEDs & buttons.
+
+The router uses U-Boot 1.1.4 as firmware.
+
+Barebox can be started from U-Boot using tftp.
+But you have to encode barebox image in a very special way.
+
+First obtain 'lzma' and 'mktplinkfw' utilities.
+
+The 'lzma' utility can be obtained in Debian/Ubuntu
+distro by installing lzma package.
+
+The 'mktplinkfw' utility can be obtained from openwrt, e.g.:
+
+@verbatim
+$ OWRTPREF=https://raw.githubusercontent.com/mirrors/openwrt/master
+$ curl -OL $OWRTPREF/tools/firmware-utils/src/mktplinkfw.c \
+ -OL $OWRTPREF/tools/firmware-utils/src/md5.c \
+ -OL $OWRTPREF/tools/firmware-utils/src/md5.h
+$ cc -o mktplinkfw mktplinkfw.c md5.c
+@endverbatim
+
+To convert your barebox.bin to U-Boot-loadable image (6F01A8C0.img)
+use this command sequence:
+
+@verbatim
+$ lzma -c -k barebox.bin > barebox.lzma
+$ ./FW/mktplinkfw -c -H 0x07200103 -W 1 -N TL-WR720N-v3 \
+ -s -F 4Mlzma -k barebox.lzma -o 6F01A8C0.img
+@endverbatim
+
+You must setup tftp-server on host 192.168.0.1.
+Put your 6F01A8C0.img to tftp-server directory
+(usual /tftpboot or /srv/tftp).
+Connect your board to your tftp-server network via Ethernet.
+
+Next, setup network on MR3020 and run 6F01A8C0.img, e.g.:
+@verbatim
+hornet> set ipaddr 192.168.0.2
+hornet> set serverip 192.168.0.1
+hornet> tftpboot 0x81000000 6F01A8C0.img
+hornet> bootm 0x81000000
+@endverbatim
+
+TP-LINK MR3020 links:
+@li http://www.tp-link.com/en/products/details/?model=TL-MR3020
+@li http://wiki.openwrt.org/toh/tp-link/tl-mr3020
+@li https://wikidevi.com/wiki/TP-LINK_TL-MR3020
+
+See also:
+@li http://www.eeboard.com/wp-content/uploads/downloads/2013/08/AR9331.pdf
+@li http://squonk42.github.io/TL-WR703N/
+
+*/
--
1.9.0
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 9/9] MIPS: add tplink-mr3020_defconfig
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (7 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 8/9] MIPS: tplink-mr3020: add documentation Antony Pavlov
@ 2014-03-27 21:26 ` Antony Pavlov
2014-03-28 9:28 ` [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
9 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-27 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/configs/tplink-mr3020_defconfig | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/mips/configs/tplink-mr3020_defconfig b/arch/mips/configs/tplink-mr3020_defconfig
new file mode 100644
index 0000000..2e925d9
--- /dev/null
+++ b/arch/mips/configs/tplink-mr3020_defconfig
@@ -0,0 +1,29 @@
+CONFIG_BUILTIN_DTB=y
+CONFIG_BUILTIN_DTB_NAME="tplink-mr3020"
+CONFIG_MACH_MIPS_ATH79=y
+CONFIG_LONGHELP=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_GLOBAL=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_SHA1SUM=y
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_CLK=y
+CONFIG_OFDEVICE=y
+CONFIG_DRIVER_SERIAL_AR933X=y
+# CONFIG_SPI is not set
+CONFIG_MD5=y
+CONFIG_SHA224=y
+CONFIG_SHA256=y
--
1.9.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support
2014-03-27 21:26 [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
` (8 preceding siblings ...)
2014-03-27 21:26 ` [PATCH 9/9] MIPS: add tplink-mr3020_defconfig Antony Pavlov
@ 2014-03-28 9:28 ` Antony Pavlov
2014-03-28 9:38 ` Sascha Hauer
9 siblings, 1 reply; 14+ messages in thread
From: Antony Pavlov @ 2014-03-28 9:28 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On Fri, 28 Mar 2014 01:26:35 +0400
Antony Pavlov <antonynpavlov@gmail.com> wrote:
Your latest clk-related changes break build of this patchseries.
I'll resend this series soon.
> Antony Pavlov (8):
> MIPS: lib: add BAREBOX_CLK_TABLE to linker script
> MIPS: ath79: add DEBUG_LL support for Atheros AR933x
> serial: add Atheros AR933x driver
> clk: add Atheros AR933x driver
> MIPS: ath79: ar9331: add devicetree files
> MIPS: ath79: add tplink-mr3020 board support
> MIPS: tplink-mr3020: add documentation
> MIPS: add tplink-mr3020_defconfig
>
> Du Huanpeng (1):
> MIPS: add Atheros ar933x family support
>
> Documentation/boards.dox | 1 +
> arch/mips/Kconfig | 14 ++
> arch/mips/Makefile | 3 +
> arch/mips/boards/tplink-mr3020/Makefile | 1 +
> arch/mips/boards/tplink-mr3020/board.c | 27 +++
> arch/mips/boards/tplink-mr3020/tplink-mr3020.dox | 64 +++++++
> arch/mips/configs/tplink-mr3020_defconfig | 29 ++++
> arch/mips/dts/ar9331.dtsi | 26 +++
> arch/mips/dts/include/dt-bindings | 1 +
> arch/mips/dts/tplink-mr3020.dts | 18 ++
> arch/mips/lib/barebox.lds.S | 2 +
> arch/mips/mach-ath79/Kconfig | 15 ++
> arch/mips/mach-ath79/Makefile | 1 +
> arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 64 +++++++
> arch/mips/mach-ath79/include/mach/ath79.h | 33 ++++
> arch/mips/mach-ath79/include/mach/debug_ll.h | 56 +++++++
> arch/mips/mach-ath79/reset.c | 32 ++++
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-ar933x.c | 175 +++++++++++++++++++
> drivers/serial/Kconfig | 7 +
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_ar933x.c | 204 +++++++++++++++++++++++
> drivers/serial/serial_ar933x.h | 69 ++++++++
> include/dt-bindings/clock/ar933x-clk.h | 22 +++
> 24 files changed, 866 insertions(+)
> create mode 100644 arch/mips/boards/tplink-mr3020/Makefile
> create mode 100644 arch/mips/boards/tplink-mr3020/board.c
> create mode 100644 arch/mips/boards/tplink-mr3020/tplink-mr3020.dox
> create mode 100644 arch/mips/configs/tplink-mr3020_defconfig
> create mode 100644 arch/mips/dts/ar9331.dtsi
> create mode 120000 arch/mips/dts/include/dt-bindings
> create mode 100644 arch/mips/dts/tplink-mr3020.dts
> create mode 100644 arch/mips/mach-ath79/Kconfig
> create mode 100644 arch/mips/mach-ath79/Makefile
> create mode 100644 arch/mips/mach-ath79/include/mach/ar71xx_regs.h
> create mode 100644 arch/mips/mach-ath79/include/mach/ath79.h
> create mode 100644 arch/mips/mach-ath79/include/mach/debug_ll.h
> create mode 100644 arch/mips/mach-ath79/reset.c
> create mode 100644 drivers/clk/clk-ar933x.c
> create mode 100644 drivers/serial/serial_ar933x.c
> create mode 100644 drivers/serial/serial_ar933x.h
> create mode 100644 include/dt-bindings/clock/ar933x-clk.h
>
> --
> 1.9.0
>
--
--
Best regards,
Antony Pavlov
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support
2014-03-28 9:28 ` [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support Antony Pavlov
@ 2014-03-28 9:38 ` Sascha Hauer
2014-03-28 10:39 ` Antony Pavlov
0 siblings, 1 reply; 14+ messages in thread
From: Sascha Hauer @ 2014-03-28 9:38 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Fri, Mar 28, 2014 at 01:28:11PM +0400, Antony Pavlov wrote:
> On Fri, 28 Mar 2014 01:26:35 +0400
> Antony Pavlov <antonynpavlov@gmail.com> wrote:
>
> Your latest clk-related changes break build of this patchseries.
>
> I'll resend this series soon.
I can fold in a fixup into the merge commit which brings together my clk
changes and your mips tree for you, don't worry. I assume you want to have
the CLK_SET_RATE_PARENT flag passed into clk_fixed_factor, right?
I get this when compiling:
drivers/clk/clk-ar933x.c: In function 'ar933x_ref_clk_init':
drivers/clk/clk-ar933x.c:108: warning: unused variable 'err'
drivers/clk/clk-ar933x.c:107: warning: unused variable 'clk'
I have a fix for this locally now. I'll have a look over the patches.
Should they be fine there's nothing to do for you (except checking the
result when I merged it)
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/9] MIPS: add Atheros AR933x SoC & TP-LINK MR3020 board support
2014-03-28 9:38 ` Sascha Hauer
@ 2014-03-28 10:39 ` Antony Pavlov
0 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2014-03-28 10:39 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On Fri, 28 Mar 2014 10:38:44 +0100
Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Fri, Mar 28, 2014 at 01:28:11PM +0400, Antony Pavlov wrote:
> > On Fri, 28 Mar 2014 01:26:35 +0400
> > Antony Pavlov <antonynpavlov@gmail.com> wrote:
> >
> > Your latest clk-related changes break build of this patchseries.
> >
> > I'll resend this series soon.
>
> I can fold in a fixup into the merge commit which brings together my clk
> changes and your mips tree for you, don't worry. I assume you want to have
> the CLK_SET_RATE_PARENT flag passed into clk_fixed_factor, right?
>
> I get this when compiling:
>
> drivers/clk/clk-ar933x.c: In function 'ar933x_ref_clk_init':
> drivers/clk/clk-ar933x.c:108: warning: unused variable 'err'
> drivers/clk/clk-ar933x.c:107: warning: unused variable 'clk'
Agghhh.
I had used very old mips-linux-gcc 3.4.6 compiler most of time --- it does not show the warnings.
I have just checked with codesourcery mips-2013.11 --- it gives me the warnings.
> I have a fix for this locally now. I'll have a look over the patches.
> Should they be fine there's nothing to do for you (except checking the
> result when I merged it)
I have just checked next branch on my MR3020 board --- all works fine!
Thanks a lot for all!
--
Best regards,
Antony Pavlov
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^ permalink raw reply [flat|nested] 14+ messages in thread