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From: Beniamino Galvani <b.galvani@gmail.com>
To: barebox@lists.infradead.org
Subject: [PATCH 07/11] clk: gate: add CLK_GATE_HIWORD_MASK flag
Date: Sun, 27 Apr 2014 11:30:40 +0200	[thread overview]
Message-ID: <1398591044-3616-8-git-send-email-b.galvani@gmail.com> (raw)
In-Reply-To: <1398591044-3616-1-git-send-email-b.galvani@gmail.com>

Clock gates having the CLK_GATE_HIWORD_MASK flag set use the upper 16
bits of the register as a "write enable" mask for the value in the
lower 16 bits.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 drivers/clk/clk-gate.c |   17 ++++++++++++-----
 include/linux/clk.h    |    1 +
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 54489c4..85eba3d 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -37,12 +37,19 @@ static void clk_gate_endisable(struct clk *clk, int enable)
 	u32 val;
 
 	set ^= enable;
-	val = readl(gate->reg);
 
-	if (set)
-		val |= BIT(gate->shift);
-	else
-		val &= ~BIT(gate->shift);
+	if (gate->flags & CLK_GATE_HIWORD_MASK) {
+		val = BIT(gate->shift + 16);
+		if (set)
+			val |= BIT(gate->shift);
+	} else {
+		val = readl(gate->reg);
+
+		if (set)
+			val |= BIT(gate->shift);
+		else
+			val &= ~BIT(gate->shift);
+	}
 
 	writel(val, gate->reg);
 }
diff --git a/include/linux/clk.h b/include/linux/clk.h
index fbfdd4f..49cb5a2 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -200,6 +200,7 @@ static inline int clk_set_rate(struct clk *clk, unsigned long rate)
 #define CLK_SET_RATE_PARENT     (1 << 0) /* propagate rate change up one level */
 
 #define CLK_GATE_INVERTED	(1 << 0)
+#define CLK_GATE_HIWORD_MASK	(1 << 1)
 
 struct clk_ops {
 	int		(*enable)(struct clk *clk);
-- 
1.7.10.4


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  parent reply	other threads:[~2014-04-27  9:31 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-27  9:30 [PATCH 00/11] ARM: add initial support for Rockchip boards Beniamino Galvani
2014-04-27  9:30 ` [PATCH 01/11] net: add ARC EMAC driver Beniamino Galvani
2014-04-27  9:30 ` [PATCH 02/11] mfd: add act8846 driver Beniamino Galvani
2014-04-27  9:30 ` [PATCH 03/11] ARM: add basic support for Rockchip SoCs Beniamino Galvani
2014-04-27  9:30 ` [PATCH 04/11] ARM: rockchip: add PLL initialization function Beniamino Galvani
2014-04-27  9:30 ` [PATCH 05/11] clk: gate: add flags argument to clock gate constructor Beniamino Galvani
2014-04-27  9:30 ` [PATCH 06/11] clk: gate: unify enable and disable functions handling Beniamino Galvani
2014-04-27  9:30 ` Beniamino Galvani [this message]
2014-04-27  9:30 ` [PATCH 08/11] clk: add rockchip clock gate driver Beniamino Galvani
2014-04-27  9:30 ` [PATCH 09/11] pinctrl: add rockchip pinctrl and gpio drivers Beniamino Galvani
2014-04-27  9:30 ` [PATCH 10/11] ARM: dts: add Rockchip devicetree files Beniamino Galvani
2014-04-27  9:30 ` [PATCH 11/11] ARM: rockchip: add radxa-rock board Beniamino Galvani
2014-04-28  7:26 ` [PATCH 00/11] ARM: add initial support for Rockchip boards Sascha Hauer
2014-04-28 20:54   ` Beniamino Galvani
2014-04-29  7:05     ` Sascha Hauer
2014-04-29 21:13       ` Beniamino Galvani
2014-04-29 21:59         ` Heiko Stübner
2014-05-01  7:48           ` Beniamino Galvani

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