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From: Lucas Stach <dev@lynxeye.de>
To: barebox@lists.infradead.org
Subject: [PATCH 11/30] tegra: disable IDDQ for PLL_X on Tegra124
Date: Tue,  3 Jun 2014 22:34:58 +0200	[thread overview]
Message-ID: <1401827717-6420-12-git-send-email-dev@lynxeye.de> (raw)
In-Reply-To: <1401827717-6420-1-git-send-email-dev@lynxeye.de>

This is an additional power down control.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
 arch/arm/mach-tegra/include/mach/tegra124-car.h | 19 +++++++++++++++++++
 arch/arm/mach-tegra/tegra_avp_init.c            |  9 +++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 arch/arm/mach-tegra/include/mach/tegra124-car.h

diff --git a/arch/arm/mach-tegra/include/mach/tegra124-car.h b/arch/arm/mach-tegra/include/mach/tegra124-car.h
new file mode 100644
index 0000000..1fb924d
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/tegra124-car.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2014 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Register definitions */
+#define CRC_PLLX_MISC_3			0x518
+#define CRC_PLLX_MISC_3_IDDQ		(1 << 3)
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 53e81d9..cc8b0e2 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -25,6 +25,7 @@
 #include <mach/tegra20-pmc.h>
 #include <mach/tegra30-car.h>
 #include <mach/tegra30-flow.h>
+#include <mach/tegra124-car.h>
 
 /* instruct the PMIC to enable the CPU power rail */
 static void enable_maincomplex_powerrail(void)
@@ -107,6 +108,14 @@ static void init_pllx(void)
 
 	chiptype = tegra_get_chiptype();
 
+	/* disable IDDQ on T124 */
+	if (chiptype == TEGRA124) {
+		reg = readl(TEGRA_CLK_RESET_BASE + CRC_PLLX_MISC_3);
+		reg &= ~CRC_PLLX_MISC_3_IDDQ;
+		writel(reg, TEGRA_CLK_RESET_BASE + CRC_PLLX_MISC_3);
+		tegra_ll_delay_usec(2);
+	}
+
 	osc_freq = (readl(TEGRA_CLK_RESET_BASE + CRC_OSC_CTRL) &
 		    CRC_OSC_CTRL_OSC_FREQ_MASK) >> CRC_OSC_CTRL_OSC_FREQ_SHIFT;
 
-- 
1.9.3


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  parent reply	other threads:[~2014-06-03 20:33 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-03 20:34 [PATCH 00/30] Tegra K1 support Lucas Stach
2014-06-03 20:34 ` [PATCH 01/30] mci: implement non-removable property Lucas Stach
2014-06-03 20:34 ` [PATCH 02/30] tegra: lowlevel-dvc: use __always_inline macro Lucas Stach
2014-06-03 20:34 ` [PATCH 03/30] tegra: pmc: add Tegra30 compatible Lucas Stach
2014-06-03 20:34 ` [PATCH 04/30] tegra: pmc: add command to get into RCM Lucas Stach
2014-06-03 20:34 ` [PATCH 05/30] tegra: lowlevel: setup an early stack Lucas Stach
2014-06-03 20:34 ` [PATCH 06/30] tegra: add Tegra124 id to lowlevel functions Lucas Stach
2014-06-03 20:34 ` [PATCH 07/30] tegra: lowlevel: fix ODMdata fetch on Tegra124 Lucas Stach
2014-06-03 20:34 ` [PATCH 08/30] tegra: recognize Tegra124 in maincomplex startup Lucas Stach
2014-06-03 20:34 ` [PATCH 09/30] tegra: recognize Tegra124 in common initcalls Lucas Stach
2014-06-03 20:34 ` [PATCH 10/30] tegra: add Tegra124 and AS3722 PMIC to lowlevel-dvc Lucas Stach
2014-06-03 20:34 ` Lucas Stach [this message]
2014-06-03 20:34 ` [PATCH 12/30] tegra: power up additional partitions on Tegra124 Lucas Stach
2014-06-03 20:35 ` [PATCH 13/30] tegra: fix MESLECT clock enable Lucas Stach
2014-06-03 20:35 ` [PATCH 14/30] tegra: change cpu internal reset layout for Tegra124 Lucas Stach
2014-06-03 20:35 ` [PATCH 15/30] tegra: add Tegra124 PLL_X rate setup Lucas Stach
2014-06-03 20:35 ` [PATCH 16/30] tegra: apply cluster switch logic to all SoCs >=T30 Lucas Stach
2014-06-03 20:35 ` [PATCH 17/30] tegra: hardcode entry address for main cluster Lucas Stach
2014-06-03 20:35 ` [PATCH 18/30] tegra: setup L2 cache on Tegra124 Lucas Stach
2014-06-03 20:35 ` [PATCH 19/30] tegra: add architectural timer init Lucas Stach
2014-06-03 20:35 ` [PATCH 20/30] tegra: add Tegra124 Kconfig symbol Lucas Stach
2014-06-03 20:35 ` [PATCH 21/30] pinctrl: tegra30: introduce drvdata Lucas Stach
2014-06-03 20:35 ` [PATCH 22/30] pinctrl: tegra: add Tegra124 support Lucas Stach
2014-06-03 20:35 ` [PATCH 23/30] clk: tegra: allow variable sized muxes Lucas Stach
2014-06-03 20:35 ` [PATCH 24/30] clk: tegra: don't bug out on zero PLL postdiv Lucas Stach
2014-06-03 20:35 ` [PATCH 25/30] clk: tegra: add Tegra124 driver Lucas Stach
2014-06-03 20:35 ` [PATCH 26/30] mci: tegra: add Tegra124 compatible Lucas Stach
2014-06-03 20:35 ` [PATCH 27/30] tegra: pmc: " Lucas Stach
2014-06-03 20:35 ` [PATCH 28/30] images: add Tegra124 image build rules Lucas Stach
2014-06-03 20:35 ` [PATCH 29/30] tegra: add NVIDIA Jetson-TK1 board support Lucas Stach
2014-06-03 20:35 ` [PATCH 30/30] tegra: refresh defconfig Lucas Stach
2014-06-04  5:22 ` [PATCH 00/30] Tegra K1 support Sascha Hauer

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