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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: barebox@lists.infradead.org
Subject: [PATCH 4/7] ARM: mvebu: move lowlevel code to lowlevel.c
Date: Mon, 23 Jun 2014 22:10:32 +0200	[thread overview]
Message-ID: <1403554235-12674-5-git-send-email-sebastian.hesselbarth@gmail.com> (raw)
In-Reply-To: <1403554235-12674-1-git-send-email-sebastian.hesselbarth@gmail.com>

mach-mvebu has two files containing lowlevel code. Consolidate both into
mach-mvebu/lowlevel.c. Also put the now empty mach-mvebu/common.c into
non-lowlevel obj-y as it will be used for common non-lowlevel code later.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: barebox@lists.infradead.org
---
 arch/arm/mach-mvebu/Makefile   |  2 +-
 arch/arm/mach-mvebu/common.c   | 40 ----------------------------------------
 arch/arm/mach-mvebu/lowlevel.c | 37 +++++++++++++++++++++++++++++++++++++
 3 files changed, 38 insertions(+), 41 deletions(-)

diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 6e303663ca89..80b3947cc866 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -1,5 +1,5 @@
 lwl-y				+= lowlevel.o
-lwl-y				+= common.o
+obj-y				+= common.o
 obj-$(CONFIG_ARCH_ARMADA_370)	+= armada-370-xp.o
 obj-$(CONFIG_ARCH_ARMADA_XP)	+= armada-370-xp.o
 obj-$(CONFIG_ARCH_DOVE)		+= dove.o
diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c
index d52b88d71318..4a78a0f37ec5 100644
--- a/arch/arm/mach-mvebu/common.c
+++ b/arch/arm/mach-mvebu/common.c
@@ -15,43 +15,3 @@
  *
  */
 
-#include <common.h>
-#include <io.h>
-#include <sizes.h>
-#include <asm/barebox-arm.h>
-#include <mach/common.h>
-
-/*
- * All MVEBU SoCs start with internal registers at 0xd0000000.
- * To get more contiguous address space and as Linux expects them
- * there, we remap them early to 0xf1000000.
- *
- * There is no way to determine internal registers base address
- * safely later on, as the remap register itself is within the
- * internal registers.
- */
-#define MVEBU_BOOTUP_INT_REG_BASE	0xd0000000
-#define MVEBU_BRIDGE_REG_BASE		0x20000
-#define DEVICE_INTERNAL_BASE_ADDR	(MVEBU_BRIDGE_REG_BASE + 0x80)
-
-static void mvebu_remap_registers(void)
-{
-	writel(MVEBU_REMAP_INT_REG_BASE,
-	       IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
-}
-
-/*
- * Determining the actual memory size is highly SoC dependent,
- * but for all SoCs RAM starts at 0x00000000. Therefore, we start
- * with a minimal memory setup of 64M and probe correct memory size
- * later.
- */
-#define MVEBU_BOOTUP_MEMORY_BASE	0x00000000
-#define MVEBU_BOOTUP_MEMORY_SIZE	SZ_64M
-
-void __naked __noreturn mvebu_barebox_entry(void *boarddata)
-{
-	mvebu_remap_registers();
-	barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
-			  MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
-}
diff --git a/arch/arm/mach-mvebu/lowlevel.c b/arch/arm/mach-mvebu/lowlevel.c
index 147a717ad9f3..7c4facfa1c00 100644
--- a/arch/arm/mach-mvebu/lowlevel.c
+++ b/arch/arm/mach-mvebu/lowlevel.c
@@ -16,9 +16,11 @@
  */
 
 #include <common.h>
+#include <io.h>
 #include <sizes.h>
 #include <asm/barebox-arm.h>
 #include <asm/barebox-arm-head.h>
+#include <mach/common.h>
 #include <mach/lowlevel.h>
 
 void __naked barebox_arm_reset_vector(void)
@@ -26,3 +28,38 @@ void __naked barebox_arm_reset_vector(void)
 	arm_cpu_lowlevel_init();
 	mvebu_barebox_entry(NULL);
 }
+
+/*
+ * All MVEBU SoCs start with internal registers at 0xd0000000.
+ * To get more contiguous address space and as Linux expects them
+ * there, we remap them early to 0xf1000000.
+ *
+ * There is no way to determine internal registers base address
+ * safely later on, as the remap register itself is within the
+ * internal registers.
+ */
+#define MVEBU_BOOTUP_INT_REG_BASE	0xd0000000
+#define MVEBU_BRIDGE_REG_BASE		0x20000
+#define DEVICE_INTERNAL_BASE_ADDR	(MVEBU_BRIDGE_REG_BASE + 0x80)
+
+static void mvebu_remap_registers(void)
+{
+	writel(MVEBU_REMAP_INT_REG_BASE,
+	       IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
+}
+
+/*
+ * Determining the actual memory size is highly SoC dependent,
+ * but for all SoCs RAM starts at 0x00000000. Therefore, we start
+ * with a minimal memory setup of 64M and probe correct memory size
+ * later.
+ */
+#define MVEBU_BOOTUP_MEMORY_BASE	0x00000000
+#define MVEBU_BOOTUP_MEMORY_SIZE	SZ_64M
+
+void __naked __noreturn mvebu_barebox_entry(void *boarddata)
+{
+	mvebu_remap_registers();
+	barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
+			  MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
+}
-- 
2.0.0


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  parent reply	other threads:[~2014-06-23 20:11 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-23 20:10 [PATCH 0/7] Marvell MVEBU assorted fixes and cleanup Sebastian Hesselbarth
2014-06-23 20:10 ` [PATCH 1/7] ARM: mvebu: set model and default hostname for Dove Sebastian Hesselbarth
2014-06-23 20:10 ` [PATCH 2/7] ARM: mvebu: set default TEXT_BASE by SoC Sebastian Hesselbarth
2014-06-23 20:10 ` [PATCH 3/7] ARM: mvebu: delete unused mach/mvebu.h Sebastian Hesselbarth
2014-06-23 20:10 ` Sebastian Hesselbarth [this message]
2014-06-23 20:10 ` [PATCH 5/7] clk: mvebu: fix Armada 370 TCLK frequencies Sebastian Hesselbarth
2014-06-23 20:10 ` [PATCH 6/7] ARM: mvebu: add 25MHz fixed clock for Armada XP Sebastian Hesselbarth
2014-06-23 20:10 ` [PATCH 7/7] clocksource: mvebu: split initialization for Armada 370/XP Sebastian Hesselbarth
2014-06-24  6:11 ` [PATCH 0/7] Marvell MVEBU assorted fixes and cleanup Sascha Hauer

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