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* [PATCH 1/4] Makefile.lib: imxcfg: fix include path
@ 2014-08-12 16:05 Lucas Stach
  2014-08-12 16:05 ` [PATCH 2/4] scripts: imx-image: add input validation to mw Lucas Stach
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Lucas Stach @ 2014-08-12 16:05 UTC (permalink / raw)
  To: barebox

MACH is not defined in this context, also it's very
unlikely that we will use the imximg tool with an other
arch than IMX, so just hardcode the path.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 scripts/Makefile.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 7d97d573ab0a..05387b235b96 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -372,7 +372,7 @@ cmd_imximage_S_dcd=						\
 ) > $@
 
 imxcfg_cpp_flags  = -Wp,-MD,$(depfile) -nostdinc -x assembler-with-cpp \
-      -I $(srctree)/include -I $(MACH)/include \
+      -I $(srctree)/include -I $(srctree)/arch/arm/mach-imx/include \
       -include include/generated/autoconf.h
 
 dcd-tmp = $(subst $(comma),_,$(dot-target).dcd.tmp)
-- 
2.0.1


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^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 2/4] scripts: imx-image: add input validation to mw
  2014-08-12 16:05 [PATCH 1/4] Makefile.lib: imxcfg: fix include path Lucas Stach
@ 2014-08-12 16:05 ` Lucas Stach
  2014-08-12 16:05 ` [PATCH 3/4] arm: mach-imx: add MMDC and CCM register defines for use in DCD Lucas Stach
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Lucas Stach @ 2014-08-12 16:05 UTC (permalink / raw)
  To: barebox

Stop and print a helpful message if we encounter an
illegal token while parsing the DCD config, instead
of silently swallowing the error and pushing random
stuff into the DCD.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 scripts/imx/imx-image.c | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c
index f4890c44d7fa..3a25c0929883 100644
--- a/scripts/imx/imx-image.c
+++ b/scripts/imx/imx-image.c
@@ -384,15 +384,30 @@ static int do_cmd_check(int argc, char *argv[])
 static int do_cmd_write_mem(int argc, char *argv[])
 {
 	uint32_t addr, val, width;
+	char *end;
 
 	if (argc != 4) {
 		fprintf(stderr, "usage: wm [8|16|32] <addr> <val>\n");
 		return -EINVAL;
 	}
 
-	width = strtoul(argv[1], NULL, 0);
-	addr = strtoul(argv[2], NULL, 0);
-	val = strtoul(argv[3], NULL, 0);
+	width = strtoul(argv[1], &end, 0);
+	if (*end != '\0') {
+		fprintf(stderr, "illegal width token \"%s\"\n", argv[1]);
+		return -EINVAL;
+	}
+
+	addr = strtoul(argv[2], &end, 0);
+	if (*end != '\0') {
+		fprintf(stderr, "illegal address token \"%s\"\n", argv[2]);
+		return -EINVAL;
+	}
+
+	val = strtoul(argv[3], &end, 0);
+	if (*end != '\0') {
+		fprintf(stderr, "illegal value token \"%s\"\n", argv[3]);
+		return -EINVAL;
+	}
 
 	width >>= 3;
 
-- 
2.0.1


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^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 3/4] arm: mach-imx: add MMDC and CCM register defines for use in DCD
  2014-08-12 16:05 [PATCH 1/4] Makefile.lib: imxcfg: fix include path Lucas Stach
  2014-08-12 16:05 ` [PATCH 2/4] scripts: imx-image: add input validation to mw Lucas Stach
@ 2014-08-12 16:05 ` Lucas Stach
  2014-08-12 16:05 ` [PATCH 4/4] arm: nitrogen6x: new memory setup from BD u-boot Lucas Stach
  2014-09-01  9:17 ` [PATCH 1/4] Makefile.lib: imxcfg: fix include path Sascha Hauer
  3 siblings, 0 replies; 5+ messages in thread
From: Lucas Stach @ 2014-08-12 16:05 UTC (permalink / raw)
  To: barebox

Makes .imxcfg files a lot more readable.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/mach-imx/include/mach/imx6-ccm-regs.h   | 24 +++++++++
 arch/arm/mach-imx/include/mach/imx6-ddr-regs.h   | 67 ++++++++++++++++++++++++
 arch/arm/mach-imx/include/mach/imx6dl-ddr-regs.h | 57 ++++++++++++++++++++
 arch/arm/mach-imx/include/mach/imx6q-ddr-regs.h  | 57 ++++++++++++++++++++
 4 files changed, 205 insertions(+)
 create mode 100644 arch/arm/mach-imx/include/mach/imx6-ccm-regs.h
 create mode 100644 arch/arm/mach-imx/include/mach/imx6-ddr-regs.h
 create mode 100644 arch/arm/mach-imx/include/mach/imx6dl-ddr-regs.h
 create mode 100644 arch/arm/mach-imx/include/mach/imx6q-ddr-regs.h

diff --git a/arch/arm/mach-imx/include/mach/imx6-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx6-ccm-regs.h
new file mode 100644
index 000000000000..099d5621de62
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/imx6-ccm-regs.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define MX6_CCM_CCOSR		0x020c4060
+#define MX6_CCM_CCGR0		0x020C4068
+#define MX6_CCM_CCGR1		0x020C406c
+#define MX6_CCM_CCGR2		0x020C4070
+#define MX6_CCM_CCGR3		0x020C4074
+#define MX6_CCM_CCGR4		0x020C4078
+#define MX6_CCM_CCGR5		0x020C407c
+#define MX6_CCM_CCGR6		0x020C4080
+
+#define MX6_PMU_MISC2		0x020C8170
diff --git a/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h b/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h
new file mode 100644
index 000000000000..69707f0976bd
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2013 Boundary Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define MX6_MMDC_P0_MDCTL		0x021b0000
+#define MX6_MMDC_P0_MDPDC		0x021b0004
+#define MX6_MMDC_P0_MDOTC		0x021b0008
+#define MX6_MMDC_P0_MDCFG0		0x021b000c
+#define MX6_MMDC_P0_MDCFG1		0x021b0010
+#define MX6_MMDC_P0_MDCFG2		0x021b0014
+#define MX6_MMDC_P0_MDMISC		0x021b0018
+#define MX6_MMDC_P0_MDSCR		0x021b001c
+#define MX6_MMDC_P0_MDREF		0x021b0020
+#define MX6_MMDC_P0_MDRWD		0x021b002c
+#define MX6_MMDC_P0_MDOR		0x021b0030
+#define MX6_MMDC_P0_MDASP		0x021b0040
+#define MX6_MMDC_P0_MAPSR		0x021b0404
+#define MX6_MMDC_P0_MPZQHWCTRL		0x021b0800
+#define MX6_MMDC_P0_MPWLDECTRL0		0x021b080c
+#define MX6_MMDC_P0_MPWLDECTRL1		0x021b0810
+#define MX6_MMDC_P0_MPODTCTRL		0x021b0818
+#define MX6_MMDC_P0_MPRDDQBY0DL		0x021b081c
+#define MX6_MMDC_P0_MPRDDQBY1DL		0x021b0820
+#define MX6_MMDC_P0_MPRDDQBY2DL		0x021b0824
+#define MX6_MMDC_P0_MPRDDQBY3DL		0x021b0828
+#define MX6_MMDC_P0_MPDGCTRL0		0x021b083c
+#define MX6_MMDC_P0_MPDGCTRL1		0x021b0840
+#define MX6_MMDC_P0_MPRDDLCTL		0x021b0848
+#define MX6_MMDC_P0_MPWRDLCTL		0x021b0850
+#define MX6_MMDC_P0_MPMUR0		0x021b08b8
+
+#define MX6_MMDC_P1_MDCTL		0x021b4000
+#define MX6_MMDC_P1_MDPDC		0x021b4004
+#define MX6_MMDC_P1_MDOTC		0x021b4008
+#define MX6_MMDC_P1_MDCFG0		0x021b400c
+#define MX6_MMDC_P1_MDCFG1		0x021b4010
+#define MX6_MMDC_P1_MDCFG2		0x021b4014
+#define MX6_MMDC_P1_MDMISC		0x021b4018
+#define MX6_MMDC_P1_MDSCR		0x021b401c
+#define MX6_MMDC_P1_MDREF		0x021b4020
+#define MX6_MMDC_P1_MDRWD		0x021b402c
+#define MX6_MMDC_P1_MDOR		0x021b4030
+#define MX6_MMDC_P1_MDASP		0x021b4040
+#define MX6_MMDC_P1_MAPSR		0x021b4404
+#define MX6_MMDC_P1_MPZQHWCTRL		0x021b4800
+#define MX6_MMDC_P1_MPWLDECTRL0		0x021b480c
+#define MX6_MMDC_P1_MPWLDECTRL1		0x021b4810
+#define MX6_MMDC_P1_MPODTCTRL		0x021b4818
+#define MX6_MMDC_P1_MPRDDQBY0DL		0x021b481c
+#define MX6_MMDC_P1_MPRDDQBY1DL		0x021b4820
+#define MX6_MMDC_P1_MPRDDQBY2DL		0x021b4824
+#define MX6_MMDC_P1_MPRDDQBY3DL		0x021b4828
+#define MX6_MMDC_P1_MPDGCTRL0		0x021b483c
+#define MX6_MMDC_P1_MPDGCTRL1		0x021b4840
+#define MX6_MMDC_P1_MPRDDLCTL		0x021b4848
+#define MX6_MMDC_P1_MPWRDLCTL		0x021b4850
+#define MX6_MMDC_P1_MPMUR0		0x021b48b8
diff --git a/arch/arm/mach-imx/include/mach/imx6dl-ddr-regs.h b/arch/arm/mach-imx/include/mach/imx6dl-ddr-regs.h
new file mode 100644
index 000000000000..541d00e24489
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/imx6dl-ddr-regs.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2013 Boundary Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define MX6_IOM_DRAM_DQM0	0x020e0470
+#define MX6_IOM_DRAM_DQM1	0x020e0474
+#define MX6_IOM_DRAM_DQM2	0x020e0478
+#define MX6_IOM_DRAM_DQM3	0x020e047c
+#define MX6_IOM_DRAM_DQM4	0x020e0480
+#define MX6_IOM_DRAM_DQM5	0x020e0484
+#define MX6_IOM_DRAM_DQM6	0x020e0488
+#define MX6_IOM_DRAM_DQM7	0x020e048c
+
+#define MX6_IOM_DRAM_CAS	0x020e0464
+#define MX6_IOM_DRAM_RAS	0x020e0490
+#define MX6_IOM_DRAM_RESET	0x020e0494
+#define MX6_IOM_DRAM_SDCLK_0	0x020e04ac
+#define MX6_IOM_DRAM_SDCLK_1	0x020e04b0
+#define MX6_IOM_DRAM_SDBA2	0x020e04a0
+#define MX6_IOM_DRAM_SDCKE0	0x020e04a4
+#define MX6_IOM_DRAM_SDCKE1	0x020e04a8
+#define MX6_IOM_DRAM_SDODT0	0x020e04b4
+#define MX6_IOM_DRAM_SDODT1	0x020e04b8
+
+#define MX6_IOM_DRAM_SDQS0	0x020e04bc
+#define MX6_IOM_DRAM_SDQS1	0x020e04c0
+#define MX6_IOM_DRAM_SDQS2	0x020e04c4
+#define MX6_IOM_DRAM_SDQS3	0x020e04c8
+#define MX6_IOM_DRAM_SDQS4	0x020e04cc
+#define MX6_IOM_DRAM_SDQS5	0x020e04d0
+#define MX6_IOM_DRAM_SDQS6	0x020e04d4
+#define MX6_IOM_DRAM_SDQS7	0x020e04d8
+
+#define MX6_IOM_GRP_B0DS	0x020e0764
+#define MX6_IOM_GRP_B1DS	0x020e0770
+#define MX6_IOM_GRP_B2DS	0x020e0778
+#define MX6_IOM_GRP_B3DS	0x020e077c
+#define MX6_IOM_GRP_B4DS	0x020e0780
+#define MX6_IOM_GRP_B5DS	0x020e0784
+#define MX6_IOM_GRP_B6DS	0x020e078c
+#define MX6_IOM_GRP_B7DS	0x020e0748
+#define MX6_IOM_GRP_ADDDS	0x020e074c
+#define MX6_IOM_DDRMODE_CTL	0x020e0750
+#define MX6_IOM_GRP_DDRPKE	0x020e0754
+#define MX6_IOM_GRP_DDRMODE	0x020e0760
+#define MX6_IOM_GRP_CTLDS	0x020e076c
+#define MX6_IOM_GRP_DDR_TYPE	0x020e0774
diff --git a/arch/arm/mach-imx/include/mach/imx6q-ddr-regs.h b/arch/arm/mach-imx/include/mach/imx6q-ddr-regs.h
new file mode 100644
index 000000000000..f91057437064
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/imx6q-ddr-regs.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2013 Boundary Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define MX6_IOM_DRAM_DQM0	0x020e05ac
+#define MX6_IOM_DRAM_DQM1	0x020e05b4
+#define MX6_IOM_DRAM_DQM2	0x020e0528
+#define MX6_IOM_DRAM_DQM3	0x020e0520
+#define MX6_IOM_DRAM_DQM4	0x020e0514
+#define MX6_IOM_DRAM_DQM5	0x020e0510
+#define MX6_IOM_DRAM_DQM6	0x020e05bc
+#define MX6_IOM_DRAM_DQM7	0x020e05c4
+
+#define MX6_IOM_DRAM_CAS	0x020e056c
+#define MX6_IOM_DRAM_RAS	0x020e0578
+#define MX6_IOM_DRAM_RESET	0x020e057c
+#define MX6_IOM_DRAM_SDCLK_0	0x020e0588
+#define MX6_IOM_DRAM_SDCLK_1	0x020e0594
+#define MX6_IOM_DRAM_SDBA2	0x020e058c
+#define MX6_IOM_DRAM_SDCKE0	0x020e0590
+#define MX6_IOM_DRAM_SDCKE1	0x020e0598
+#define MX6_IOM_DRAM_SDODT0	0x020e059c
+#define MX6_IOM_DRAM_SDODT1	0x020e05a0
+
+#define MX6_IOM_DRAM_SDQS0	0x020e05a8
+#define MX6_IOM_DRAM_SDQS1	0x020e05b0
+#define MX6_IOM_DRAM_SDQS2	0x020e0524
+#define MX6_IOM_DRAM_SDQS3	0x020e051c
+#define MX6_IOM_DRAM_SDQS4	0x020e0518
+#define MX6_IOM_DRAM_SDQS5	0x020e050c
+#define MX6_IOM_DRAM_SDQS6	0x020e05b8
+#define MX6_IOM_DRAM_SDQS7	0x020e05c0
+
+#define MX6_IOM_GRP_B0DS	0x020e0784
+#define MX6_IOM_GRP_B1DS	0x020e0788
+#define MX6_IOM_GRP_B2DS	0x020e0794
+#define MX6_IOM_GRP_B3DS	0x020e079c
+#define MX6_IOM_GRP_B4DS	0x020e07a0
+#define MX6_IOM_GRP_B5DS	0x020e07a4
+#define MX6_IOM_GRP_B6DS	0x020e07a8
+#define MX6_IOM_GRP_B7DS	0x020e0748
+#define MX6_IOM_GRP_ADDDS	0x020e074c
+#define MX6_IOM_DDRMODE_CTL	0x020e0750
+#define MX6_IOM_GRP_DDRPKE	0x020e0758
+#define MX6_IOM_GRP_DDRMODE	0x020e0774
+#define MX6_IOM_GRP_CTLDS	0x020e078c
+#define MX6_IOM_GRP_DDR_TYPE	0x020e0798
-- 
2.0.1


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^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 4/4] arm: nitrogen6x: new memory setup from BD u-boot
  2014-08-12 16:05 [PATCH 1/4] Makefile.lib: imxcfg: fix include path Lucas Stach
  2014-08-12 16:05 ` [PATCH 2/4] scripts: imx-image: add input validation to mw Lucas Stach
  2014-08-12 16:05 ` [PATCH 3/4] arm: mach-imx: add MMDC and CCM register defines for use in DCD Lucas Stach
@ 2014-08-12 16:05 ` Lucas Stach
  2014-09-01  9:17 ` [PATCH 1/4] Makefile.lib: imxcfg: fix include path Sascha Hauer
  3 siblings, 0 replies; 5+ messages in thread
From: Lucas Stach @ 2014-08-12 16:05 UTC (permalink / raw)
  To: barebox

This fixes various stability issues seen on new boards
with the old setup.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 .../1066mhz_4x128mx16.imxcfg                       |  37 ++++++++
 .../arm/boards/boundarydevices-nitrogen6x/Makefile |   3 +-
 .../boundarydevices-nitrogen6x/clocks.imxcfg       |   7 ++
 .../flash-header-nitrogen6dl-1g.imxcfg             |  11 +++
 .../flash-header-nitrogen6q-1g.imxcfg              |  11 +++
 .../flash-header-nitrogen6x-1g.imxcfg              | 101 ---------------------
 .../boundarydevices-nitrogen6x/ram-base.imxcfg     |  67 ++++++++++++++
 images/Makefile.imx                                |   4 +-
 8 files changed, 136 insertions(+), 105 deletions(-)
 create mode 100644 arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg
 create mode 100644 arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg
 create mode 100644 arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
 create mode 100644 arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
 delete mode 100644 arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
 create mode 100644 arch/arm/boards/boundarydevices-nitrogen6x/ram-base.imxcfg

diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg
new file mode 100644
index 000000000000..8175cfee009c
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg
@@ -0,0 +1,37 @@
+wm 32 MX6_MMDC_P0_MDPDC			0x00020036
+wm 32 MX6_MMDC_P0_MDSCR			0x00008000
+wm 32 MX6_MMDC_P0_MDCFG0		0x555A7974
+wm 32 MX6_MMDC_P0_MDCFG1		0xDB538F64
+wm 32 MX6_MMDC_P0_MDCFG2		0x01FF00DB
+wm 32 MX6_MMDC_P0_MDRWD			0x000026D2
+wm 32 MX6_MMDC_P0_MDOR			0x005A1023
+wm 32 MX6_MMDC_P0_MDOTC			0x09444040
+wm 32 MX6_MMDC_P0_MDPDC			0x00025576
+wm 32 MX6_MMDC_P0_MDASP			0x00000027
+wm 32 MX6_MMDC_P0_MDCTL			0x831A0000
+wm 32 MX6_MMDC_P0_MDSCR			0x04088032
+wm 32 MX6_MMDC_P0_MDSCR			0x00008033
+wm 32 MX6_MMDC_P0_MDSCR			0x00428031
+wm 32 MX6_MMDC_P0_MDSCR			0x19308030
+wm 32 MX6_MMDC_P0_MDSCR			0x04008040
+wm 32 MX6_MMDC_P0_MPZQHWCTRL	0xA1390003
+wm 32 MX6_MMDC_P1_MPZQHWCTRL	0xA1390003
+wm 32 MX6_MMDC_P0_MDREF			0x00005800
+wm 32 MX6_MMDC_P0_MPODTCTRL		0x00022227
+wm 32 MX6_MMDC_P1_MPODTCTRL		0x00022227
+wm 32 MX6_MMDC_P0_MPDGCTRL0		0x42720306
+wm 32 MX6_MMDC_P0_MPDGCTRL1		0x026F0266
+wm 32 MX6_MMDC_P1_MPDGCTRL0		0x4273030A
+wm 32 MX6_MMDC_P1_MPDGCTRL1		0x02740240
+wm 32 MX6_MMDC_P0_MPRDDLCTL		0x45393B3E
+wm 32 MX6_MMDC_P1_MPRDDLCTL		0x403A3747
+wm 32 MX6_MMDC_P0_MPWRDLCTL		0x40434541
+wm 32 MX6_MMDC_P1_MPWRDLCTL		0x473E4A3B
+wm 32 MX6_MMDC_P0_MPWLDECTRL0	0x0011000E
+wm 32 MX6_MMDC_P0_MPWLDECTRL1	0x000E001B
+wm 32 MX6_MMDC_P1_MPWLDECTRL0	0x00190015
+wm 32 MX6_MMDC_P1_MPWLDECTRL1	0x00070018
+wm 32 MX6_MMDC_P0_MPMUR0		0x00000800
+wm 32 MX6_MMDC_P1_MPMUR0		0x00000800
+wm 32 MX6_MMDC_P0_MDSCR			0x00000000
+wm 32 MX6_MMDC_P0_MAPSR			0x00011006
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/Makefile b/arch/arm/boards/boundarydevices-nitrogen6x/Makefile
index 177c5d81a5c7..0ec04ce8986e 100644
--- a/arch/arm/boards/boundarydevices-nitrogen6x/Makefile
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/Makefile
@@ -1,3 +1,2 @@
-obj-y += board.o flash-header-nitrogen6x-1g.dcd.o
-extra-y += flash-header-nitrogen6x-1g.dcd.S flash-header-nitrogen6x-1g.dcd
+obj-y += board.o 
 lwl-y += lowlevel.o
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg
new file mode 100644
index 000000000000..55adb6055705
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg
@@ -0,0 +1,7 @@
+wm 32 MX6_CCM_CCGR0		0x00C03F3F
+wm 32 MX6_CCM_CCGR1		0x0030FC03
+wm 32 MX6_CCM_CCGR2		0x0FFFC000
+wm 32 MX6_CCM_CCGR3		0x3FF00000
+wm 32 MX6_CCM_CCGR4		0x00FFF300
+wm 32 MX6_CCM_CCGR5		0x0F0000C3
+wm 32 MX6_CCM_CCGR6		0x000003FF
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
new file mode 100644
index 000000000000..76fad119a6ac
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
@@ -0,0 +1,11 @@
+soc imx6
+loadaddr 0x20000000
+dcdofs 0x400
+
+#include <mach/imx6-ddr-regs.h>
+#include <mach/imx6dl-ddr-regs.h>
+#include <mach/imx6-ccm-regs.h>
+
+#include "ram-base.imxcfg"
+#include "1066mhz_4x128mx16.imxcfg"
+#include "clocks.imxcfg"
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
new file mode 100644
index 000000000000..ee3145bc327d
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
@@ -0,0 +1,11 @@
+soc imx6
+loadaddr 0x20000000
+dcdofs 0x400
+
+#include <mach/imx6-ddr-regs.h>
+#include <mach/imx6q-ddr-regs.h>
+#include <mach/imx6-ccm-regs.h>
+
+#include "ram-base.imxcfg"
+#include "1066mhz_4x128mx16.imxcfg"
+#include "clocks.imxcfg"
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
deleted file mode 100644
index b6c75800c6af..000000000000
--- a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
+++ /dev/null
@@ -1,101 +0,0 @@
-soc imx6
-loadaddr 0x20000000
-dcdofs 0x400
-
-wm 32 0x020e05a8 0x00000030
-wm 32 0x020e05b0 0x00000030
-wm 32 0x020e0524 0x00000030
-wm 32 0x020e051c 0x00000030
-wm 32 0x020e0518 0x00000030
-wm 32 0x020e050c 0x00000030
-wm 32 0x020e05b8 0x00000030
-wm 32 0x020e05c0 0x00000030
-wm 32 0x020e05ac 0x00020030
-wm 32 0x020e05b4 0x00020030
-wm 32 0x020e0528 0x00020030
-wm 32 0x020e0520 0x00020030
-wm 32 0x020e0514 0x00020030
-wm 32 0x020e0510 0x00020030
-wm 32 0x020e05bc 0x00020030
-wm 32 0x020e05c4 0x00020030
-wm 32 0x020e056c 0x00020030
-wm 32 0x020e0578 0x00020030
-wm 32 0x020e0588 0x00020030
-wm 32 0x020e0594 0x00020030
-wm 32 0x020e057c 0x00020030
-wm 32 0x020e0590 0x00003000
-wm 32 0x020e0598 0x00003000
-wm 32 0x020e058c 0x00000000
-wm 32 0x020e059c 0x00003030
-wm 32 0x020e05a0 0x00003030
-wm 32 0x020e0784 0x00000030
-wm 32 0x020e0788 0x00000030
-wm 32 0x020e0794 0x00000030
-wm 32 0x020e079c 0x00000030
-wm 32 0x020e07a0 0x00000030
-wm 32 0x020e07a4 0x00000030
-wm 32 0x020e07a8 0x00000030
-wm 32 0x020e0748 0x00000030
-wm 32 0x020e074c 0x00000030
-wm 32 0x020e0750 0x00020000
-wm 32 0x020e0758 0x00000000
-wm 32 0x020e0774 0x00020000
-wm 32 0x020e078c 0x00000030
-wm 32 0x020e0798 0x000c0000
-wm 32 0x021b081c 0x33333333
-wm 32 0x021b0820 0x33333333
-wm 32 0x021b0824 0x33333333
-wm 32 0x021b0828 0x33333333
-wm 32 0x021b481c 0x33333333
-wm 32 0x021b4820 0x33333333
-wm 32 0x021b4824 0x33333333
-wm 32 0x021b4828 0x33333333
-wm 32 0x021b0018 0x00081740
-wm 32 0x021b001c 0x00008000
-wm 32 0x021b000c 0x555a7975
-wm 32 0x021b0010 0xff538e64
-wm 32 0x021b0014 0x01ff00db
-wm 32 0x021b002c 0x000026d2
-wm 32 0x021b0030 0x005b0e21
-wm 32 0x021b0008 0x09444040
-wm 32 0x021b0004 0x00025576
-wm 32 0x021b0040 0x00000027
-wm 32 0x021b0000 0x831a0000
-wm 32 0x021b001c 0x04088032
-wm 32 0x021b001c 0x0408803a
-wm 32 0x021b001c 0x00008033
-wm 32 0x021b001c 0x0000803b
-wm 32 0x021b001c 0x00428031
-wm 32 0x021b001c 0x00428039
-wm 32 0x021b001c 0x09408030
-wm 32 0x021b001c 0x09408038
-wm 32 0x021b001c 0x04008040
-wm 32 0x021b001c 0x04008048
-wm 32 0x021b0800 0xa1380003
-wm 32 0x021b4800 0xa1380003
-wm 32 0x021b0020 0x00005800
-wm 32 0x021b0818 0x00022227
-wm 32 0x021b4818 0x00022227
-wm 32 0x021b083c 0x434b0350
-wm 32 0x021b0840 0x034c0359
-wm 32 0x021b483c 0x434b0350
-wm 32 0x021b4840 0x03650348
-wm 32 0x021b0848 0x4436383b
-wm 32 0x021b4848 0x39393341
-wm 32 0x021b0850 0x35373933
-wm 32 0x021b4850 0x48254A36
-wm 32 0x021b080c 0x001f001f
-wm 32 0x021b0810 0x001f001f
-wm 32 0x021b480c 0x00440044
-wm 32 0x021b4810 0x00440044
-wm 32 0x021b08b8 0x00000800
-wm 32 0x021b48b8 0x00000800
-wm 32 0x021b001c 0x00000000
-wm 32 0x021b0404 0x00011006
-wm 32 0x020c4068 0x00c03f3f
-wm 32 0x020c406c 0x0030fc03
-wm 32 0x020c4070 0x0fffc000
-wm 32 0x020c4074 0x3ff00000
-wm 32 0x020c4078 0x00fff300
-wm 32 0x020c407c 0x0f0000c3
-wm 32 0x020c4080 0x000003ff
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/ram-base.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/ram-base.imxcfg
new file mode 100644
index 000000000000..60c8fa2b5123
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/ram-base.imxcfg
@@ -0,0 +1,67 @@
+wm 32 MX6_IOM_DRAM_SDQS0		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS1		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS2		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS3		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS4		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS5		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS6		0x00000030
+wm 32 MX6_IOM_DRAM_SDQS7		0x00000030
+
+wm 32 MX6_IOM_GRP_B0DS			0x00000030
+wm 32 MX6_IOM_GRP_B1DS			0x00000030
+wm 32 MX6_IOM_GRP_B2DS			0x00000030
+wm 32 MX6_IOM_GRP_B3DS			0x00000030
+wm 32 MX6_IOM_GRP_B4DS			0x00000030
+wm 32 MX6_IOM_GRP_B5DS			0x00000030
+wm 32 MX6_IOM_GRP_B6DS			0x00000030
+wm 32 MX6_IOM_GRP_B7DS			0x00000030
+wm 32 MX6_IOM_GRP_ADDDS			0x00000030
+/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
+wm 32 MX6_IOM_GRP_CTLDS			0x00000030
+
+wm 32 MX6_IOM_DRAM_DQM0			0x00020030
+wm 32 MX6_IOM_DRAM_DQM1			0x00020030
+wm 32 MX6_IOM_DRAM_DQM2			0x00020030
+wm 32 MX6_IOM_DRAM_DQM3			0x00020030
+wm 32 MX6_IOM_DRAM_DQM4			0x00020030
+wm 32 MX6_IOM_DRAM_DQM5			0x00020030
+wm 32 MX6_IOM_DRAM_DQM6			0x00020030
+wm 32 MX6_IOM_DRAM_DQM7			0x00020030
+
+wm 32 MX6_IOM_DRAM_CAS			0x00020030
+wm 32 MX6_IOM_DRAM_RAS			0x00020030
+wm 32 MX6_IOM_DRAM_SDCLK_0		0x00020030
+wm 32 MX6_IOM_DRAM_SDCLK_1		0x00020030
+
+wm 32 MX6_IOM_DRAM_RESET		0x00020030
+wm 32 MX6_IOM_DRAM_SDCKE0		0x00003000
+wm 32 MX6_IOM_DRAM_SDCKE1		0x00003000
+
+wm 32 MX6_IOM_DRAM_SDODT0		0x00003030
+wm 32 MX6_IOM_DRAM_SDODT1		0x00003030
+
+/* (differential input) */
+wm 32 MX6_IOM_DDRMODE_CTL		0x00020000
+/* (differential input) */
+wm 32 MX6_IOM_GRP_DDRMODE		0x00020000
+/* disable ddr pullups */
+wm 32 MX6_IOM_GRP_DDRPKE		0x00000000
+wm 32 MX6_IOM_DRAM_SDBA2		0x00000000
+/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
+wm 32 MX6_IOM_GRP_DDR_TYPE		0x000C0000
+
+/* Read data DQ Byte0-3 delay */
+wm 32 MX6_MMDC_P0_MPRDDQBY0DL	0x33333333
+wm 32 MX6_MMDC_P0_MPRDDQBY1DL	0x33333333
+wm 32 MX6_MMDC_P0_MPRDDQBY2DL	0x33333333
+wm 32 MX6_MMDC_P0_MPRDDQBY3DL	0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY0DL	0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY1DL	0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY2DL	0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY3DL	0x33333333
+
+/* MDMISC	mirroring	interleaved (row/bank/col) */
+wm 32 MX6_MMDC_P0_MDMISC		0x00081740
+
+/* MDSCR	con_req */
+wm 32 MX6_MMDC_P0_MDSCR			0x00008000
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 5ff72957c6f4..e559a75007bc 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -151,12 +151,12 @@ FILE_barebox-solidrun-imx6dl-hummingboard.img = start_imx6dl_hummingboard.pblx.i
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-imx6dl-hummingboard.img
 
 pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6q_nitrogen6x_1g
-CFG_start_imx6q_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
+CFG_start_imx6q_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
 FILE_barebox-boundarydevices-imx6q-nitrogen6x-1g.img = start_imx6q_nitrogen6x_1g.pblx.imximg
 image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6q-nitrogen6x-1g.img
 
 pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6dl_nitrogen6x_1g
-CFG_start_imx6dl_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6x-1g.imxcfg
+CFG_start_imx6dl_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
 FILE_barebox-boundarydevices-imx6dl-nitrogen6x-1g.img = start_imx6dl_nitrogen6x_1g.pblx.imximg
 image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6dl-nitrogen6x-1g.img
 
-- 
2.0.1


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^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 1/4] Makefile.lib: imxcfg: fix include path
  2014-08-12 16:05 [PATCH 1/4] Makefile.lib: imxcfg: fix include path Lucas Stach
                   ` (2 preceding siblings ...)
  2014-08-12 16:05 ` [PATCH 4/4] arm: nitrogen6x: new memory setup from BD u-boot Lucas Stach
@ 2014-09-01  9:17 ` Sascha Hauer
  3 siblings, 0 replies; 5+ messages in thread
From: Sascha Hauer @ 2014-09-01  9:17 UTC (permalink / raw)
  To: Lucas Stach; +Cc: barebox

On Tue, Aug 12, 2014 at 06:05:49PM +0200, Lucas Stach wrote:
> MACH is not defined in this context, also it's very
> unlikely that we will use the imximg tool with an other
> arch than IMX, so just hardcode the path.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Applied all, thanks

Sascha

> ---
>  scripts/Makefile.lib | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> index 7d97d573ab0a..05387b235b96 100644
> --- a/scripts/Makefile.lib
> +++ b/scripts/Makefile.lib
> @@ -372,7 +372,7 @@ cmd_imximage_S_dcd=						\
>  ) > $@
>  
>  imxcfg_cpp_flags  = -Wp,-MD,$(depfile) -nostdinc -x assembler-with-cpp \
> -      -I $(srctree)/include -I $(MACH)/include \
> +      -I $(srctree)/include -I $(srctree)/arch/arm/mach-imx/include \
>        -include include/generated/autoconf.h
>  
>  dcd-tmp = $(subst $(comma),_,$(dot-target).dcd.tmp)
> -- 
> 2.0.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-09-01  9:18 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-08-12 16:05 [PATCH 1/4] Makefile.lib: imxcfg: fix include path Lucas Stach
2014-08-12 16:05 ` [PATCH 2/4] scripts: imx-image: add input validation to mw Lucas Stach
2014-08-12 16:05 ` [PATCH 3/4] arm: mach-imx: add MMDC and CCM register defines for use in DCD Lucas Stach
2014-08-12 16:05 ` [PATCH 4/4] arm: nitrogen6x: new memory setup from BD u-boot Lucas Stach
2014-09-01  9:17 ` [PATCH 1/4] Makefile.lib: imxcfg: fix include path Sascha Hauer

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