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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
To: barebox@lists.infradead.org
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Subject: [PATCH 1/5] ARM: mvebu: Enable PUP register
Date: Sat, 23 Aug 2014 19:53:36 -0300	[thread overview]
Message-ID: <1408834420-899-2-git-send-email-ezequiel.garcia@free-electrons.com> (raw)
In-Reply-To: <1408834420-899-1-git-send-email-ezequiel.garcia@free-electrons.com>

As reported by Sebastian, we need to enable this explicitly for the
Tx clock on RGMII. While here, let's enable all the other peripherals.

Although this is documented to be required only for Armada XP SoC,
it has been found to be harmless on Armada 370, so we do it unconditionally
to simplify the code.

Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
 arch/arm/mach-mvebu/armada-370-xp.c                   | 5 +++++
 arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h | 7 +++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index f2b991e..96d5878 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -62,6 +62,11 @@ static int armada_370_xp_init_soc(void)
 	mvebu_set_memory(phys_base, phys_size);
 	mvebu_mbus_add_range(0xf0, 0x01, MVEBU_REMAP_INT_REG_BASE);
 
+	/* Enable GBE0, GBE1, LCD and NAND PUP */
+	reg = readl(ARMADA_XP_PUP_ENABLE_BASE);
+	reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN;
+	writel(reg, ARMADA_XP_PUP_ENABLE_BASE);
+
 	return 0;
 }
 core_initcall(armada_370_xp_init_soc);
diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
index ccc687c..f6db784 100644
--- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
+++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
@@ -30,6 +30,13 @@
 #define  SAR_TCLK_FREQ			BIT(20)
 #define  SAR_HIGH			0x04
 
+#define ARMADA_XP_PUP_ENABLE_BASE       (ARMADA_370_XP_INT_REGS_BASE + 0x1864c)
+#define  GE0_PUP_EN			BIT(0)
+#define  GE1_PUP_EN			BIT(1)
+#define  LCD_PUP_EN			BIT(2)
+#define  NAND_PUP_EN			BIT(4)
+
+
 #define ARMADA_370_XP_SDRAM_BASE	(ARMADA_370_XP_INT_REGS_BASE + 0x20000)
 #define  DDR_BASE_CS			0x180
 #define  DDR_BASE_CSn(n)		(DDR_BASE_CS + ((n) * 0x8))
-- 
2.0.1


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  reply	other threads:[~2014-08-23 22:55 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-23 22:53 [PATCH 0/5] mvebu: Add network support for Armada 370/XP Ezequiel Garcia
2014-08-23 22:53 ` Ezequiel Garcia [this message]
2014-08-26 14:28   ` [PATCH 1/5] ARM: mvebu: Enable PUP register Sebastian Hesselbarth
2014-08-23 22:53 ` [PATCH 2/5] net: phy: Support Marvell 88EE1545 PHY Ezequiel Garcia
2014-08-23 22:53 ` [PATCH 3/5] net: phy: Support Marvell 88EE1543 PHY Ezequiel Garcia
2014-08-26 20:13   ` [PATCH] net: phy: Support Marvell 88E1318S and 88E1510 PHYs Sebastian Hesselbarth
2014-08-23 22:53 ` [PATCH 4/5] net: Add driver for Armada 370/XP 10/100/1000 Mbps network controller Ezequiel Garcia
2014-08-26 14:30   ` Sebastian Hesselbarth
2014-08-26 16:20     ` Ezequiel Garcia
2014-08-26 20:06   ` Sebastian Hesselbarth
2014-08-23 22:53 ` [PATCH 5/5] configs: Add network options to Armada 370/XP boards Ezequiel Garcia
2014-09-01  8:55 ` [PATCH 0/5] mvebu: Add network support for Armada 370/XP Sascha Hauer

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