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From: "Teresa Gámez" <t.gamez@phytec.de>
To: barebox@lists.infradead.org
Subject: [PATCH 3/5] ARM: phyCORE-AM335x: Fixup RAM setting naming
Date: Thu, 4 Sep 2014 08:50:38 +0200	[thread overview]
Message-ID: <1409813440-9512-3-git-send-email-t.gamez@phytec.de> (raw)
In-Reply-To: <1409813440-9512-1-git-send-email-t.gamez@phytec.de>

Naming is confusing and wrong. Fixed it up.

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
---
 arch/arm/boards/phytec-phycore-am335x/lowlevel.c |   30 +++++++++++-----------
 images/Makefile.am33xx                           |   18 ++++++------
 2 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
index ff0b021..a15e151 100644
--- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
@@ -33,14 +33,14 @@ struct pcm051_sdram_timings {
 };
 
 enum {
-	MT41J128M16125IT_1x256M16,
-	MT41J64M1615IT_1x128M16,
-	MT41J256M16HA15EIT_1x512M16,
+	MT41J128M16125IT_256MB,
+	MT41J64M1615IT_128MB,
+	MT41J256M16HA15EIT_512MB,
 };
 
 struct pcm051_sdram_timings timings[] = {
-	/* 1x256M16 */
-	[MT41J128M16125IT_1x256M16] = {
+	/* 256MB */
+	[MT41J128M16125IT_256MB] = {
 		.regs = {
 			.emif_read_latency	= 0x7,
 			.emif_tim1		= 0x0AAAD4DB,
@@ -58,8 +58,8 @@ struct pcm051_sdram_timings timings[] = {
 		},
 	},
 
-	/* 1x128M16 */
-	[MT41J64M1615IT_1x128M16] = {
+	/* 128MB */
+	[MT41J64M1615IT_128MB] = {
 		.regs =  {
 			.emif_read_latency	= 0x7,
 			.emif_tim1		= 0x0AAAE4DB,
@@ -77,8 +77,8 @@ struct pcm051_sdram_timings timings[] = {
 		},
 	},
 
-	/* 1x512MB */
-	[MT41J256M16HA15EIT_1x512M16] = {
+	/* 512MB */
+	[MT41J256M16HA15EIT_512MB] = {
 		.regs = {
 			.emif_read_latency	= 0x7,
 			.emif_tim1		= 0x0AAAE4DB,
@@ -154,19 +154,19 @@ static noinline void pcm051_board_entry(unsigned long bootinfo, int sdram)
 	pcm051_board_init(sdram);
 }
 
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_1x256m16, bootinfo, r1, r2)
+ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_256mb, bootinfo, r1, r2)
 {
-	pcm051_board_entry(bootinfo, MT41J128M16125IT_1x256M16);
+	pcm051_board_entry(bootinfo, MT41J128M16125IT_256MB);
 }
 
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_1x128m16, bootinfo, r1, r2)
+ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_128mb, bootinfo, r1, r2)
 {
-	pcm051_board_entry(bootinfo, MT41J64M1615IT_1x128M16);
+	pcm051_board_entry(bootinfo, MT41J64M1615IT_128MB);
 }
 
-ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_1x512m16, bootinfo, r1, r2)
+ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_512mb, bootinfo, r1, r2)
 {
-	pcm051_board_entry(bootinfo, MT41J256M16HA15EIT_1x512M16);
+	pcm051_board_entry(bootinfo, MT41J256M16HA15EIT_512MB);
 }
 
 ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1, r2)
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index fa1f848..c1f19c1 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -11,17 +11,17 @@ pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sdram
 FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
 am33xx-barebox-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore.img
 
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_1x256m16
-FILE_barebox-am33xx-phytec-phycore-mlo-1x256m16.img = start_am33xx_phytec_phycore_sram_1x256m16.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-1x256m16.img
+pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_256mb
+FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-256mb.img
 
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_1x128m16
-FILE_barebox-am33xx-phytec-phycore-mlo-1x128m16.img = start_am33xx_phytec_phycore_sram_1x128m16.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-1x128m16.img
+pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_128mb
+FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-128mb.img
 
-pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_1x512m16
-FILE_barebox-am33xx-phytec-phycore-mlo-1x512m16.img = start_am33xx_phytec_phycore_sram_1x512m16.pblx.mlo
-am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-1x512m16.img
+pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_512mb
+FILE_barebox-am33xx-phytec-phycore-mlo-512mb.img = start_am33xx_phytec_phycore_sram_512mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-512mb.img
 
 pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sdram
 FILE_barebox-am33xx-beaglebone.img = start_am33xx_beaglebone_sdram.pblx
-- 
1.7.0.4


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  parent reply	other threads:[~2014-09-04  6:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-04  6:50 [PATCH 1/5] ARM: phyCORE-AM335x: Updated SPI NOR dts entries Teresa Gámez
2014-09-04  6:50 ` [PATCH 2/5] ARM: phyCORE-AM335x: Update RAM Timings Teresa Gámez
2014-09-04  6:50 ` Teresa Gámez [this message]
2014-09-04  6:50 ` [PATCH 4/5] ARM: phyCORE-AM335x: Add support for 2x512MB RAM Teresa Gámez
2014-09-04  6:50 ` [PATCH 5/5] ARM: phyCORE-AM335x: Update partition table Teresa Gámez
2014-09-04  7:13   ` Alexander Aring
2014-09-04  7:15     ` Alexander Aring
2014-09-05  5:37 ` [PATCH 1/5] ARM: phyCORE-AM335x: Updated SPI NOR dts entries Sascha Hauer
2014-09-05  6:32   ` Alexander Aring
2014-09-05  6:51     ` Sascha Hauer
2014-09-05  7:18       ` Alexander Aring

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