mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Subject: [PATCH v3 02/10] ARM: socfpga: avoid using external regulator for PLL
Date: Mon,  9 Feb 2015 11:47:43 +0100	[thread overview]
Message-ID: <1423478871-15276-3-git-send-email-s.trumtrar@pengutronix.de> (raw)
In-Reply-To: <1423478871-15276-1-git-send-email-s.trumtrar@pengutronix.de>

From Altera U-Boot:
	FogBugz #210587: Fixing PLL HW configuration issue

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/mach-socfpga/clock-manager.c              | 20 +++++++++++++-------
 arch/arm/mach-socfpga/include/mach/clock-manager.h |  5 +++++
 2 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-socfpga/clock-manager.c b/arch/arm/mach-socfpga/clock-manager.c
index 13ca69b977a0..dc81301efd01 100644
--- a/arch/arm/mach-socfpga/clock-manager.c
+++ b/arch/arm/mach-socfpga/clock-manager.c
@@ -123,11 +123,14 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg)
 	 * Put all plls VCO registers back to reset value.
 	 * Some code might have messed with them.
 	 */
-	writel(CLKMGR_MAINPLLGRP_VCO_RESET_VALUE,
+	writel(CLKMGR_MAINPLLGRP_VCO_RESET_VALUE &
+		~CLKMGR_MAINPLLGRP_VCO_REGEXTSEL_MASK,
 		cm + CLKMGR_MAINPLLGRP_VCO_ADDRESS);
-	writel(CLKMGR_PERPLLGRP_VCO_RESET_VALUE,
+	writel(CLKMGR_PERPLLGRP_VCO_RESET_VALUE &
+		~CLKMGR_PERPLLGRP_VCO_REGEXTSEL_MASK,
 		cm + CLKMGR_PERPLLGRP_VCO_ADDRESS);
-	writel(CLKMGR_SDRPLLGRP_VCO_RESET_VALUE,
+	writel(CLKMGR_SDRPLLGRP_VCO_RESET_VALUE &
+		~CLKMGR_SDRPLLGRP_VCO_REGEXTSEL_MASK,
 		cm + CLKMGR_SDRPLLGRP_VCO_ADDRESS);
 
 	/*
@@ -151,12 +154,15 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg)
 	 * We made sure bgpwr down was assert for 5 us. Now deassert BG PWR DN
 	 * with numerator and denominator.
 	 */
-	writel(cfg->main_vco_base | CLKMGR_MAINPLLGRP_VCO_REGEXTSEL_MASK,
+	writel(cfg->main_vco_base | CLEAR_BGP_EN_PWRDN,
 		cm + CLKMGR_MAINPLLGRP_VCO_ADDRESS);
-	writel(cfg->peri_vco_base | CLKMGR_PERPLLGRP_VCO_REGEXTSEL_MASK,
+	writel(cfg->peri_vco_base | CLEAR_BGP_EN_PWRDN,
 		cm + CLKMGR_PERPLLGRP_VCO_ADDRESS);
-	writel(cfg->sdram_vco_base | CLKMGR_SDRPLLGRP_VCO_REGEXTSEL_MASK,
-		cm + CLKMGR_SDRPLLGRP_VCO_ADDRESS);
+	writel(cfg->sdram_vco_base |
+	       CLKMGR_SDRPLLGRP_VCO_OUTRESET_SET(0) |
+	       CLKMGR_SDRPLLGRP_VCO_OUTRESETALL_SET(0) |
+	       CLEAR_BGP_EN_PWRDN,
+	       cm + CLKMGR_SDRPLLGRP_VCO_ADDRESS);
 
 	writel(cfg->mpuclk, cm + CLKMGR_MAINPLLGRP_MPUCLK_ADDRESS);
 	writel(cfg->mainclk, cm + CLKMGR_MAINPLLGRP_MAINCLK_ADDRESS);
diff --git a/arch/arm/mach-socfpga/include/mach/clock-manager.h b/arch/arm/mach-socfpga/include/mach/clock-manager.h
index a2b697561aeb..b67f256091d4 100644
--- a/arch/arm/mach-socfpga/include/mach/clock-manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock-manager.h
@@ -185,4 +185,9 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg);
 #define CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK 0x000001ff
 #define CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_MASK 0x000001ff
 
+#define CLEAR_BGP_EN_PWRDN \
+	(CLKMGR_MAINPLLGRP_VCO_PWRDN_SET(0)| \
+	CLKMGR_MAINPLLGRP_VCO_EN_SET(0)| \
+	CLKMGR_MAINPLLGRP_VCO_BGPWRDN_SET(0))
+
 #endif /* _CLOCK_MANAGER_H_ */
-- 
2.1.4


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  parent reply	other threads:[~2015-02-09 10:48 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-09 10:47 [PATCH v3 00/10] Socfpga: Sequencer updates Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 01/10] ARM: sockit: Define inst_rom_init static Steffen Trumtrar
2015-02-09 10:47 ` Steffen Trumtrar [this message]
2015-02-09 10:47 ` [PATCH v3 03/10] ARM: socfpga: clkmgr: set alteragrp clocks Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 04/10] ARM: socfpga: clkmgr: bypass debug root clock Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 05/10] ARM: socfpga: clock-manager: set mainnandsdmmcclk Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 06/10] scripts: socfpga sequencer extraction tool Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 07/10] ARM: boards: socfpga new mem calibration function Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 08/10] ARM: socfpga: Import sequencer code from generated uboot Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 09/10] ARM: socfpga: cleanup sequencer warnings Steffen Trumtrar
2015-02-09 10:47 ` [PATCH v3 10/10] ARM: socfpga: update defconfig Steffen Trumtrar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1423478871-15276-3-git-send-email-s.trumtrar@pengutronix.de \
    --to=s.trumtrar@pengutronix.de \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox