[PATCH 0/5] MIPS: xburst: add initial JZ4770 SoC support

[PATCH 0/5] MIPS: xburst: add initial JZ4770 SoC support

[Antony Pavlov]

This patchseries adds initial JZ4770 SoC and Ainol Novo7 Paladin tablet support.

The patchseries can be found on github:
    https://github.com/frantony/barebox/tree/20150411.jz4770

The most notable problems and todos:

  * no PBL support; I have a PBL-enabled barebox version
    for the tablet, so barebox can be used as only bootloader for tablet.
    But this version is based on some dirty hacks
    e.g. it uses special pre-compiled X-Boot blob for bootstraping.

    Nowadays barebox mips PBL is written in assembler
    and I see no way to switch it to C. gcc-4.9.1 for mips has no __naked
    directive support, see this gcc output

        $ cat > 1.c <<EOF;
        int __attribute__((naked)) __attribute__((no_instrument_function)) main()
        {
        }
        EOF

        $ /opt/mips-2014.11/bin/mips-linux-gnu-gcc -o 1.o 1.c
        1.c:2:1: warning: 'naked' attribute directive ignored [-Wattributes]
         {
         ^

    So for moving X-Boot bootstrap C-code into barebox PBL we have to convert it
    from C to assembler language :(

    Please see JZ4770 bootstrap code in these repos:

        https://github.com/gcwnow/UBIBoot/
        https://github.com/IngenicSemiconductor/X-BOOT_NPM801

  * no clk support just now; we can easely steal it from linux
    JZ4780 support code (see wip-ci20-v4.1 branch in https://github.com/paulburton/linux);

  * no hardware clocksource support; this can be easely fixed,
    see linux JZ4780 support code again;
    also see https://github.com/frantony/barebox/blob/next.xburst.jz4770.20130511/arch/mips/mach-xburst/csrc-jz4770.c

Antony Pavlov (5):
  MIPS: xburst: add JZ4770 SoC support
  MIPS: xburst: debug_ll: add JZ4770 support
  MIPS: xburst: add Ainol Novo7 Paladin support
  MIPS: add ainol-novo7-paladin_defconfig
  Documentation: add Ainol Novo7 Paladin board mini-howto

 Documentation/boards/mips/ainol-novo7-paladin.rst  | 45 +++++++++++
 arch/mips/Makefile                                 |  1 +
 arch/mips/boards/ainol-novo7-paladin/Makefile      |  1 +
 arch/mips/boards/ainol-novo7-paladin/board.c       | 27 +++++++
 .../ainol-novo7-paladin/include/board/debug_ll.h   | 23 ++++++
 arch/mips/configs/ainol-novo7-paladin_defconfig    | 42 ++++++++++
 arch/mips/dts/ainol-novo7-paladin.dts              | 34 ++++++++
 arch/mips/dts/jz4770.dtsi                          | 90 ++++++++++++++++++++++
 arch/mips/include/asm/cpu.h                        |  1 +
 arch/mips/lib/cpu-probe.c                          |  1 +
 arch/mips/mach-xburst/Kconfig                      | 18 ++++-
 .../mach-xburst/include/mach/debug_ll_jz4770.h     | 47 +++++++++++
 arch/mips/mach-xburst/include/mach/jz4770.h        | 25 ++++++
 13 files changed, 351 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/boards/mips/ainol-novo7-paladin.rst
 create mode 100644 arch/mips/boards/ainol-novo7-paladin/Makefile
 create mode 100644 arch/mips/boards/ainol-novo7-paladin/board.c
 create mode 100644 arch/mips/boards/ainol-novo7-paladin/include/board/debug_ll.h
 create mode 100644 arch/mips/configs/ainol-novo7-paladin_defconfig
 create mode 100644 arch/mips/dts/ainol-novo7-paladin.dts
 create mode 100644 arch/mips/dts/jz4770.dtsi
 create mode 100644 arch/mips/mach-xburst/include/mach/debug_ll_jz4770.h
 create mode 100644 arch/mips/mach-xburst/include/mach/jz4770.h

-- 
2.1.4


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[PATCH 1/5] MIPS: xburst: add JZ4770 SoC support

[Antony Pavlov]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/dts/jz4770.dtsi     | 90 +++++++++++++++++++++++++++++++++++++++++++
 arch/mips/include/asm/cpu.h   |  1 +
 arch/mips/lib/cpu-probe.c     |  1 +
 arch/mips/mach-xburst/Kconfig |  6 +++
 4 files changed, 98 insertions(+)

diff --git a/arch/mips/dts/jz4770.dtsi b/arch/mips/dts/jz4770.dtsi
new file mode 100644
index 0000000..3823d9a
--- /dev/null
+++ b/arch/mips/dts/jz4770.dtsi
@@ -0,0 +1,90 @@
+#include "skeleton.dtsi"
+
+/ {
+	soc {
+		model = "Ingenic JZ4770";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges = <>;
+
+		wdt: wdt@10002000 {
+			compatible = "ingenic,jz4740-wdt";
+			reg = <0x10002000 0x10>;
+		};
+
+		uart0: serial@10030000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10030000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <12000000>;
+			status = "disabled";
+		};
+
+		uart1: serial@10031000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10031000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <12000000>;
+			status = "disabled";
+		};
+
+		uart2: serial@10032000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10032000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <12000000>;
+			status = "disabled";
+		};
+
+		uart3: serial@10033000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10033000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <12000000>;
+			status = "disabled";
+		};
+
+		gpio0: gpio@10010000 {
+			compatible = "ingenic,jz4740-gpio";
+			gpio-controller;
+			reg = <0x10010000 0x100>;
+			#gpio-cells = <2>;
+		};
+
+		gpio1: gpio@10010100 {
+			compatible = "ingenic,jz4740-gpio";
+			gpio-controller;
+			reg = <0x10010100 0x100>;
+			#gpio-cells = <2>;
+		};
+
+		gpio2: gpio@10010200 {
+			compatible = "ingenic,jz4740-gpio";
+			gpio-controller;
+			reg = <0x10010200 0x100>;
+			#gpio-cells = <2>;
+		};
+
+		gpio3: gpio@10010300 {
+			compatible = "ingenic,jz4740-gpio";
+			gpio-controller;
+			reg = <0x10010300 0x100>;
+			#gpio-cells = <2>;
+		};
+
+		gpio4: gpio@10010400 {
+			compatible = "ingenic,jz4740-gpio";
+			gpio-controller;
+			reg = <0x10010400 0x100>;
+			#gpio-cells = <2>;
+		};
+
+		gpio5: gpio@10010500 {
+			compatible = "ingenic,jz4740-gpio";
+			gpio-controller;
+			reg = <0x10010500 0x100>;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 572cabb..02a4446 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -27,6 +27,7 @@
 #define PRID_COMP_MIPS		0x010000
 #define PRID_COMP_BROADCOM	0x020000
 #define PRID_COMP_INGENIC	0xd00000
+#define PRID_COMP_INGENIC_JZ4770	0xd10000
 #define PRID_COMP_INGENIC2	0xe10000
 
 /*
diff --git a/arch/mips/lib/cpu-probe.c b/arch/mips/lib/cpu-probe.c
index 4622bcd..13f9586 100644
--- a/arch/mips/lib/cpu-probe.c
+++ b/arch/mips/lib/cpu-probe.c
@@ -158,6 +158,7 @@ void cpu_probe(void)
 		cpu_probe_broadcom(c);
 		break;
 	case PRID_COMP_INGENIC:
+	case PRID_COMP_INGENIC_JZ4770:
 	case PRID_COMP_INGENIC2:
 		cpu_probe_ingenic(c);
 		break;
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index 2598c41..1fadf3f 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -10,6 +10,12 @@ config CPU_JZ4755
 	select WATCHDOG
 	select WATCHDOG_JZ4740
 
+config CPU_JZ4770
+	bool
+	select SYS_HAS_CPU_MIPS32_R2
+	select WATCHDOG
+	select WATCHDOG_JZ4740
+
 config CPU_JZ4780
 	bool
 	select SYS_HAS_CPU_MIPS32_R2
-- 
2.1.4


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[PATCH 2/5] MIPS: xburst: debug_ll: add JZ4770 support

[Antony Pavlov]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/mach-xburst/Kconfig                      |  8 ++--
 .../mach-xburst/include/mach/debug_ll_jz4770.h     | 47 ++++++++++++++++++++++
 arch/mips/mach-xburst/include/mach/jz4770.h        | 25 ++++++++++++
 3 files changed, 76 insertions(+), 4 deletions(-)

diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index 1fadf3f..3623d1a 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -41,19 +41,19 @@ choice
 	prompt "DEBUG_LL port"
 
 config JZ47XX_DEBUG_LL_UART0
-	depends on CPU_JZ4755 || CPU_JZ4780
+	depends on CPU_JZ4755 || CPU_JZ4770 || CPU_JZ4780
 	bool "UART0"
 
 config JZ47XX_DEBUG_LL_UART1
-	depends on CPU_JZ4755 || CPU_JZ4780
+	depends on CPU_JZ4755 || CPU_JZ4770 || CPU_JZ4780
 	bool "UART1"
 
 config JZ47XX_DEBUG_LL_UART2
-	depends on CPU_JZ4755 || CPU_JZ4780
+	depends on CPU_JZ4755 || CPU_JZ4770 || CPU_JZ4780
 	bool "UART2"
 
 config JZ47XX_DEBUG_LL_UART3
-	depends on CPU_JZ4780
+	depends on CPU_JZ4770 || CPU_JZ4780
 	bool "UART3"
 
 config JZ47XX_DEBUG_LL_UART4
diff --git a/arch/mips/mach-xburst/include/mach/debug_ll_jz4770.h b/arch/mips/mach-xburst/include/mach/debug_ll_jz4770.h
new file mode 100644
index 0000000..79d72a0
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/debug_ll_jz4770.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __INCLUDE_DEBUG_LL_JZ4770_H__
+#define __INCLUDE_DEBUG_LL_JZ4770_H__
+
+#include <mach/jz4770.h>
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART0
+#define DEBUG_LL_UART_ADDR	JZ4770_UART0_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART1
+#define DEBUG_LL_UART_ADDR	JZ4770_UART1_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART2
+#define DEBUG_LL_UART_ADDR	JZ4770_UART2_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART3
+#define DEBUG_LL_UART_ADDR	JZ4770_UART3_BASE
+#endif
+
+#define DEBUG_LL_UART_SHIFT	2
+
+#ifndef DEBUG_LL_UART_CLK
+#define DEBUG_LL_UART_CLK	(12000000 / 16)
+#endif
+#define DEBUG_LL_UART_BPS	CONFIG_BAUDRATE
+#define DEBUG_LL_UART_DIVISOR	(DEBUG_LL_UART_CLK / DEBUG_LL_UART_BPS)
+
+#endif /* __INCLUDE_DEBUG_LL_JZ4770_H__ */
diff --git a/arch/mips/mach-xburst/include/mach/jz4770.h b/arch/mips/mach-xburst/include/mach/jz4770.h
new file mode 100644
index 0000000..161c1af
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/jz4770.h
@@ -0,0 +1,25 @@
+/*
+ * JZ4770 SoC definitions
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MIPS_ASM_MACH_JZ4770_JZ4770_H__
+#define __MIPS_ASM_MACH_JZ4770_JZ4770_H__
+
+/* APB bus devices */
+#define JZ4770_UART0_BASE	0xb0030000
+#define JZ4770_UART1_BASE	0xb0031000
+#define JZ4770_UART2_BASE	0xb0032000
+#define JZ4770_UART3_BASE	0xb0033000
+
+#endif /* __MIPS_ASM_MACH_JZ4770_JZ4770_H__ */
-- 
2.1.4


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[PATCH 3/5] MIPS: xburst: add Ainol Novo7 Paladin support

[Antony Pavlov]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/Makefile                                 |  1 +
 arch/mips/boards/ainol-novo7-paladin/Makefile      |  1 +
 arch/mips/boards/ainol-novo7-paladin/board.c       | 27 +++++++++++++++++
 .../ainol-novo7-paladin/include/board/debug_ll.h   | 23 +++++++++++++++
 arch/mips/dts/ainol-novo7-paladin.dts              | 34 ++++++++++++++++++++++
 arch/mips/mach-xburst/Kconfig                      |  4 +++
 6 files changed, 90 insertions(+)

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 6ef2bf7..8478aa3 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -88,6 +88,7 @@ machine-$(CONFIG_MACH_MIPS_LOONGSON)	:= loongson
 board-$(CONFIG_BOARD_LOONGSON_TECH_LS1B)	:= loongson-ls1b
 
 machine-$(CONFIG_MACH_MIPS_XBURST)	:= xburst
+board-$(CONFIG_BOARD_AINOL_NOVO7_PALADIN)	:= ainol-novo7-paladin
 board-$(CONFIG_BOARD_RZX50)	:= ritmix-rzx50
 board-$(CONFIG_BOARD_CI20)	:= img-ci20
 
diff --git a/arch/mips/boards/ainol-novo7-paladin/Makefile b/arch/mips/boards/ainol-novo7-paladin/Makefile
new file mode 100644
index 0000000..dcfc293
--- /dev/null
+++ b/arch/mips/boards/ainol-novo7-paladin/Makefile
@@ -0,0 +1 @@
+obj-y += board.o
diff --git a/arch/mips/boards/ainol-novo7-paladin/board.c b/arch/mips/boards/ainol-novo7-paladin/board.c
new file mode 100644
index 0000000..61ee886
--- /dev/null
+++ b/arch/mips/boards/ainol-novo7-paladin/board.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+
+static int novo7_paladin_hostname_init(void)
+{
+	barebox_set_hostname("novo7-paladin");
+
+	return 0;
+}
+console_initcall(novo7_paladin_hostname_init);
diff --git a/arch/mips/boards/ainol-novo7-paladin/include/board/debug_ll.h b/arch/mips/boards/ainol-novo7-paladin/include/board/debug_ll.h
new file mode 100644
index 0000000..ef78f94
--- /dev/null
+++ b/arch/mips/boards/ainol-novo7-paladin/include/board/debug_ll.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2012, 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __INCLUDE_NOVO_7_PALADIN_BOARD_DEBUG_LL_H__
+#define __INCLUDE_NOVO_7_PALADIN_BOARD_DEBUG_LL_H__
+
+#include <mach/debug_ll_jz4770.h>
+
+#endif /* __INCLUDE_NOVO_7_PALADIN_BOARD_DEBUG_LL_H__ */
diff --git a/arch/mips/dts/ainol-novo7-paladin.dts b/arch/mips/dts/ainol-novo7-paladin.dts
new file mode 100644
index 0000000..cccd6ad
--- /dev/null
+++ b/arch/mips/dts/ainol-novo7-paladin.dts
@@ -0,0 +1,34 @@
+/*
+ * Ainol Novo7 Paladin device tree
+ *
+ * Copyright (c) 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "jz4770.dtsi"
+
+/ {
+	model = "Ainol Novo7 Paladin";
+	compatible = "ainol,novo7-paladin";
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x10000000>;
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index 3623d1a..a0ee4c6 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -30,6 +30,10 @@ config BOARD_RZX50
 	select HAS_POWEROFF
 	select CPU_JZ4755
 
+config BOARD_AINOL_NOVO7_PALADIN
+	bool "Ainol Novo7 Paladin"
+	select CPU_JZ4770
+
 config BOARD_CI20
 	bool "Imagination Creator CI20"
 	select CPU_JZ4780
-- 
2.1.4


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[PATCH 4/5] MIPS: add ainol-novo7-paladin_defconfig

[Antony Pavlov]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/configs/ainol-novo7-paladin_defconfig | 42 +++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/mips/configs/ainol-novo7-paladin_defconfig b/arch/mips/configs/ainol-novo7-paladin_defconfig
new file mode 100644
index 0000000..abb4a07
--- /dev/null
+++ b/arch/mips/configs/ainol-novo7-paladin_defconfig
@@ -0,0 +1,42 @@
+CONFIG_BUILTIN_DTB=y
+CONFIG_BUILTIN_DTB_NAME="ainol-novo7-paladin"
+CONFIG_MACH_MIPS_XBURST=y
+CONFIG_BOARD_AINOL_NOVO7_PALADIN=y
+CONFIG_JZ47XX_DEBUG_LL_UART2=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_BAUDRATE=57600
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_DEBUG_LL=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_VERBOSE=y
+CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_SAVES=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_GLOBAL=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_GPIO=y
+CONFIG_OFDEVICE=y
+# CONFIG_SPI is not set
+CONFIG_CLOCKSOURCE_DUMMY_RATE=16000
+CONFIG_GPIO_JZ4740=y
+# CONFIG_PINCTRL is not set
+CONFIG_SHA1=y
+CONFIG_SHA224=y
+CONFIG_SHA256=y
-- 
2.1.4


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[PATCH 5/5] Documentation: add Ainol Novo7 Paladin board mini-howto

[Antony Pavlov]

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 Documentation/boards/mips/ainol-novo7-paladin.rst | 45 +++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/Documentation/boards/mips/ainol-novo7-paladin.rst b/Documentation/boards/mips/ainol-novo7-paladin.rst
new file mode 100644
index 0000000..becfcd0
--- /dev/null
+++ b/Documentation/boards/mips/ainol-novo7-paladin.rst
@@ -0,0 +1,45 @@
+Ainol Novo7 Paladin
+===================
+
+The tablet has
+
+  * Ingenic JZ4770 SoC;
+  * 512 MiB DDR2 SDRAM;
+  * 8 GiB eMMC Flash Memory;
+  * UART;
+  * touchscreen (800x480);
+  * 1xUSB interface;
+  * buttons.
+
+The tablet uses X-Boot (Ingenic's not interactive U-Boot) as bootloader.
+
+Running barebox
+---------------
+
+  1. Connect to the tablet's UART (see. http://a320.emulate.su/2012/05/14/mini-obzor-planshet-ainol-novo7-paladin-i-processor-jz4770/);
+
+  2. Download and compile ingenic-boot tool for GCW0
+
+.. code-block:: none
+
+    $ git clone https://github.com/gcwnow/ingenic-boot
+    $ cd ingenic-boot
+    ingenic-boot$ make
+..
+
+  3. Push & hold VOL- (GPIO 114 aka D18) while power on or reset (this selects USB boot mode by activating BOOTSEL1 signal);
+
+  3. Upload and start barebox:
+
+.. code-block:: none
+
+    ingenic-boot$ sudo ./tool/down2ram.sh --config=gcw0_v11_ddr2_512mb --bin=${PATH_TO_BAREBOX_DIR}/barebox-flash-image --downto=0xa0800000 --runat=0xa0800000
+..
+
+Links
+-----
+
+  * http://www.ainol-novo.com/ainol-novo-7-paladin-first-android-4-0-tablet-pc.html
+  * ftp://ftp.ingenic.cn/SOC/JZ4770/JZ4770_DS.PDF
+  * https://github.com/IngenicSemiconductor/X-BOOT_NPM801
+  * https://github.com/gcwnow/UBIBoot
-- 
2.1.4


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Re: [PATCH 0/5] MIPS: xburst: add initial JZ4770 SoC support

[Sascha Hauer]

Hi Antony,

On Sat, Apr 11, 2015 at 02:22:56AM +0300, Antony Pavlov wrote:
> This patchseries adds initial JZ4770 SoC and Ainol Novo7 Paladin tablet support.
> 
> The patchseries can be found on github:
>     https://github.com/frantony/barebox/tree/20150411.jz4770
> 
> The most notable problems and todos:
> 
>   * no PBL support; I have a PBL-enabled barebox version
>     for the tablet, so barebox can be used as only bootloader for tablet.
>     But this version is based on some dirty hacks
>     e.g. it uses special pre-compiled X-Boot blob for bootstraping.
> 
>     Nowadays barebox mips PBL is written in assembler
>     and I see no way to switch it to C. gcc-4.9.1 for mips has no __naked
>     directive support, see this gcc output
> 
>         $ cat > 1.c <<EOF;
>         int __attribute__((naked)) __attribute__((no_instrument_function)) main()
>         {
>         }
>         EOF
> 
>         $ /opt/mips-2014.11/bin/mips-linux-gnu-gcc -o 1.o 1.c
>         1.c:2:1: warning: 'naked' attribute directive ignored [-Wattributes]
>          {
>          ^
> 
>     So for moving X-Boot bootstrap C-code into barebox PBL we have to convert it
>     from C to assembler language :(

Is this really necessary? Only the entry point up to the point where you
setup the stack needs to be assembly, from then on C can be used.


> 
>     Please see JZ4770 bootstrap code in these repos:
> 
>         https://github.com/gcwnow/UBIBoot/
>         https://github.com/IngenicSemiconductor/X-BOOT_NPM801
> 
>   * no clk support just now; we can easely steal it from linux
>     JZ4780 support code (see wip-ci20-v4.1 branch in https://github.com/paulburton/linux);
> 
>   * no hardware clocksource support; this can be easely fixed,
>     see linux JZ4780 support code again;
>     also see https://github.com/frantony/barebox/blob/next.xburst.jz4770.20130511/arch/mips/mach-xburst/csrc-jz4770.c

Before merging this series I'd like to have clocksource support. Using
the dummy clocksource is fine during initial bringup, but I think merged
code should not depend on it.

Sascha

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