[PATCH 1/5] ARM: socfpga: socrates: add qspi partitions

[PATCH 1/5] ARM: socfpga: socrates: add qspi partitions

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/dts/socfpga_cyclone5_socrates.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index 125ad1b8502d..ccb940584b5b 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -80,5 +80,20 @@
 		cdns,tsd2d-ns = <50>;
 		cdns,tchsh-ns = <4>;
 		cdns,tslch-ns = <4>;
+
+		partition@0 {
+			label = "prebootloader0";
+			reg = <0x00000 0x10000>;
+		};
+
+		partition@1 {
+			label = "barebox0";
+			reg = <0x40000 0x80000>;
+		};
+
+		partition@2 {
+			label = "data";
+			reg = <0xc0000 0x1f40000>;
+		};
 	};
 };
-- 
2.1.4


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[PATCH 2/5] ARM: socfpga: socrates: set alias for ethernet0

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/dts/socfpga_cyclone5_socrates.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index ccb940584b5b..f0af9fac954e 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -30,6 +30,10 @@
 		reg = <0x0 0x0>;
 	};
 
+	aliases {
+		ethernet0 = &gmac1;
+	};
+
 	leds: gpio-leds {
 	};
 };
-- 
2.1.4


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[PATCH 3/5] ARM: socfpga: add bbu handler for spi nor

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/mach-socfpga/Kconfig               |  8 +++
 arch/arm/mach-socfpga/Makefile              |  1 +
 arch/arm/mach-socfpga/include/mach/bbu.h    | 15 +++++
 arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c | 86 +++++++++++++++++++++++++++++
 4 files changed, 110 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/include/mach/bbu.h
 create mode 100644 arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 90b3533b1ffb..a85749b7f829 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -20,4 +20,12 @@ config MACH_SOCFPGA_TERASIC_SOCKIT
 	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "Terasic SoCKit"
 
+config BAREBOX_UPDATE_SOCFPGA_SPI_NOR
+	prompt "barebox update SPI NOR XLOAD handler"
+	bool
+	depends on BAREBOX_UPDATE
+	depends on SPI_CADENCE_QUADSPI
+	help
+	  Say Y for barebox update SPI NOR XLOAD handler.
+
 endif
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index b81d57da26fd..12c5252d1a6e 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -3,3 +3,4 @@ pbl-y += init.o freeze-controller.o scan-manager.o system-manager.o
 pbl-y += clock-manager.o
 obj-$(CONFIG_ARCH_SOCFPGA_XLOAD) += xload.o
 obj-$(CONFIG_ARCH_SOCFPGA_FPGA) += fpga.o
+obj-$(CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR) += socfpga_bbu_spi_nor.o
diff --git a/arch/arm/mach-socfpga/include/mach/bbu.h b/arch/arm/mach-socfpga/include/mach/bbu.h
new file mode 100644
index 000000000000..e4846d36bc5d
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/bbu.h
@@ -0,0 +1,15 @@
+#ifndef __MACH_BBU_H
+#define __MACH_BBU_H
+
+#include <bbu.h>
+
+#ifdef CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR
+int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile);
+#else
+static inline int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile)
+{
+	return 0;
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
new file mode 100644
index 000000000000..cf44bc81c60b
--- /dev/null
+++ b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2015 Pengutronix, Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <common.h>
+#include <malloc.h>
+#include <bbu.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <linux/stat.h>
+
+static int spi_nor_handler(struct bbu_handler *handler,
+			   struct bbu_data *data)
+{
+	int fd, ret;
+	int *header;
+
+	if (file_detect_type(data->image, data->len) != filetype_arm_barebox) {
+		if (!bbu_force(data, "Not an ARM barebox image"))
+			return -EINVAL;
+	}
+
+	header = data->image;
+
+	if (!header[0x40] == 0x31305341) {
+		if (!bbu_force(data, "Not a valid SOCFPGA image"))
+			return -EINVAL;
+	}
+
+	ret = bbu_confirm(data);
+	if (ret)
+		return ret;
+
+	fd = open(data->devicefile, O_RDWR | O_CREAT);
+	if (fd < 0)
+		return fd;
+
+	debug("%s: eraseing %s from 0 to 0x%08x\n", __func__,
+			data->devicefile, data->len);
+	ret = erase(fd, data->len, 0);
+	if (ret) {
+		printf("erasing %s failed with %s\n", data->devicefile,
+				strerror(-ret));
+		goto err_close;
+	}
+
+	ret = write(fd, data->image, data->len);
+	if (ret < 0)
+		goto err_close;
+
+	ret = 0;
+
+err_close:
+	close(fd);
+
+	return ret;
+}
+
+/*
+ * Register update handler for SPI NOR
+ */
+int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile)
+{
+	struct bbu_handler *handler;
+	int ret;
+
+	handler = xzalloc(sizeof(*handler));
+	handler->devicefile = devicefile;
+	handler->name = name;
+	handler->handler = spi_nor_handler;
+
+	ret = bbu_register_handler(handler);
+
+	if (ret)
+		free(handler);
+
+	return ret;
+}
-- 
2.1.4


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[PATCH 4/5] ARM: socfpga: socrates: register spi bbu handler

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boards/ebv-socrates/board.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boards/ebv-socrates/board.c b/arch/arm/boards/ebv-socrates/board.c
index 5d2d61991431..20998682a389 100644
--- a/arch/arm/boards/ebv-socrates/board.c
+++ b/arch/arm/boards/ebv-socrates/board.c
@@ -8,6 +8,7 @@
 #include <linux/sizes.h>
 #include <fcntl.h>
 #include <fs.h>
+#include <mach/bbu.h>
 #include <mach/socfpga-regs.h>
 
 static int phy_fixup(struct phy_device *dev)
@@ -32,6 +33,9 @@ static int socrates_init(void)
 	if (IS_ENABLED(CONFIG_PHYLIB))
 		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, phy_fixup);
 
+	socfpga_bbu_spi_nor_register_handler("qspi-xload", "/dev/mtd0.prebootloader0");
+	socfpga_bbu_spi_nor_register_handler("qspi", "/dev/mtd0.barebox0");
+
 	return 0;
 }
 postcore_initcall(socrates_init);
-- 
2.1.4


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[PATCH 5/5] ARM: socfpga: defconfig: add bootstrap_devfs

[Steffen Trumtrar]

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/configs/socfpga-xload_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/socfpga-xload_defconfig b/arch/arm/configs/socfpga-xload_defconfig
index 9f64adfd7438..413fcc319d3c 100644
--- a/arch/arm/configs/socfpga-xload_defconfig
+++ b/arch/arm/configs/socfpga-xload_defconfig
@@ -27,4 +27,5 @@ CONFIG_EEPROM_AT25=y
 # CONFIG_FS_DEVFS is not set
 CONFIG_FS_FAT=y
 CONFIG_BOOTSTRAP=y
+CONFIG_BOOTSTRAP_DEVFS=y
 CONFIG_BOOTSTRAP_DISK=y
-- 
2.1.4


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Re: [PATCH 1/5] ARM: socfpga: socrates: add qspi partitions

[Sascha Hauer]

On Tue, Jul 14, 2015 at 06:16:35PM +0200, Steffen Trumtrar wrote:
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>  arch/arm/dts/socfpga_cyclone5_socrates.dts | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> index 125ad1b8502d..ccb940584b5b 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> @@ -80,5 +80,20 @@
>  		cdns,tsd2d-ns = <50>;
>  		cdns,tchsh-ns = <4>;
>  		cdns,tslch-ns = <4>;
> +
> +		partition@0 {
> +			label = "prebootloader0";
> +			reg = <0x00000 0x10000>;
> +		};

Why prebootloader0? There's only one or not?

> +
> +		partition@1 {
> +			label = "barebox0";
> +			reg = <0x40000 0x80000>;
> +		};

Same here.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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Re: [PATCH 3/5] ARM: socfpga: add bbu handler for spi nor

[Sascha Hauer]

On Tue, Jul 14, 2015 at 06:16:37PM +0200, Steffen Trumtrar wrote:
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>  arch/arm/mach-socfpga/Kconfig               |  8 +++
>  arch/arm/mach-socfpga/Makefile              |  1 +
>  arch/arm/mach-socfpga/include/mach/bbu.h    | 15 +++++
>  arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c | 86 +++++++++++++++++++++++++++++
>  4 files changed, 110 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/include/mach/bbu.h
>  create mode 100644 arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> index 90b3533b1ffb..a85749b7f829 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -20,4 +20,12 @@ config MACH_SOCFPGA_TERASIC_SOCKIT
>  	select HAVE_DEFAULT_ENVIRONMENT_NEW
>  	bool "Terasic SoCKit"
>  
> +config BAREBOX_UPDATE_SOCFPGA_SPI_NOR
> +	prompt "barebox update SPI NOR XLOAD handler"
> +	bool
> +	depends on BAREBOX_UPDATE
> +	depends on SPI_CADENCE_QUADSPI
> +	help
> +	  Say Y for barebox update SPI NOR XLOAD handler.
> +
>  endif
> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
> index b81d57da26fd..12c5252d1a6e 100644
> --- a/arch/arm/mach-socfpga/Makefile
> +++ b/arch/arm/mach-socfpga/Makefile
> @@ -3,3 +3,4 @@ pbl-y += init.o freeze-controller.o scan-manager.o system-manager.o
>  pbl-y += clock-manager.o
>  obj-$(CONFIG_ARCH_SOCFPGA_XLOAD) += xload.o
>  obj-$(CONFIG_ARCH_SOCFPGA_FPGA) += fpga.o
> +obj-$(CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR) += socfpga_bbu_spi_nor.o
> diff --git a/arch/arm/mach-socfpga/include/mach/bbu.h b/arch/arm/mach-socfpga/include/mach/bbu.h
> new file mode 100644
> index 000000000000..e4846d36bc5d
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/bbu.h
> @@ -0,0 +1,15 @@
> +#ifndef __MACH_BBU_H
> +#define __MACH_BBU_H
> +
> +#include <bbu.h>
> +
> +#ifdef CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR
> +int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile);
> +#else
> +static inline int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile)
> +{
> +	return 0;
> +}
> +#endif
> +
> +#endif
> diff --git a/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> new file mode 100644
> index 000000000000..cf44bc81c60b
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> @@ -0,0 +1,86 @@
> +/*
> + * Copyright (c) 2015 Pengutronix, Steffen Trumtrar <s.trumtrar@pengutronix.de>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include <common.h>
> +#include <malloc.h>
> +#include <bbu.h>
> +#include <fs.h>
> +#include <fcntl.h>
> +#include <linux/stat.h>
> +
> +static int spi_nor_handler(struct bbu_handler *handler,
> +			   struct bbu_data *data)
> +{
> +	int fd, ret;
> +	int *header;
> +
> +	if (file_detect_type(data->image, data->len) != filetype_arm_barebox) {
> +		if (!bbu_force(data, "Not an ARM barebox image"))
> +			return -EINVAL;
> +	}
> +
> +	header = data->image;
> +
> +	if (!header[0x40] == 0x31305341) {

This will never be true. header[0x40] != 0x31305341 instead?
Also you probably want to expliticitly use u32 instead of int.

> +		if (!bbu_force(data, "Not a valid SOCFPGA image"))
> +			return -EINVAL;
> +	}
> +
> +	ret = bbu_confirm(data);
> +	if (ret)
> +		return ret;
> +
> +	fd = open(data->devicefile, O_RDWR | O_CREAT);
> +	if (fd < 0)
> +		return fd;
> +
> +	debug("%s: eraseing %s from 0 to 0x%08x\n", __func__,
> +			data->devicefile, data->len);

s/eraseing/erasing/

Sascha


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Re: [PATCH 1/5] ARM: socfpga: socrates: add qspi partitions

[Steffen Trumtrar]

On Thu, Jul 16, 2015 at 08:07:23AM +0200, Sascha Hauer wrote:
> On Tue, Jul 14, 2015 at 06:16:35PM +0200, Steffen Trumtrar wrote:
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> >  arch/arm/dts/socfpga_cyclone5_socrates.dts | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > index 125ad1b8502d..ccb940584b5b 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > @@ -80,5 +80,20 @@
> >  		cdns,tsd2d-ns = <50>;
> >  		cdns,tchsh-ns = <4>;
> >  		cdns,tslch-ns = <4>;
> > +
> > +		partition@0 {
> > +			label = "prebootloader0";
> > +			reg = <0x00000 0x10000>;
> > +		};
> 
> Why prebootloader0? There's only one or not?
> 

There can be up to four and the space for the other
three is left free here. I thought prebootloader1-3 might
be added later.

> > +
> > +		partition@1 {
> > +			label = "barebox0";
> > +			reg = <0x40000 0x80000>;
> > +		};
> 
> Same here.
> 

No good argument. So, I will have to change this :-(

Thanks,
Steffen

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Pengutronix e.K.                           |                             |
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Re: [PATCH 1/5] ARM: socfpga: socrates: add qspi partitions

[Sascha Hauer]

On Thu, Jul 16, 2015 at 08:47:00AM +0200, Steffen Trumtrar wrote:
> On Thu, Jul 16, 2015 at 08:07:23AM +0200, Sascha Hauer wrote:
> > On Tue, Jul 14, 2015 at 06:16:35PM +0200, Steffen Trumtrar wrote:
> > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > > ---
> > >  arch/arm/dts/socfpga_cyclone5_socrates.dts | 15 +++++++++++++++
> > >  1 file changed, 15 insertions(+)
> > > 
> > > diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > > index 125ad1b8502d..ccb940584b5b 100644
> > > --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > > +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > > @@ -80,5 +80,20 @@
> > >  		cdns,tsd2d-ns = <50>;
> > >  		cdns,tchsh-ns = <4>;
> > >  		cdns,tslch-ns = <4>;
> > > +
> > > +		partition@0 {
> > > +			label = "prebootloader0";
> > > +			reg = <0x00000 0x10000>;
> > > +		};
> > 
> > Why prebootloader0? There's only one or not?
> > 
> 
> There can be up to four and the space for the other
> three is left free here. I thought prebootloader1-3 might
> be added later.

Ah, I see, there currently is a hole between prebootloader0 and barebox0
which is big enough to hold three other prebootloaders. In which cases
is one of the other slots used? Would it make sense to change the spinor
handler to write the image there aswell?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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Re: [PATCH 3/5] ARM: socfpga: add bbu handler for spi nor

[Sascha Hauer]

On Thu, Jul 16, 2015 at 08:12:08AM +0200, Sascha Hauer wrote:
> On Tue, Jul 14, 2015 at 06:16:37PM +0200, Steffen Trumtrar wrote:
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> >  arch/arm/mach-socfpga/Kconfig               |  8 +++
> >  arch/arm/mach-socfpga/Makefile              |  1 +
> >  arch/arm/mach-socfpga/include/mach/bbu.h    | 15 +++++
> >  arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c | 86 +++++++++++++++++++++++++++++
> >  4 files changed, 110 insertions(+)
> >  create mode 100644 arch/arm/mach-socfpga/include/mach/bbu.h
> >  create mode 100644 arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> > 
> > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> > index 90b3533b1ffb..a85749b7f829 100644
> > --- a/arch/arm/mach-socfpga/Kconfig
> > +++ b/arch/arm/mach-socfpga/Kconfig
> > @@ -20,4 +20,12 @@ config MACH_SOCFPGA_TERASIC_SOCKIT
> >  	select HAVE_DEFAULT_ENVIRONMENT_NEW
> >  	bool "Terasic SoCKit"
> >  
> > +config BAREBOX_UPDATE_SOCFPGA_SPI_NOR
> > +	prompt "barebox update SPI NOR XLOAD handler"
> > +	bool
> > +	depends on BAREBOX_UPDATE
> > +	depends on SPI_CADENCE_QUADSPI
> > +	help
> > +	  Say Y for barebox update SPI NOR XLOAD handler.
> > +
> >  endif
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
> > index b81d57da26fd..12c5252d1a6e 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -3,3 +3,4 @@ pbl-y += init.o freeze-controller.o scan-manager.o system-manager.o
> >  pbl-y += clock-manager.o
> >  obj-$(CONFIG_ARCH_SOCFPGA_XLOAD) += xload.o
> >  obj-$(CONFIG_ARCH_SOCFPGA_FPGA) += fpga.o
> > +obj-$(CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR) += socfpga_bbu_spi_nor.o
> > diff --git a/arch/arm/mach-socfpga/include/mach/bbu.h b/arch/arm/mach-socfpga/include/mach/bbu.h
> > new file mode 100644
> > index 000000000000..e4846d36bc5d
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/include/mach/bbu.h
> > @@ -0,0 +1,15 @@
> > +#ifndef __MACH_BBU_H
> > +#define __MACH_BBU_H
> > +
> > +#include <bbu.h>
> > +
> > +#ifdef CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR
> > +int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile);
> > +#else
> > +static inline int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile)
> > +{
> > +	return 0;
> > +}
> > +#endif
> > +
> > +#endif
> > diff --git a/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> > new file mode 100644
> > index 000000000000..cf44bc81c60b
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> > @@ -0,0 +1,86 @@
> > +/*
> > + * Copyright (c) 2015 Pengutronix, Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2
> > + * as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + */
> > +#include <common.h>
> > +#include <malloc.h>
> > +#include <bbu.h>
> > +#include <fs.h>
> > +#include <fcntl.h>
> > +#include <linux/stat.h>
> > +
> > +static int spi_nor_handler(struct bbu_handler *handler,
> > +			   struct bbu_data *data)
> > +{
> > +	int fd, ret;
> > +	int *header;
> > +
> > +	if (file_detect_type(data->image, data->len) != filetype_arm_barebox) {
> > +		if (!bbu_force(data, "Not an ARM barebox image"))
> > +			return -EINVAL;
> > +	}
> > +
> > +	header = data->image;
> > +
> > +	if (!header[0x40] == 0x31305341) {
> 
> This will never be true. header[0x40] != 0x31305341 instead?
> Also you probably want to expliticitly use u32 instead of int.

Does the fixed test return true for the barebox image?

Note now there's also bbu_register_std_file_update() which will do the
same as your code in a generic way. The only thing that won't work with
the generic code is this check above.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH 3/5] ARM: socfpga: add bbu handler for spi nor

[Steffen Trumtrar]

On Thu, Jul 16, 2015 at 09:01:54AM +0200, Sascha Hauer wrote:
> On Thu, Jul 16, 2015 at 08:12:08AM +0200, Sascha Hauer wrote:
> > On Tue, Jul 14, 2015 at 06:16:37PM +0200, Steffen Trumtrar wrote:
> > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > > ---
> > >  arch/arm/mach-socfpga/Kconfig               |  8 +++
> > >  arch/arm/mach-socfpga/Makefile              |  1 +
> > >  arch/arm/mach-socfpga/include/mach/bbu.h    | 15 +++++
> > >  arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c | 86 +++++++++++++++++++++++++++++
> > >  4 files changed, 110 insertions(+)
> > >  create mode 100644 arch/arm/mach-socfpga/include/mach/bbu.h
> > >  create mode 100644 arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> > > 
> > > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> > > index 90b3533b1ffb..a85749b7f829 100644
> > > --- a/arch/arm/mach-socfpga/Kconfig
> > > +++ b/arch/arm/mach-socfpga/Kconfig
> > > @@ -20,4 +20,12 @@ config MACH_SOCFPGA_TERASIC_SOCKIT
> > >  	select HAVE_DEFAULT_ENVIRONMENT_NEW
> > >  	bool "Terasic SoCKit"
> > >  
> > > +config BAREBOX_UPDATE_SOCFPGA_SPI_NOR
> > > +	prompt "barebox update SPI NOR XLOAD handler"
> > > +	bool
> > > +	depends on BAREBOX_UPDATE
> > > +	depends on SPI_CADENCE_QUADSPI
> > > +	help
> > > +	  Say Y for barebox update SPI NOR XLOAD handler.
> > > +
> > >  endif
> > > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
> > > index b81d57da26fd..12c5252d1a6e 100644
> > > --- a/arch/arm/mach-socfpga/Makefile
> > > +++ b/arch/arm/mach-socfpga/Makefile
> > > @@ -3,3 +3,4 @@ pbl-y += init.o freeze-controller.o scan-manager.o system-manager.o
> > >  pbl-y += clock-manager.o
> > >  obj-$(CONFIG_ARCH_SOCFPGA_XLOAD) += xload.o
> > >  obj-$(CONFIG_ARCH_SOCFPGA_FPGA) += fpga.o
> > > +obj-$(CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR) += socfpga_bbu_spi_nor.o
> > > diff --git a/arch/arm/mach-socfpga/include/mach/bbu.h b/arch/arm/mach-socfpga/include/mach/bbu.h
> > > new file mode 100644
> > > index 000000000000..e4846d36bc5d
> > > --- /dev/null
> > > +++ b/arch/arm/mach-socfpga/include/mach/bbu.h
> > > @@ -0,0 +1,15 @@
> > > +#ifndef __MACH_BBU_H
> > > +#define __MACH_BBU_H
> > > +
> > > +#include <bbu.h>
> > > +
> > > +#ifdef CONFIG_BAREBOX_UPDATE_SOCFPGA_SPI_NOR
> > > +int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile);
> > > +#else
> > > +static inline int socfpga_bbu_spi_nor_register_handler(const char *name, char *devicefile)
> > > +{
> > > +	return 0;
> > > +}
> > > +#endif
> > > +
> > > +#endif
> > > diff --git a/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> > > new file mode 100644
> > > index 000000000000..cf44bc81c60b
> > > --- /dev/null
> > > +++ b/arch/arm/mach-socfpga/socfpga_bbu_spi_nor.c
> > > @@ -0,0 +1,86 @@
> > > +/*
> > > + * Copyright (c) 2015 Pengutronix, Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2
> > > + * as published by the Free Software Foundation.
> > > + *
> > > + * This program is distributed in the hope that it will be useful,
> > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > + * GNU General Public License for more details.
> > > + */
> > > +#include <common.h>
> > > +#include <malloc.h>
> > > +#include <bbu.h>
> > > +#include <fs.h>
> > > +#include <fcntl.h>
> > > +#include <linux/stat.h>
> > > +
> > > +static int spi_nor_handler(struct bbu_handler *handler,
> > > +			   struct bbu_data *data)
> > > +{
> > > +	int fd, ret;
> > > +	int *header;
> > > +
> > > +	if (file_detect_type(data->image, data->len) != filetype_arm_barebox) {
> > > +		if (!bbu_force(data, "Not an ARM barebox image"))
> > > +			return -EINVAL;
> > > +	}
> > > +
> > > +	header = data->image;
> > > +
> > > +	if (!header[0x40] == 0x31305341) {
> > 
> > This will never be true. header[0x40] != 0x31305341 instead?
> > Also you probably want to expliticitly use u32 instead of int.
> 
> Does the fixed test return true for the barebox image?
> 
> Note now there's also bbu_register_std_file_update() which will do the
> same as your code in a generic way. The only thing that won't work with
> the generic code is this check above.
> 

Ah, that sounds good. I guess the way to go would be defining a new
filetype ala filetype_ch_image for OMAP. This seems to be the same thing
in the end.
The magic value gets written by scripts/socfpga_mkimage and is mandatory.
(Theoretically I would also have to validate the crc32 checksum, too).

What is not possible then is writing multiple redundant copies of the
prebootloader it seems.

Regards,
Steffen

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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