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From: Juergen Borleis <jbe@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 2/6] PPC/PCM030: fix reference clock
Date: Fri, 31 Jul 2015 11:03:48 +0200	[thread overview]
Message-ID: <1438333432-10118-3-git-send-email-jbe@pengutronix.de> (raw)
In-Reply-To: <1438333432-10118-1-git-send-email-jbe@pengutronix.de>

In order to enable and use USB/OHCI on the MPC5200 the USB PLL register must be
set.

It's not easy to find a correct value for this register, it seems it depends on
the used external reference frequency and some other 'magic' things. There are
some values out in the wild for the 33,333333 MHz and 33,333000 MHz reference
frequency case, but they are not consistent over the boards.

The value used here in this change for the USB PLL register is from the first
days of support for this platform and works at least on the reference
baseboard.

Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
---
 arch/ppc/boards/pcm030/config.h | 2 +-
 arch/ppc/boards/pcm030/pcm030.c | 7 +++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/ppc/boards/pcm030/config.h b/arch/ppc/boards/pcm030/config.h
index 1521811..3fe1f28 100644
--- a/arch/ppc/boards/pcm030/config.h
+++ b/arch/ppc/boards/pcm030/config.h
@@ -25,7 +25,7 @@
 
 #include <mach/mpc5xxx.h>
 
-#define CFG_MPC5XXX_CLKIN	33333333 /* ... running at 33.333333MHz */
+#define CFG_MPC5XXX_CLKIN	33333000 /* ... running at 33.333MHz */
 
 #define CFG_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CFG_HID0_FINAL		HID0_ICE
diff --git a/arch/ppc/boards/pcm030/pcm030.c b/arch/ppc/boards/pcm030/pcm030.c
index a7fa21d..c1b0c3f 100644
--- a/arch/ppc/boards/pcm030/pcm030.c
+++ b/arch/ppc/boards/pcm030/pcm030.c
@@ -32,6 +32,7 @@
 #include <memory.h>
 #include <linux/sizes.h>
 #include <linux/stat.h>
+#include <asm/io.h>
 #include <fs.h>
 
 static struct fec_platform_data fec_info = {
@@ -145,6 +146,12 @@ void initdram (int board_type)
 	*(vu_long *)MPC5XXX_CS_BURST = 0x00000000;
 	*(vu_long *)MPC5XXX_CS_DEADCYCLE = 0x33333333;
 
+	/*
+	 * Make USB work due to the special base crystal frequency:
+	 * 33,3330MHz * 16 = 533,328MHz main clock, but should be 528 MHz Clock
+	 */
+	out_be32((void *)MPC5XXX_CDM_48_FDC, 0x00015555);
+
 	mpc5200_setup_bus_clocks(1, 4);
 
 	if (get_pc() > SZ_128M) {
-- 
2.1.4


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  parent reply	other threads:[~2015-07-31  9:04 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-31  9:03 [PATCH] PowerPC/MPC5200 Juergen Borleis
2015-07-31  9:03 ` [PATCH 1/6] PPC/PCM030: remove nowhere used definitions Juergen Borleis
2015-07-31  9:03 ` Juergen Borleis [this message]
2015-07-31  9:03 ` [PATCH 3/6] PPC/PCM030: enable USB/OHCI pin support Juergen Borleis
2015-07-31  9:03 ` [PATCH 4/6] PPC/MPC52xx: unify header file name for clock API Juergen Borleis
2015-07-31  9:03 ` [PATCH 5/6] PPC/MPC5200: re-use the IMX I2C master driver for MPC5200 Juergen Borleis
2015-07-31  9:03 ` [PATCH 6/6] PPC/PCM030: provide EEPROM support to read factory settings Juergen Borleis
2015-07-31 11:17   ` fixup! " Juergen Borleis
2015-08-03  6:56 ` [PATCH] PowerPC/MPC5200 Sascha Hauer

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