From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] PL310 support
Date: Fri, 7 Aug 2015 15:35:40 +0200 [thread overview]
Message-ID: <1438954545-24917-1-git-send-email-s.hauer@pengutronix.de> (raw)
This series has some fixes for the cache-l2x0 driver and implements PL310
support. Finally the 2nd level cache on i.MX6 is enabled.
----------------------------------------------------------------
Sascha Hauer (5):
ARM: MMU: Fix order when flushing inner/outer cache
ARM: l2x0: Flush cache before disabling it
ARM: l2x0: Implement L310 support
ARM: l2x0: Add some informational debug messages
ARM: i.MX6: Enable l2 cache
arch/arm/cpu/cache-l2x0.c | 48 +++++++++++++++++++++++++++++++++++++++++++---
arch/arm/cpu/cache.c | 2 ++
arch/arm/cpu/cpu.c | 3 +--
arch/arm/cpu/mmu.c | 2 +-
arch/arm/include/asm/mmu.h | 1 +
arch/arm/mach-imx/Kconfig | 1 +
arch/arm/mach-imx/imx6.c | 35 +++++++++++++++++++++++++++++++++
7 files changed, 86 insertions(+), 6 deletions(-)
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next reply other threads:[~2015-08-07 13:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-07 13:35 Sascha Hauer [this message]
2015-08-07 13:35 ` [PATCH 1/5] ARM: MMU: Fix order when flushing inner/outer cache Sascha Hauer
2015-08-07 13:35 ` [PATCH 2/5] ARM: l2x0: Flush cache before disabling it Sascha Hauer
2015-08-07 13:35 ` [PATCH 3/5] ARM: l2x0: Implement L310 support Sascha Hauer
2015-08-07 13:35 ` [PATCH 4/5] ARM: l2x0: Add some informational debug messages Sascha Hauer
2015-08-07 13:35 ` [PATCH 5/5] ARM: i.MX6: Enable l2 cache Sascha Hauer
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