* [RFC 1/4] MIPS: ar933x: pbl: add pbl_ar9331_pll macro
2015-09-16 8:31 [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
@ 2015-09-16 8:31 ` Antony Pavlov
2015-09-16 8:31 ` [RFC 2/4] MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro Antony Pavlov
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-09-16 8:31 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
From: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/include/asm/pbl_macros.h | 21 ++++++++++++
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 5 +++
arch/mips/mach-ath79/include/mach/pbl_macros.h | 43 +++++++++++++++++++++++++
3 files changed, 69 insertions(+)
diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index 1d9d6ab..db46d0d 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -28,6 +28,27 @@
#include <generated/compile.h>
#include <generated/utsrelease.h>
+ .macro pbl_reg_writel val addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \val
+ sw t8, 0(t9)
+ .set pop
+ .endm
+
+ .macro pbl_reg_clr clr addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \clr
+ lw t7, 0(t9)
+ not t8, t8
+ and t7, t8
+ sw t7, 0(t9)
+ .set pop
+ .endm
+
.macro pbl_sleep reg count
.set push
.set noreorder
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 0c6ddd6..5082502 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -15,7 +15,11 @@
#ifndef __ASM_MACH_AR71XX_REGS_H
#define __ASM_MACH_AR71XX_REGS_H
+#ifndef __ASSEMBLER__
#include <linux/bitops.h>
+#else
+#define BIT(nr) (1 << (nr))
+#endif
#define AR71XX_APB_BASE 0x18000000
@@ -42,6 +46,7 @@
#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23
#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7
+#define AR933X_PLL_CPU_CONFIG_PLLPWD BIT(30)
#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2)
#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
new file mode 100644
index 0000000..1fc6eb5
--- /dev/null
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -0,0 +1,43 @@
+#ifndef __ASM_MACH_ATH79_PBL_MACROS_H
+#define __ASM_MACH_ATH79_PBL_MACROS_H
+
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <mach/ar71xx_regs.h>
+
+#define PLL_BASE (KSEG1 | AR71XX_PLL_BASE)
+#define PLL_CPU_CONFIG_REG (PLL_BASE | AR933X_PLL_CPU_CONFIG_REG)
+#define PLL_CPU_CONFIG2_REG (PLL_BASE | AR933X_PLL_CPU_CONFIG2_REG)
+#define PLL_CLOCK_CTRL_REG (PLL_BASE | AR933X_PLL_CLOCK_CTRL_REG)
+
+#define DEF_25MHZ_PLL_CLOCK_CTRL \
+ ((2 - 1) << AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT \
+ | (1 - 1) << AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT \
+ | (1 - 1) << AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT)
+#define DEF_25MHZ_SETTLE_TIME (34000 / 40)
+#define DEF_25MHZ_PLL_CONFIG ( 1 << AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT \
+ | 1 << AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT \
+ | 32 << AR933X_PLL_CPU_CONFIG_NINT_SHIFT)
+
+.macro pbl_ar9331_pll
+ .set push
+ .set noreorder
+
+ /* Most devices have 25 MHz Ref clock. */
+ pbl_reg_writel (DEF_25MHZ_PLL_CLOCK_CTRL | AR933X_PLL_CLOCK_CTRL_BYPASS), \
+ PLL_CLOCK_CTRL_REG
+ pbl_reg_writel DEF_25MHZ_SETTLE_TIME, PLL_CPU_CONFIG2_REG
+ pbl_reg_writel (DEF_25MHZ_PLL_CONFIG | AR933X_PLL_CPU_CONFIG_PLLPWD), \
+ PLL_CPU_CONFIG_REG
+
+ /* power on CPU PLL */
+ pbl_reg_clr AR933X_PLL_CPU_CONFIG_PLLPWD, PLL_CPU_CONFIG_REG
+ /* disable PLL bypass */
+ pbl_reg_clr AR933X_PLL_CLOCK_CTRL_BYPASS, PLL_CLOCK_CTRL_REG
+
+ pbl_sleep t2, 40
+
+ .set pop
+.endm
+
+#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.5.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* [RFC 2/4] MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro
2015-09-16 8:31 [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
2015-09-16 8:31 ` [RFC 1/4] MIPS: ar933x: pbl: add pbl_ar9331_pll macro Antony Pavlov
@ 2015-09-16 8:31 ` Antony Pavlov
2015-09-16 8:31 ` [RFC 3/4] MIPS: ath79: add black-swift board support Antony Pavlov
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-09-16 8:31 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 20 ++++++
arch/mips/mach-ath79/include/mach/pbl_macros.h | 89 +++++++++++++++++++++++++
2 files changed, 109 insertions(+)
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 5082502..6f1bf8e 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -23,6 +23,8 @@
#define AR71XX_APB_BASE 0x18000000
+#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
+#define AR71XX_DDR_CTRL_SIZE 0x100
#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
#define AR71XX_PLL_SIZE 0x100
#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
@@ -32,6 +34,24 @@
#define AR933X_UART_SIZE 0x14
/*
+ * DDR_CTRL block
+ */
+#define AR933X_DDR_CONFIG 0x00
+#define AR933X_DDR_CONFIG2 0x04
+#define AR933X_DDR_MODE 0x08
+#define AR933X_DDR_EXT_MODE 0x0c
+#define AR933X_DDR_CTRL 0x10
+#define AR933X_DDR_REFRESH 0x14
+#define AR933X_DDR_RD_DATA 0x18
+#define AR933X_DDR_TAP_CTRL0 0x1c
+#define AR933X_DDR_TAP_CTRL1 0x20
+#define AR933X_DDR_TAP_CTRL1 0x20
+
+#define AR933X_DDR_DDR_DDR2_CONFIG 0x8c
+#define AR933X_DDR_DDR_EMR2 0x90
+#define AR933X_DDR_DDR_EMR3 0x94
+
+/*
* PLL block
*/
#define AR933X_PLL_CPU_CONFIG_REG 0x00
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
index 1fc6eb5..f0e0174 100644
--- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -40,4 +40,93 @@
.set pop
.endm
+#define DDR_BASE (KSEG1 | AR71XX_DDR_CTRL_BASE)
+#define DDR_CONFIG (DDR_BASE | AR933X_DDR_CONFIG)
+#define DDR_CONFIG2 (DDR_BASE | AR933X_DDR_CONFIG2)
+#define DDR_MODE (DDR_BASE | AR933X_DDR_MODE)
+#define DDR_EXT_MODE (DDR_BASE | AR933X_DDR_EXT_MODE)
+
+#define DDR_CTRL (DDR_BASE | AR933X_DDR_CTRL)
+/* Forces an EMR3S (Extended Mode Register 3 Set) update cycle */
+#define DDR_CTRL_EMR3 BIT(5)
+/* Forces an EMR2S (Extended Mode Register 2 Set) update cycle */
+#define DDR_CTRL_EMR2 BIT(4)
+#define DDR_CTRL_PREA BIT(3) /* Forces a PRECHARGE ALL cycle */
+#define DDR_CTRL_REF BIT(2) /* Forces an AUTO REFRESH cycle */
+/* Forces an EMRS (Extended Mode Register 2 Set) update cycle */
+#define DDR_CTRL_EMRS BIT(1)
+/* Forces a MRS (Mode Register Set) update cycle */
+#define DDR_CTRL_MRS BIT(0)
+
+#define DDR_REFRESH (DDR_BASE | AR933X_DDR_REFRESH)
+#define DDR_RD_DATA (DDR_BASE | AR933X_DDR_RD_DATA)
+#define DDR_TAP_CTRL0 (DDR_BASE | AR933X_DDR_TAP_CTRL0)
+#define DDR_TAP_CTRL1 (DDR_BASE | AR933X_DDR_TAP_CTRL1)
+
+#define DDR_DDR2_CONFIG (DDR_BASE | AR933X_DDR_DDR_DDR2_CONFIG)
+#define DDR_EMR2 (DDR_BASE | AR933X_DDR_DDR_EMR2)
+#define DDR_EMR3 (DDR_BASE | AR933X_DDR_DDR_EMR3)
+
+.macro pbl_ar9331_ddr2_config
+ .set push
+ .set noreorder
+
+ pbl_reg_writel 0x7fbc8cd0, DDR_CONFIG
+ pbl_reg_writel 0x9dd0e6a8, DDR_CONFIG2
+
+ /* Enable DDR2 */
+ pbl_reg_writel 0x00000a59, DDR_DDR2_CONFIG
+ pbl_reg_writel DDR_CTRL_PREA, DDR_CTRL
+
+ /* Disable High Temperature Self-Refresh Rate */
+ pbl_reg_writel 0x00000000, DDR_EMR2
+ pbl_reg_writel DDR_CTRL_EMR2, DDR_CTRL
+
+ pbl_reg_writel 0x00000000, DDR_EMR3
+ pbl_reg_writel DDR_CTRL_EMR3, DDR_CTRL
+
+ /* Enable DLL */
+ pbl_reg_writel 0x00000000, DDR_EXT_MODE
+ pbl_reg_writel DDR_CTRL_EMRS, DDR_CTRL
+
+ /* Reset DLL */
+ pbl_reg_writel 0x00000100, DDR_MODE
+ pbl_reg_writel DDR_CTRL_MRS, DDR_CTRL
+
+ pbl_reg_writel DDR_CTRL_PREA, DDR_CTRL
+ pbl_reg_writel DDR_CTRL_REF, DDR_CTRL
+ pbl_reg_writel DDR_CTRL_REF, DDR_CTRL
+
+ /* Write recovery (WR) 6 clock, CAS Latency 3, Burst Length 8 */
+ pbl_reg_writel 0x00000a33, DDR_MODE
+ pbl_reg_writel DDR_CTRL_MRS, DDR_CTRL
+
+ /*
+ * DDR_EXT_MODE[9:7] = 0x7: (OCD Calibration defaults)
+ * DDR_EXT_MODE[1] = 1: Reduced Drive Strength
+ * DDR_EXT_MODE[0] = 0: Enable DLL
+ */
+ pbl_reg_writel 0x00000382, DDR_EXT_MODE
+ pbl_reg_writel DDR_CTRL_EMRS, DDR_CTRL
+
+ /*
+ * DDR_EXT_MODE[9:7] = 0x0: (OCD exit)
+ * DDR_EXT_MODE[1] = 1: Reduced Drive Strength
+ * DDR_EXT_MODE[0] = 0: Enable DLL
+ */
+ pbl_reg_writel 0x00000402, DDR_EXT_MODE
+ pbl_reg_writel DDR_CTRL_EMRS, DDR_CTRL
+
+ /* Refresh control. Bit 14 is enable. Bits <13:0> Refresh time */
+ pbl_reg_writel 0x00004186, DDR_REFRESH
+ /* DQS 0 Tap Control (needs tuning) */
+ pbl_reg_writel 0x00000008, DDR_TAP_CTRL0
+ /* DQS 1 Tap Control (needs tuning) */
+ pbl_reg_writel 0x00000009, DDR_TAP_CTRL1
+ /* For 16-bit DDR */
+ pbl_reg_writel 0x000000ff, DDR_RD_DATA
+
+ .set pop
+.endm
+
#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.5.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* [RFC 3/4] MIPS: ath79: add black-swift board support
2015-09-16 8:31 [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
2015-09-16 8:31 ` [RFC 1/4] MIPS: ar933x: pbl: add pbl_ar9331_pll macro Antony Pavlov
2015-09-16 8:31 ` [RFC 2/4] MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro Antony Pavlov
@ 2015-09-16 8:31 ` Antony Pavlov
2015-09-17 5:44 ` Sascha Hauer
2015-09-16 8:31 ` [RFC 4/4] MIPS: add black-swift_defconfig Antony Pavlov
2015-09-16 10:19 ` [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
4 siblings, 1 reply; 7+ messages in thread
From: Antony Pavlov @ 2015-09-16 8:31 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
Black Swift is a tiny coin-sized embedded computer based on AR9331 SoC.
See http://www.black-swift.com/ for details.
See also Black Swift kickstarter page:
https://www.kickstarter.com/projects/1133560316/black-swift-tiny-wireless-computer
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Makefile | 1 +
arch/mips/boards/black-swift/Makefile | 1 +
arch/mips/boards/black-swift/board.c | 27 +++++++++++++
.../black-swift/include/board/board_pbl_start.h | 46 ++++++++++++++++++++++
arch/mips/dts/black-swift.dts | 36 +++++++++++++++++
arch/mips/mach-ath79/Kconfig | 5 +++
6 files changed, 116 insertions(+)
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 6ef2bf7..75761b5 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -80,6 +80,7 @@ board-$(CONFIG_BOARD_NETGEAR_WG102) := netgear-wg102
machine-$(CONFIG_MACH_MIPS_ATH79) := ath79
board-$(CONFIG_BOARD_TPLINK_MR3020) := tplink-mr3020
+board-$(CONFIG_BOARD_BLACK_SWIFT) := black-swift
machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
diff --git a/arch/mips/boards/black-swift/Makefile b/arch/mips/boards/black-swift/Makefile
new file mode 100644
index 0000000..dcfc293
--- /dev/null
+++ b/arch/mips/boards/black-swift/Makefile
@@ -0,0 +1 @@
+obj-y += board.o
diff --git a/arch/mips/boards/black-swift/board.c b/arch/mips/boards/black-swift/board.c
new file mode 100644
index 0000000..2e2ed20
--- /dev/null
+++ b/arch/mips/boards/black-swift/board.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+
+static int model_hostname_init(void)
+{
+ barebox_set_hostname("black-swift");
+
+ return 0;
+}
+postcore_initcall(model_hostname_init);
diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
new file mode 100644
index 0000000..176491f
--- /dev/null
+++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2013, 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ * Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/pbl_macros.h>
+#include <mach/pbl_macros.h>
+
+ .macro board_pbl_start
+ .set push
+ .set noreorder
+
+ mips_barebox_10h
+
+ mips_disable_interrupts
+
+ pbl_ar9331_pll
+ pbl_ar9331_ddr2_config
+
+ /*
+ * General Purpose I/O Function (GPIO_FUNCTION_1)
+ *
+ * SPI_EN (18) enables SPI SPA Interface signals
+ * in GPIO_2, GPIO_3, GPIO_4 and GPIO_5.
+ * RES (15) reserved. This bit must be written with 1.
+ * UART_EN (2) enables UART I/O on GPIO_9 (SIN) and GPIO_10 (SOUT).
+ */
+ pbl_reg_writel 0x48002, 0xb8040028
+
+ copy_to_link_location pbl_start
+
+ .set pop
+ .endm
diff --git a/arch/mips/dts/black-swift.dts b/arch/mips/dts/black-swift.dts
new file mode 100644
index 0000000..db13c73
--- /dev/null
+++ b/arch/mips/dts/black-swift.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "Black Swift";
+ compatible = "smartlx,black-swift";
+
+ memory {
+ reg = <0x00000000 0x4000000>;
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ /* Winbond W25Q128FV SPI flash */
+ spiflash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
+
+/ {
+ aliases {
+ spiflash = &spiflash;
+ };
+};
diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig
index f730b37..09855e1 100644
--- a/arch/mips/mach-ath79/Kconfig
+++ b/arch/mips/mach-ath79/Kconfig
@@ -13,6 +13,11 @@ config BOARD_TPLINK_MR3020
select HAVE_IMAGE_COMPRESSION
select HAS_NMON
+config BOARD_BLACK_SWIFT
+ bool "Black Swift"
+ select HAVE_PBL_IMAGE
+ select HAVE_IMAGE_COMPRESSION
+
endchoice
endif
--
2.5.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [RFC 3/4] MIPS: ath79: add black-swift board support
2015-09-16 8:31 ` [RFC 3/4] MIPS: ath79: add black-swift board support Antony Pavlov
@ 2015-09-17 5:44 ` Sascha Hauer
0 siblings, 0 replies; 7+ messages in thread
From: Sascha Hauer @ 2015-09-17 5:44 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox, Oleksij Rempel
On Wed, Sep 16, 2015 at 11:31:31AM +0300, Antony Pavlov wrote:
> Black Swift is a tiny coin-sized embedded computer based on AR9331 SoC.
> See http://www.black-swift.com/ for details.
>
> See also Black Swift kickstarter page:
> https://www.kickstarter.com/projects/1133560316/black-swift-tiny-wireless-computer
>
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
> arch/mips/Makefile | 1 +
> arch/mips/boards/black-swift/Makefile | 1 +
> arch/mips/boards/black-swift/board.c | 27 +++++++++++++
> .../black-swift/include/board/board_pbl_start.h | 46 ++++++++++++++++++++++
> arch/mips/dts/black-swift.dts | 36 +++++++++++++++++
> arch/mips/mach-ath79/Kconfig | 5 +++
> 6 files changed, 116 insertions(+)
>
> diff --git a/arch/mips/Makefile b/arch/mips/Makefile
> index 6ef2bf7..75761b5 100644
> --- a/arch/mips/Makefile
> +++ b/arch/mips/Makefile
> @@ -80,6 +80,7 @@ board-$(CONFIG_BOARD_NETGEAR_WG102) := netgear-wg102
>
> machine-$(CONFIG_MACH_MIPS_ATH79) := ath79
> board-$(CONFIG_BOARD_TPLINK_MR3020) := tplink-mr3020
> +board-$(CONFIG_BOARD_BLACK_SWIFT) := black-swift
>
> machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
> board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
> diff --git a/arch/mips/boards/black-swift/Makefile b/arch/mips/boards/black-swift/Makefile
> new file mode 100644
> index 0000000..dcfc293
> --- /dev/null
> +++ b/arch/mips/boards/black-swift/Makefile
> @@ -0,0 +1 @@
> +obj-y += board.o
> diff --git a/arch/mips/boards/black-swift/board.c b/arch/mips/boards/black-swift/board.c
> new file mode 100644
> index 0000000..2e2ed20
> --- /dev/null
> +++ b/arch/mips/boards/black-swift/board.c
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com>
> + *
> + * This file is part of barebox.
> + * See file CREDITS for list of people who contributed to this project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +
> +static int model_hostname_init(void)
> +{
> + barebox_set_hostname("black-swift");
> +
> + return 0;
> +}
> +postcore_initcall(model_hostname_init);
> diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
> new file mode 100644
> index 0000000..176491f
> --- /dev/null
> +++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
> @@ -0,0 +1,46 @@
> +/*
> + * Copyright (C) 2013, 2015 Antony Pavlov <antonynpavlov@gmail.com>
> + * Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de>
> + *
> + * This file is part of barebox.
> + * See file CREDITS for list of people who contributed to this project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include <asm/pbl_macros.h>
> +#include <mach/pbl_macros.h>
> +
> + .macro board_pbl_start
> + .set push
> + .set noreorder
> +
> + mips_barebox_10h
> +
> + mips_disable_interrupts
> +
> + pbl_ar9331_pll
> + pbl_ar9331_ddr2_config
> +
> + /*
> + * General Purpose I/O Function (GPIO_FUNCTION_1)
> + *
> + * SPI_EN (18) enables SPI SPA Interface signals
> + * in GPIO_2, GPIO_3, GPIO_4 and GPIO_5.
> + * RES (15) reserved. This bit must be written with 1.
> + * UART_EN (2) enables UART I/O on GPIO_9 (SIN) and GPIO_10 (SOUT).
> + */
> + pbl_reg_writel 0x48002, 0xb8040028
> +
> + copy_to_link_location pbl_start
> +
> + .set pop
> + .endm
> diff --git a/arch/mips/dts/black-swift.dts b/arch/mips/dts/black-swift.dts
> new file mode 100644
> index 0000000..db13c73
> --- /dev/null
> +++ b/arch/mips/dts/black-swift.dts
> @@ -0,0 +1,36 @@
> +/dts-v1/;
> +
> +#include "ar9331.dtsi"
> +
> +/ {
> + model = "Black Swift";
> + compatible = "smartlx,black-swift";
> +
> + memory {
> + reg = <0x00000000 0x4000000>;
> + };
> +};
> +
> +&serial0 {
> + status = "okay";
> +};
> +
> +&spi {
> + num-chipselects = <1>;
> + status = "okay";
> +
> + /* Winbond W25Q128FV SPI flash */
> + spiflash: m25p80@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "m25p80";
> + spi-max-frequency = <104000000>;
> + reg = <0>;
> + };
> +};
> +
> +/ {
> + aliases {
> + spiflash = &spiflash;
> + };
I would expect this aliases node near the top of this file, that's where
aliases usually are.
Otherwise this series looks good to me, but I can't say much to it as I
don't know mips assembly. If it works for you I am fine with it.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC 4/4] MIPS: add black-swift_defconfig
2015-09-16 8:31 [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (2 preceding siblings ...)
2015-09-16 8:31 ` [RFC 3/4] MIPS: ath79: add black-swift board support Antony Pavlov
@ 2015-09-16 8:31 ` Antony Pavlov
2015-09-16 10:19 ` [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
4 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-09-16 8:31 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/configs/black-swift_defconfig | 37 +++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/mips/configs/black-swift_defconfig b/arch/mips/configs/black-swift_defconfig
new file mode 100644
index 0000000..61c6f81
--- /dev/null
+++ b/arch/mips/configs/black-swift_defconfig
@@ -0,0 +1,37 @@
+CONFIG_BUILTIN_DTB=y
+CONFIG_BUILTIN_DTB_NAME="black-swift"
+CONFIG_MACH_MIPS_ATH79=y
+CONFIG_BOARD_BLACK_SWIFT=y
+CONFIG_PBL_IMAGE=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_GLOBAL=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_OFDEVICE=y
+CONFIG_DRIVER_SERIAL_AR933X=y
+CONFIG_DRIVER_SPI_ATH79=y
+CONFIG_MTD=y
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_M25P80=y
+CONFIG_DIGEST_SHA224_GENERIC=y
+CONFIG_DIGEST_SHA256_GENERIC=y
--
2.5.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board
2015-09-16 8:31 [RFC 0/4] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (3 preceding siblings ...)
2015-09-16 8:31 ` [RFC 4/4] MIPS: add black-swift_defconfig Antony Pavlov
@ 2015-09-16 10:19 ` Antony Pavlov
4 siblings, 0 replies; 7+ messages in thread
From: Antony Pavlov @ 2015-09-16 10:19 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Wed, 16 Sep 2015 11:31:28 +0300
Antony Pavlov <antonynpavlov@gmail.com> wrote:
> This patchseries add necessary low level initialization routines for AR9331 SoC.
> The patchseries makes possible to use barebox as a first stage loader
> on the Black Swift board.
>
> The patchseries is heavily based on Oleksij Rempel's work on barebox for TP-Link MR3020.
>
> TODOs:
>
> * add UART initialization routune for DEBUG_LL and NMON;
> * add macros for GPIO_FUNCTION_1 register initialization;
> * check macros names linux kernel source compartibility;
> * DT compatible string vendor "smartlx" appears un-documented.
> The site http://www.smartlx.ru/ is suspended.
* add barebox Black Swift flashing instruction.
>
>
> Antony Pavlov (3):
> MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro
> MIPS: ath79: add black-swift board support
> MIPS: add black-swift_defconfig
>
> Oleksij Rempel (1):
> MIPS: ar933x: pbl: add pbl_ar9331_pll macro
>
> arch/mips/Makefile | 1 +
> arch/mips/boards/black-swift/Makefile | 1 +
> arch/mips/boards/black-swift/board.c | 27 +++++
> .../black-swift/include/board/board_pbl_start.h | 46 +++++++
> arch/mips/configs/black-swift_defconfig | 37 ++++++
> arch/mips/dts/black-swift.dts | 36 ++++++
> arch/mips/include/asm/pbl_macros.h | 21 ++++
> arch/mips/mach-ath79/Kconfig | 5 +
> arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 25 ++++
> arch/mips/mach-ath79/include/mach/pbl_macros.h | 132 +++++++++++++++++++++
> 10 files changed, 331 insertions(+)
> create mode 100644 arch/mips/boards/black-swift/Makefile
> create mode 100644 arch/mips/boards/black-swift/board.c
> create mode 100644 arch/mips/boards/black-swift/include/board/board_pbl_start.h
> create mode 100644 arch/mips/configs/black-swift_defconfig
> create mode 100644 arch/mips/dts/black-swift.dts
> create mode 100644 arch/mips/mach-ath79/include/mach/pbl_macros.h
>
> --
> 2.5.0
>
--
--
Best regards,
Antony Pavlov
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^ permalink raw reply [flat|nested] 7+ messages in thread