* [RFC v2 01/10] MIPS: ar933x: pbl: add pbl_ar9331_pll macro
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 02/10] MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro Antony Pavlov
` (9 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
From: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/include/asm/pbl_macros.h | 21 ++++++++++++
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
arch/mips/mach-ath79/include/mach/pbl_macros.h | 43 +++++++++++++++++++++++++
3 files changed, 65 insertions(+)
diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index 1d9d6ab..db46d0d 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -28,6 +28,27 @@
#include <generated/compile.h>
#include <generated/utsrelease.h>
+ .macro pbl_reg_writel val addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \val
+ sw t8, 0(t9)
+ .set pop
+ .endm
+
+ .macro pbl_reg_clr clr addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \clr
+ lw t7, 0(t9)
+ not t8, t8
+ and t7, t8
+ sw t7, 0(t9)
+ .set pop
+ .endm
+
.macro pbl_sleep reg count
.set push
.set noreorder
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 77138ab..5082502 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -46,6 +46,7 @@
#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23
#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7
+#define AR933X_PLL_CPU_CONFIG_PLLPWD BIT(30)
#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2)
#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
new file mode 100644
index 0000000..1fc6eb5
--- /dev/null
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -0,0 +1,43 @@
+#ifndef __ASM_MACH_ATH79_PBL_MACROS_H
+#define __ASM_MACH_ATH79_PBL_MACROS_H
+
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <mach/ar71xx_regs.h>
+
+#define PLL_BASE (KSEG1 | AR71XX_PLL_BASE)
+#define PLL_CPU_CONFIG_REG (PLL_BASE | AR933X_PLL_CPU_CONFIG_REG)
+#define PLL_CPU_CONFIG2_REG (PLL_BASE | AR933X_PLL_CPU_CONFIG2_REG)
+#define PLL_CLOCK_CTRL_REG (PLL_BASE | AR933X_PLL_CLOCK_CTRL_REG)
+
+#define DEF_25MHZ_PLL_CLOCK_CTRL \
+ ((2 - 1) << AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT \
+ | (1 - 1) << AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT \
+ | (1 - 1) << AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT)
+#define DEF_25MHZ_SETTLE_TIME (34000 / 40)
+#define DEF_25MHZ_PLL_CONFIG ( 1 << AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT \
+ | 1 << AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT \
+ | 32 << AR933X_PLL_CPU_CONFIG_NINT_SHIFT)
+
+.macro pbl_ar9331_pll
+ .set push
+ .set noreorder
+
+ /* Most devices have 25 MHz Ref clock. */
+ pbl_reg_writel (DEF_25MHZ_PLL_CLOCK_CTRL | AR933X_PLL_CLOCK_CTRL_BYPASS), \
+ PLL_CLOCK_CTRL_REG
+ pbl_reg_writel DEF_25MHZ_SETTLE_TIME, PLL_CPU_CONFIG2_REG
+ pbl_reg_writel (DEF_25MHZ_PLL_CONFIG | AR933X_PLL_CPU_CONFIG_PLLPWD), \
+ PLL_CPU_CONFIG_REG
+
+ /* power on CPU PLL */
+ pbl_reg_clr AR933X_PLL_CPU_CONFIG_PLLPWD, PLL_CPU_CONFIG_REG
+ /* disable PLL bypass */
+ pbl_reg_clr AR933X_PLL_CLOCK_CTRL_BYPASS, PLL_CLOCK_CTRL_REG
+
+ pbl_sleep t2, 40
+
+ .set pop
+.endm
+
+#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 02/10] MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
2015-09-20 23:23 ` [RFC v2 01/10] MIPS: ar933x: pbl: add pbl_ar9331_pll macro Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 03/10] MIPS: mach-ath79: add pbl_ar9331_uart_enable macro Antony Pavlov
` (8 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 20 ++++++
arch/mips/mach-ath79/include/mach/pbl_macros.h | 89 +++++++++++++++++++++++++
2 files changed, 109 insertions(+)
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 5082502..6f1bf8e 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -23,6 +23,8 @@
#define AR71XX_APB_BASE 0x18000000
+#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
+#define AR71XX_DDR_CTRL_SIZE 0x100
#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
#define AR71XX_PLL_SIZE 0x100
#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
@@ -32,6 +34,24 @@
#define AR933X_UART_SIZE 0x14
/*
+ * DDR_CTRL block
+ */
+#define AR933X_DDR_CONFIG 0x00
+#define AR933X_DDR_CONFIG2 0x04
+#define AR933X_DDR_MODE 0x08
+#define AR933X_DDR_EXT_MODE 0x0c
+#define AR933X_DDR_CTRL 0x10
+#define AR933X_DDR_REFRESH 0x14
+#define AR933X_DDR_RD_DATA 0x18
+#define AR933X_DDR_TAP_CTRL0 0x1c
+#define AR933X_DDR_TAP_CTRL1 0x20
+#define AR933X_DDR_TAP_CTRL1 0x20
+
+#define AR933X_DDR_DDR_DDR2_CONFIG 0x8c
+#define AR933X_DDR_DDR_EMR2 0x90
+#define AR933X_DDR_DDR_EMR3 0x94
+
+/*
* PLL block
*/
#define AR933X_PLL_CPU_CONFIG_REG 0x00
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
index 1fc6eb5..f0e0174 100644
--- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -40,4 +40,93 @@
.set pop
.endm
+#define DDR_BASE (KSEG1 | AR71XX_DDR_CTRL_BASE)
+#define DDR_CONFIG (DDR_BASE | AR933X_DDR_CONFIG)
+#define DDR_CONFIG2 (DDR_BASE | AR933X_DDR_CONFIG2)
+#define DDR_MODE (DDR_BASE | AR933X_DDR_MODE)
+#define DDR_EXT_MODE (DDR_BASE | AR933X_DDR_EXT_MODE)
+
+#define DDR_CTRL (DDR_BASE | AR933X_DDR_CTRL)
+/* Forces an EMR3S (Extended Mode Register 3 Set) update cycle */
+#define DDR_CTRL_EMR3 BIT(5)
+/* Forces an EMR2S (Extended Mode Register 2 Set) update cycle */
+#define DDR_CTRL_EMR2 BIT(4)
+#define DDR_CTRL_PREA BIT(3) /* Forces a PRECHARGE ALL cycle */
+#define DDR_CTRL_REF BIT(2) /* Forces an AUTO REFRESH cycle */
+/* Forces an EMRS (Extended Mode Register 2 Set) update cycle */
+#define DDR_CTRL_EMRS BIT(1)
+/* Forces a MRS (Mode Register Set) update cycle */
+#define DDR_CTRL_MRS BIT(0)
+
+#define DDR_REFRESH (DDR_BASE | AR933X_DDR_REFRESH)
+#define DDR_RD_DATA (DDR_BASE | AR933X_DDR_RD_DATA)
+#define DDR_TAP_CTRL0 (DDR_BASE | AR933X_DDR_TAP_CTRL0)
+#define DDR_TAP_CTRL1 (DDR_BASE | AR933X_DDR_TAP_CTRL1)
+
+#define DDR_DDR2_CONFIG (DDR_BASE | AR933X_DDR_DDR_DDR2_CONFIG)
+#define DDR_EMR2 (DDR_BASE | AR933X_DDR_DDR_EMR2)
+#define DDR_EMR3 (DDR_BASE | AR933X_DDR_DDR_EMR3)
+
+.macro pbl_ar9331_ddr2_config
+ .set push
+ .set noreorder
+
+ pbl_reg_writel 0x7fbc8cd0, DDR_CONFIG
+ pbl_reg_writel 0x9dd0e6a8, DDR_CONFIG2
+
+ /* Enable DDR2 */
+ pbl_reg_writel 0x00000a59, DDR_DDR2_CONFIG
+ pbl_reg_writel DDR_CTRL_PREA, DDR_CTRL
+
+ /* Disable High Temperature Self-Refresh Rate */
+ pbl_reg_writel 0x00000000, DDR_EMR2
+ pbl_reg_writel DDR_CTRL_EMR2, DDR_CTRL
+
+ pbl_reg_writel 0x00000000, DDR_EMR3
+ pbl_reg_writel DDR_CTRL_EMR3, DDR_CTRL
+
+ /* Enable DLL */
+ pbl_reg_writel 0x00000000, DDR_EXT_MODE
+ pbl_reg_writel DDR_CTRL_EMRS, DDR_CTRL
+
+ /* Reset DLL */
+ pbl_reg_writel 0x00000100, DDR_MODE
+ pbl_reg_writel DDR_CTRL_MRS, DDR_CTRL
+
+ pbl_reg_writel DDR_CTRL_PREA, DDR_CTRL
+ pbl_reg_writel DDR_CTRL_REF, DDR_CTRL
+ pbl_reg_writel DDR_CTRL_REF, DDR_CTRL
+
+ /* Write recovery (WR) 6 clock, CAS Latency 3, Burst Length 8 */
+ pbl_reg_writel 0x00000a33, DDR_MODE
+ pbl_reg_writel DDR_CTRL_MRS, DDR_CTRL
+
+ /*
+ * DDR_EXT_MODE[9:7] = 0x7: (OCD Calibration defaults)
+ * DDR_EXT_MODE[1] = 1: Reduced Drive Strength
+ * DDR_EXT_MODE[0] = 0: Enable DLL
+ */
+ pbl_reg_writel 0x00000382, DDR_EXT_MODE
+ pbl_reg_writel DDR_CTRL_EMRS, DDR_CTRL
+
+ /*
+ * DDR_EXT_MODE[9:7] = 0x0: (OCD exit)
+ * DDR_EXT_MODE[1] = 1: Reduced Drive Strength
+ * DDR_EXT_MODE[0] = 0: Enable DLL
+ */
+ pbl_reg_writel 0x00000402, DDR_EXT_MODE
+ pbl_reg_writel DDR_CTRL_EMRS, DDR_CTRL
+
+ /* Refresh control. Bit 14 is enable. Bits <13:0> Refresh time */
+ pbl_reg_writel 0x00004186, DDR_REFRESH
+ /* DQS 0 Tap Control (needs tuning) */
+ pbl_reg_writel 0x00000008, DDR_TAP_CTRL0
+ /* DQS 1 Tap Control (needs tuning) */
+ pbl_reg_writel 0x00000009, DDR_TAP_CTRL1
+ /* For 16-bit DDR */
+ pbl_reg_writel 0x000000ff, DDR_RD_DATA
+
+ .set pop
+.endm
+
#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 03/10] MIPS: mach-ath79: add pbl_ar9331_uart_enable macro
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
2015-09-20 23:23 ` [RFC v2 01/10] MIPS: ar933x: pbl: add pbl_ar9331_pll macro Antony Pavlov
2015-09-20 23:23 ` [RFC v2 02/10] MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 04/10] MIPS: mach-ath79: add debug_ll_ar9331_init macro Antony Pavlov
` (7 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/include/asm/pbl_macros.h | 11 +++++++++++
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 20 ++++++++++++++++++++
arch/mips/mach-ath79/include/mach/pbl_macros.h | 7 +++++++
3 files changed, 38 insertions(+)
diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index db46d0d..681b40a 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -37,6 +37,17 @@
.set pop
.endm
+ .macro pbl_reg_set val addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \val
+ lw t7, 0(t9)
+ or t7, t8
+ sw t7, 0(t9)
+ .set pop
+ .endm
+
.macro pbl_reg_clr clr addr
.set push
.set noreorder
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 6f1bf8e..4cbe94a 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -25,6 +25,8 @@
#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
#define AR71XX_DDR_CTRL_SIZE 0x100
+#define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000)
+#define AR71XX_GPIO_SIZE 0x100
#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
#define AR71XX_PLL_SIZE 0x100
#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
@@ -52,6 +54,24 @@
#define AR933X_DDR_DDR_EMR3 0x94
/*
+ * GPIO block
+ */
+#define AR71XX_GPIO_REG_OE 0x00
+#define AR71XX_GPIO_REG_IN 0x04
+#define AR71XX_GPIO_REG_OUT 0x08
+#define AR71XX_GPIO_REG_SET 0x0c
+#define AR71XX_GPIO_REG_CLEAR 0x10
+#define AR71XX_GPIO_REG_INT_MODE 0x14
+#define AR71XX_GPIO_REG_INT_TYPE 0x18
+#define AR71XX_GPIO_REG_INT_POLARITY 0x1c
+#define AR71XX_GPIO_REG_INT_PENDING 0x20
+#define AR71XX_GPIO_REG_INT_ENABLE 0x24
+#define AR71XX_GPIO_REG_FUNC 0x28
+/* Warning! GPIO_FUNC[15] must be written with 1 */
+#define AR933X_GPIO_FUNC_RSRV15 BIT(15)
+#define AR933X_GPIO_FUNC_UART_EN BIT(1)
+
+/*
* PLL block
*/
#define AR933X_PLL_CPU_CONFIG_REG 0x00
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
index f0e0174..4ef90dc 100644
--- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -129,4 +129,11 @@
.set pop
.endm
+#define GPIO_FUNC ((KSEG1 | AR71XX_GPIO_BASE) | AR71XX_GPIO_REG_FUNC)
+
+.macro pbl_ar9331_uart_enable
+ pbl_reg_set AR933X_GPIO_FUNC_UART_EN \
+ | AR933X_GPIO_FUNC_RSRV15, GPIO_FUNC
+.endm
+
#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 04/10] MIPS: mach-ath79: add debug_ll_ar9331_init macro
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (2 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 03/10] MIPS: mach-ath79: add pbl_ar9331_uart_enable macro Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 05/10] MIPS: ath79: add black-swift board support Antony Pavlov
` (6 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/mach-ath79/include/mach/debug_ll.h | 29 ++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/mips/mach-ath79/include/mach/debug_ll.h b/arch/mips/mach-ath79/include/mach/debug_ll.h
index d3813af..e0c3f79 100644
--- a/arch/mips/mach-ath79/include/mach/debug_ll.h
+++ b/arch/mips/mach-ath79/include/mach/debug_ll.h
@@ -63,6 +63,35 @@ static inline void PUTC_LL(int ch)
* Macros for use in assembly language code
*/
+#define AR933X_UART_CS_REG 0x04
+#define UART_CS_REG ((KSEG1 | AR933X_UART_BASE) | AR933X_UART_CS_REG)
+#define AR933X_UART_CS_IF_MODE_S 2
+#define AR933X_UART_CS_IF_MODE_DCE 2
+#define AR933X_UART_CS_TX_READY_ORIDE BIT(7)
+#define AR933X_UART_CS_RX_READY_ORIDE BIT(8)
+
+/*
+ * simple uart clock setup
+ * from u-boot_mod/u-boot/cpu/mips/ar7240/hornet_serial.c
+ */
+#define BAUD_CLOCK 25000000
+#define CLOCK_SCALE ((BAUD_CLOCK / (16 * CONFIG_BAUDRATE)) - 1)
+#define CLOCK_STEP 0x2000
+
+#define AR933X_UART_CLOCK_REG 0x08
+#define CLOCK_REG ((KSEG1 | AR933X_UART_BASE) | AR933X_UART_CLOCK_REG)
+
+.macro debug_ll_ar9331_init
+#ifdef CONFIG_DEBUG_LL
+
+ pbl_reg_writel ((AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) \
+ | AR933X_UART_CS_TX_READY_ORIDE \
+ | AR933X_UART_CS_RX_READY_ORIDE), UART_CS_REG
+ pbl_reg_writel ((CLOCK_SCALE << 16) | CLOCK_STEP), CLOCK_REG
+
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
/*
* output a character in a0
*/
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 05/10] MIPS: ath79: add black-swift board support
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (3 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 04/10] MIPS: mach-ath79: add debug_ll_ar9331_init macro Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 06/10] MIPS: add black-swift_defconfig Antony Pavlov
` (5 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
Black Swift is a tiny coin-sized embedded computer based on AR9331 SoC.
See http://www.black-swift.com/ for details.
See also Black Swift kickstarter page:
https://www.kickstarter.com/projects/1133560316/black-swift-tiny-wireless-computer
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Makefile | 1 +
arch/mips/boards/black-swift/Makefile | 1 +
arch/mips/boards/black-swift/board.c | 27 ++++++++++++++
.../black-swift/include/board/board_pbl_start.h | 41 ++++++++++++++++++++++
arch/mips/dts/black-swift.dts | 34 ++++++++++++++++++
arch/mips/mach-ath79/Kconfig | 6 ++++
6 files changed, 110 insertions(+)
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 6ef2bf7..75761b5 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -80,6 +80,7 @@ board-$(CONFIG_BOARD_NETGEAR_WG102) := netgear-wg102
machine-$(CONFIG_MACH_MIPS_ATH79) := ath79
board-$(CONFIG_BOARD_TPLINK_MR3020) := tplink-mr3020
+board-$(CONFIG_BOARD_BLACK_SWIFT) := black-swift
machine-$(CONFIG_MACH_MIPS_BCM47XX) := bcm47xx
board-$(CONFIG_BOARD_DLINK_DIR320) := dlink-dir-320
diff --git a/arch/mips/boards/black-swift/Makefile b/arch/mips/boards/black-swift/Makefile
new file mode 100644
index 0000000..dcfc293
--- /dev/null
+++ b/arch/mips/boards/black-swift/Makefile
@@ -0,0 +1 @@
+obj-y += board.o
diff --git a/arch/mips/boards/black-swift/board.c b/arch/mips/boards/black-swift/board.c
new file mode 100644
index 0000000..2e2ed20
--- /dev/null
+++ b/arch/mips/boards/black-swift/board.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+
+static int model_hostname_init(void)
+{
+ barebox_set_hostname("black-swift");
+
+ return 0;
+}
+postcore_initcall(model_hostname_init);
diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
new file mode 100644
index 0000000..f78e0d9
--- /dev/null
+++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2013, 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ * Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/pbl_macros.h>
+#include <mach/pbl_macros.h>
+#include <asm/pbl_nmon.h>
+
+ .macro board_pbl_start
+ .set push
+ .set noreorder
+
+ mips_barebox_10h
+
+ mips_disable_interrupts
+
+ pbl_ar9331_pll
+ pbl_ar9331_ddr2_config
+
+ pbl_ar9331_uart_enable
+ debug_ll_ar9331_init
+ mips_nmon
+
+ copy_to_link_location pbl_start
+
+ .set pop
+ .endm
diff --git a/arch/mips/dts/black-swift.dts b/arch/mips/dts/black-swift.dts
new file mode 100644
index 0000000..270374d
--- /dev/null
+++ b/arch/mips/dts/black-swift.dts
@@ -0,0 +1,34 @@
+/dts-v1/;
+
+#include "ar9331.dtsi"
+
+/ {
+ model = "Black Swift";
+ compatible = "smartlx,black-swift";
+
+ memory {
+ reg = <0x00000000 0x4000000>;
+ };
+
+ aliases {
+ spiflash = &spiflash;
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&spi {
+ num-chipselects = <1>;
+ status = "okay";
+
+ /* Winbond W25Q128FV SPI flash */
+ spiflash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig
index f730b37..9b8e394 100644
--- a/arch/mips/mach-ath79/Kconfig
+++ b/arch/mips/mach-ath79/Kconfig
@@ -13,6 +13,12 @@ config BOARD_TPLINK_MR3020
select HAVE_IMAGE_COMPRESSION
select HAS_NMON
+config BOARD_BLACK_SWIFT
+ bool "Black Swift"
+ select HAVE_PBL_IMAGE
+ select HAVE_IMAGE_COMPRESSION
+ select HAS_NMON
+
endchoice
endif
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 06/10] MIPS: add black-swift_defconfig
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (4 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 05/10] MIPS: ath79: add black-swift board support Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 07/10] gpio: add ath79-gpio driver for Atheros MIPS SoCs Antony Pavlov
` (4 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/configs/black-swift_defconfig | 45 +++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/mips/configs/black-swift_defconfig b/arch/mips/configs/black-swift_defconfig
new file mode 100644
index 0000000..cfe2a8f
--- /dev/null
+++ b/arch/mips/configs/black-swift_defconfig
@@ -0,0 +1,45 @@
+CONFIG_BUILTIN_DTB=y
+CONFIG_BUILTIN_DTB_NAME="black-swift"
+CONFIG_MACH_MIPS_ATH79=y
+CONFIG_BOARD_BLACK_SWIFT=y
+CONFIG_NMON=y
+CONFIG_NMON_USER_START=y
+CONFIG_NMON_1S_DELAY=0x100000
+CONFIG_NMON_USER_START_DELAY=0x5
+CONFIG_NMON_HELP=y
+CONFIG_PBL_IMAGE=y
+CONFIG_MALLOC_TLSF=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_IMD=y
+CONFIG_PARTITION=y
+CONFIG_DEBUG_LL=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_GLOBAL=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_OFDEVICE=y
+CONFIG_DRIVER_SERIAL_AR933X=y
+CONFIG_DRIVER_SPI_ATH79=y
+CONFIG_MTD=y
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_M25P80=y
+CONFIG_DIGEST_SHA224_GENERIC=y
+CONFIG_DIGEST_SHA256_GENERIC=y
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 07/10] gpio: add ath79-gpio driver for Atheros MIPS SoCs
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (5 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 06/10] MIPS: add black-swift_defconfig Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 08/10] MIPS: ath79: use gpiolib Antony Pavlov
` (3 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
This driver is based on linux-4.2 driver.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-ath79.c | 146 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 147 insertions(+)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1d94661..f39e8da 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_GPIOLIB) += gpiolib.o
obj-$(CONFIG_GPIO_74164) += gpio-74164.o
+obj-$(CONFIG_MACH_MIPS_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_BCM2835) += gpio-bcm2835.o
obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c
new file mode 100644
index 0000000..353b520
--- /dev/null
+++ b/drivers/gpio/gpio-ath79.c
@@ -0,0 +1,146 @@
+/*
+ * Atheros AR71XX/AR724X/AR913X GPIO API support
+ *
+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <gpio.h>
+#include <malloc.h>
+
+#include <mach/ar71xx_regs.h>
+#include <mach/ath79.h>
+
+static void __iomem *ath79_gpio_base;
+static u32 ath79_gpio_count;
+
+static void __ath79_gpio_set_value(unsigned gpio, int value)
+{
+ void __iomem *base = ath79_gpio_base;
+
+ if (value)
+ __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET);
+ else
+ __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR);
+}
+
+static int __ath79_gpio_get_value(unsigned gpio)
+{
+ return (__raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
+}
+
+static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned offset)
+{
+ return __ath79_gpio_get_value(offset);
+}
+
+static void ath79_gpio_set_value(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ __ath79_gpio_set_value(offset, value);
+}
+
+static int ath79_gpio_direction_input(struct gpio_chip *chip,
+ unsigned offset)
+{
+ void __iomem *base = ath79_gpio_base;
+
+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
+ base + AR71XX_GPIO_REG_OE);
+
+ return 0;
+}
+
+static int ath79_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ void __iomem *base = ath79_gpio_base;
+
+ if (value)
+ __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
+ else
+ __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
+
+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
+ base + AR71XX_GPIO_REG_OE);
+
+ return 0;
+}
+
+static struct gpio_ops ath79_gpio_ops = {
+ .get = ath79_gpio_get_value,
+ .set = ath79_gpio_set_value,
+ .direction_input = ath79_gpio_direction_input,
+ .direction_output = ath79_gpio_direction_output,
+};
+
+static struct gpio_chip ath79_gpio_chip = {
+ .ops = &ath79_gpio_ops,
+ .base = 0,
+};
+
+static const struct of_device_id ath79_gpio_of_match[] = {
+ { .compatible = "qca,ar7100-gpio" },
+ {},
+};
+
+static int ath79_gpio_probe(struct device_d *dev)
+{
+ struct device_node *np = dev->device_node;
+ int err;
+
+ if (!np) {
+ dev_err(dev, "No DT node or platform data found\n");
+ return -EINVAL;
+ }
+
+ err = of_property_read_u32(np, "ngpios", &ath79_gpio_count);
+ if (err) {
+ dev_err(dev, "ngpios property is not valid\n");
+ return err;
+ }
+ if (ath79_gpio_count >= 32) {
+ dev_err(dev, "ngpios must be less than 32\n");
+ return -EINVAL;
+ }
+
+ ath79_gpio_base = dev_request_mem_region(dev, 0);
+ if (IS_ERR(ath79_gpio_base)) {
+ dev_err(dev, "could not get memory region\n");
+ return PTR_ERR(ath79_gpio_base);
+ }
+
+ ath79_gpio_chip.dev = dev;
+ ath79_gpio_chip.ngpio = ath79_gpio_count;
+
+ err = gpiochip_add(&ath79_gpio_chip);
+ if (err) {
+ dev_err(dev, "cannot add AR71xx GPIO chip, error=%d", err);
+ return err;
+ }
+
+ return 0;
+}
+
+static struct driver_d ath79_gpio_driver = {
+ .name = "ath79-gpio",
+ .probe = ath79_gpio_probe,
+ .of_compatible = DRV_OF_COMPAT(ath79_gpio_of_match),
+};
+
+static int ath79_gpio_init(void)
+{
+ return platform_driver_register(&ath79_gpio_driver);
+}
+coredevice_initcall(ath79_gpio_init);
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 08/10] MIPS: ath79: use gpiolib
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (6 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 07/10] gpio: add ath79-gpio driver for Atheros MIPS SoCs Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 09/10] MIPS: dts: ar9331.dtsi: add gpio Antony Pavlov
` (2 subsequent siblings)
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index aeb5c04..a2d443f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -68,6 +68,7 @@ config MACH_MIPS_ATH79
select COMMON_CLK_OF_PROVIDER
select CLKDEV_LOOKUP
select OFTREE
+ select GPIOLIB
config MACH_MIPS_BCM47XX
bool "Broadcom BCM47xx-based boards"
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 09/10] MIPS: dts: ar9331.dtsi: add gpio
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (7 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 08/10] MIPS: ath79: use gpiolib Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-20 23:23 ` [RFC v2 10/10] WIP: MIPS: black-swift: use GPIO Antony Pavlov
2015-09-23 4:53 ` [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Sascha Hauer
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/dts/ar9331.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi
index 8e7afcd..99ede9e 100644
--- a/arch/mips/dts/ar9331.dtsi
+++ b/arch/mips/dts/ar9331.dtsi
@@ -17,6 +17,16 @@
status = "disabled";
};
+ gpio: gpio@18040000 {
+ compatible = "qca,ar7100-gpio";
+ gpio-controller;
+ reg = <0x18040000 0x100>;
+ #gpio-cells = <2>;
+
+ ngpios = <30>;
+ status = "disabled";
+ };
+
ar9331_clk: clock {
compatible = "qca,ar933x-clk";
reg = <0x18050000 0x48>;
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* [RFC v2 10/10] WIP: MIPS: black-swift: use GPIO
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (8 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 09/10] MIPS: dts: ar9331.dtsi: add gpio Antony Pavlov
@ 2015-09-20 23:23 ` Antony Pavlov
2015-09-23 4:53 ` [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Sascha Hauer
10 siblings, 0 replies; 14+ messages in thread
From: Antony Pavlov @ 2015-09-20 23:23 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/boot/start.S | 2 ++
arch/mips/dts/black-swift.dts | 26 ++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/mips/boot/start.S b/arch/mips/boot/start.S
index 1ddce95..d6449e1 100644
--- a/arch/mips/boot/start.S
+++ b/arch/mips/boot/start.S
@@ -34,6 +34,8 @@ EXPORT(_start)
mips_disable_interrupts
+ pbl_reg_set (1 << 18), 0xb80600ac
+
copy_to_link_location _start
stack_setup
diff --git a/arch/mips/dts/black-swift.dts b/arch/mips/dts/black-swift.dts
index 270374d..e2d1271 100644
--- a/arch/mips/dts/black-swift.dts
+++ b/arch/mips/dts/black-swift.dts
@@ -1,6 +1,8 @@
/dts-v1/;
#include "ar9331.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
/ {
model = "Black Swift";
@@ -13,6 +15,26 @@
aliases {
spiflash = &spiflash;
};
+
+ buttons {
+ compatible = "gpio-keys";
+
+ s1 {
+ label = "S1";
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_UP>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ s1 {
+ label = "LED1";
+ gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
};
&serial0 {
@@ -32,3 +54,7 @@
reg = <0>;
};
};
+
+&gpio {
+ status = "okay";
+};
--
2.5.0
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board
2015-09-20 23:23 [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Antony Pavlov
` (9 preceding siblings ...)
2015-09-20 23:23 ` [RFC v2 10/10] WIP: MIPS: black-swift: use GPIO Antony Pavlov
@ 2015-09-23 4:53 ` Sascha Hauer
2015-09-23 6:11 ` Antony Pavlov
10 siblings, 1 reply; 14+ messages in thread
From: Sascha Hauer @ 2015-09-23 4:53 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
Antony,
Since it's RFC, should I apply this series?
Sascha
On Mon, Sep 21, 2015 at 02:23:43AM +0300, Antony Pavlov wrote:
> This patchseries adds necessary AR9331 SoC low level initialization routines.
> The patchseries makes it possible to use barebox as a first stage loader
> on the Black Swift board and, I suppose, other widespread AR9331-based boards.
>
> The patchseries is heavily based on Oleksij Rempel's work on barebox for TP-Link MR3020.
>
> TODOs:
>
> * add TP-Link MR3020 support (see http://openocd.zylin.com/gitweb?p=openocd.git;a=commitdiff;h=f59d2d9ecfee8899df531b87b7acaa468725f238);
> * clean up Black Swift GPIO code (pbl_reg_set (1 << 18), 0xb80600ac);
> * check macros names linux kernel source compartibility;
> * DT compatible string vendor "smartlx" appears un-documented.
> The site http://www.smartlx.ru/ is suspended.
>
>
> Changes since RFC v1:
>
> * add UART initialization routune for DEBUG_LL and NMON;
> * add macros for GPIO_FUNCTION_1 register initialization;
> * add ar71xx GPIO driver.
>
>
> Antony Pavlov (9):
> MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro
> MIPS: mach-ath79: add pbl_ar9331_uart_enable macro
> MIPS: mach-ath79: add debug_ll_ar9331_init macro
> MIPS: ath79: add black-swift board support
> MIPS: add black-swift_defconfig
> gpio: add ath79-gpio driver for Atheros MIPS SoCs
> MIPS: ath79: use gpiolib
> MIPS: dts: ar9331.dtsi: add gpio
> WIP: MIPS: black-swift: use GPIO
>
> Oleksij Rempel (1):
> MIPS: ar933x: pbl: add pbl_ar9331_pll macro
>
> arch/mips/Kconfig | 1 +
> arch/mips/Makefile | 1 +
> arch/mips/boards/black-swift/Makefile | 1 +
> arch/mips/boards/black-swift/board.c | 27 ++++
> .../black-swift/include/board/board_pbl_start.h | 41 ++++++
> arch/mips/boot/start.S | 2 +
> arch/mips/configs/black-swift_defconfig | 45 +++++++
> arch/mips/dts/ar9331.dtsi | 10 ++
> arch/mips/dts/black-swift.dts | 60 +++++++++
> arch/mips/include/asm/pbl_macros.h | 32 +++++
> arch/mips/mach-ath79/Kconfig | 6 +
> arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 41 ++++++
> arch/mips/mach-ath79/include/mach/debug_ll.h | 29 ++++
> arch/mips/mach-ath79/include/mach/pbl_macros.h | 139 ++++++++++++++++++++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-ath79.c | 146 +++++++++++++++++++++
> 16 files changed, 582 insertions(+)
> create mode 100644 arch/mips/boards/black-swift/Makefile
> create mode 100644 arch/mips/boards/black-swift/board.c
> create mode 100644 arch/mips/boards/black-swift/include/board/board_pbl_start.h
> create mode 100644 arch/mips/configs/black-swift_defconfig
> create mode 100644 arch/mips/dts/black-swift.dts
> create mode 100644 arch/mips/mach-ath79/include/mach/pbl_macros.h
> create mode 100644 drivers/gpio/gpio-ath79.c
>
> --
> 2.5.0
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board
2015-09-23 4:53 ` [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board Sascha Hauer
@ 2015-09-23 6:11 ` Antony Pavlov
2015-09-23 8:32 ` Sascha Hauer
0 siblings, 1 reply; 14+ messages in thread
From: Antony Pavlov @ 2015-09-23 6:11 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On Wed, 23 Sep 2015 06:53:05 +0200
Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Antony,
>
> Since it's RFC, should I apply this series?
No. I have splitted this series to 'ath-79 gpio' and 'ath-79 pbl' series.
I have to test 'ath-79 pbl' series more carefully.
Please apply today's 'ath-79 gpio' series (I have posted 'ath-79 gpio' series
several hours ago).
Also please change both 'SPL' -> 'SBL' in this commit message from pengutronix/next branch:
commit f24cf07a7702f0f09b133ae5430dbf33610737d7
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Mon Sep 21 01:50:45 2015 +0300
MIPS: refactor SPL start.S code
This commit removes code duplication by using
MIPS PBL macros in the SPL start.S file.
> Sascha
>
> On Mon, Sep 21, 2015 at 02:23:43AM +0300, Antony Pavlov wrote:
> > This patchseries adds necessary AR9331 SoC low level initialization routines.
> > The patchseries makes it possible to use barebox as a first stage loader
> > on the Black Swift board and, I suppose, other widespread AR9331-based boards.
> >
> > The patchseries is heavily based on Oleksij Rempel's work on barebox for TP-Link MR3020.
> >
> > TODOs:
> >
> > * add TP-Link MR3020 support (see http://openocd.zylin.com/gitweb?p=openocd.git;a=commitdiff;h=f59d2d9ecfee8899df531b87b7acaa468725f238);
> > * clean up Black Swift GPIO code (pbl_reg_set (1 << 18), 0xb80600ac);
> > * check macros names linux kernel source compartibility;
> > * DT compatible string vendor "smartlx" appears un-documented.
> > The site http://www.smartlx.ru/ is suspended.
> >
> >
> > Changes since RFC v1:
> >
> > * add UART initialization routune for DEBUG_LL and NMON;
> > * add macros for GPIO_FUNCTION_1 register initialization;
> > * add ar71xx GPIO driver.
> >
> >
> > Antony Pavlov (9):
> > MIPS: ar933x: pbl: add pbl_ar9331_ddr2_config macro
> > MIPS: mach-ath79: add pbl_ar9331_uart_enable macro
> > MIPS: mach-ath79: add debug_ll_ar9331_init macro
> > MIPS: ath79: add black-swift board support
> > MIPS: add black-swift_defconfig
> > gpio: add ath79-gpio driver for Atheros MIPS SoCs
> > MIPS: ath79: use gpiolib
> > MIPS: dts: ar9331.dtsi: add gpio
> > WIP: MIPS: black-swift: use GPIO
> >
> > Oleksij Rempel (1):
> > MIPS: ar933x: pbl: add pbl_ar9331_pll macro
> >
> > arch/mips/Kconfig | 1 +
> > arch/mips/Makefile | 1 +
> > arch/mips/boards/black-swift/Makefile | 1 +
> > arch/mips/boards/black-swift/board.c | 27 ++++
> > .../black-swift/include/board/board_pbl_start.h | 41 ++++++
> > arch/mips/boot/start.S | 2 +
> > arch/mips/configs/black-swift_defconfig | 45 +++++++
> > arch/mips/dts/ar9331.dtsi | 10 ++
> > arch/mips/dts/black-swift.dts | 60 +++++++++
> > arch/mips/include/asm/pbl_macros.h | 32 +++++
> > arch/mips/mach-ath79/Kconfig | 6 +
> > arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 41 ++++++
> > arch/mips/mach-ath79/include/mach/debug_ll.h | 29 ++++
> > arch/mips/mach-ath79/include/mach/pbl_macros.h | 139 ++++++++++++++++++++
> > drivers/gpio/Makefile | 1 +
> > drivers/gpio/gpio-ath79.c | 146 +++++++++++++++++++++
> > 16 files changed, 582 insertions(+)
> > create mode 100644 arch/mips/boards/black-swift/Makefile
> > create mode 100644 arch/mips/boards/black-swift/board.c
> > create mode 100644 arch/mips/boards/black-swift/include/board/board_pbl_start.h
> > create mode 100644 arch/mips/configs/black-swift_defconfig
> > create mode 100644 arch/mips/dts/black-swift.dts
> > create mode 100644 arch/mips/mach-ath79/include/mach/pbl_macros.h
> > create mode 100644 drivers/gpio/gpio-ath79.c
> >
> > --
> > 2.5.0
> >
> >
> > _______________________________________________
> > barebox mailing list
> > barebox@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> >
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
--
--
Best regards,
Antony Pavlov
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [RFC v2 00/10] MIPS: barebox as a first stage loader on the Black Swift board
2015-09-23 6:11 ` Antony Pavlov
@ 2015-09-23 8:32 ` Sascha Hauer
0 siblings, 0 replies; 14+ messages in thread
From: Sascha Hauer @ 2015-09-23 8:32 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Wed, Sep 23, 2015 at 09:11:16AM +0300, Antony Pavlov wrote:
> On Wed, 23 Sep 2015 06:53:05 +0200
> Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
> > Antony,
> >
> > Since it's RFC, should I apply this series?
>
> No. I have splitted this series to 'ath-79 gpio' and 'ath-79 pbl' series.
> I have to test 'ath-79 pbl' series more carefully.
> Please apply today's 'ath-79 gpio' series (I have posted 'ath-79 gpio' series
> several hours ago).
Ok, applied.
>
> Also please change both 'SPL' -> 'SBL' in this commit message from pengutronix/next branch:
Did that.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 14+ messages in thread