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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	barebox@lists.infradead.org,
	Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Subject: [PATCH 15/17] mtd: nand_mrvl_nfc: Add support for NDCB3 register
Date: Fri,  9 Oct 2015 00:06:17 +0200	[thread overview]
Message-ID: <1444341979-19157-16-git-send-email-sebastian.hesselbarth@gmail.com> (raw)
In-Reply-To: <1444341979-19157-1-git-send-email-sebastian.hesselbarth@gmail.com>

Newer versions of PXA3xx NAND controller support a 4th Command Buffer
register. Add the required HWFLAGS and additional write to NDCB0.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Cc: barebox@lists.infradead.org
---
 drivers/mtd/nand/nand_mrvl_nfc.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c
index 16752c1aa4d5..8594cf688d0c 100644
--- a/drivers/mtd/nand/nand_mrvl_nfc.c
+++ b/drivers/mtd/nand/nand_mrvl_nfc.c
@@ -53,6 +53,7 @@
 #define NDCB0		(0x48) /* Command Buffer0 */
 #define NDCB1		(0x4C) /* Command Buffer1 */
 #define NDCB2		(0x50) /* Command Buffer2 */
+#define NDCB3		(0x54) /* Command Buffer3 */
 
 #define NDCR_SPARE_EN		(0x1 << 31)
 #define NDCR_ECC_EN		(0x1 << 30)
@@ -146,6 +147,7 @@ struct mrvl_nand_host {
 	void __iomem		*mmio_base;
 	unsigned int		hwflags;
 #define HWFLAGS_ECC_BCH		BIT(0)
+#define HWFLAGS_HAS_NDCB3	BIT(1)
 
 	unsigned int		buf_start;
 	unsigned int		buf_count;
@@ -458,12 +460,19 @@ static void mrvl_nand_start(struct mrvl_nand_host *host)
 		dev_err(host->dev, "Waiting for command request failed\n");
 	} else {
 		/*
-		 * Writing 12 bytes to NDBC0 sets NDBC0, NDBC1 and NDBC2 !
+		 * Command buffer registers NDCB{0-2,3}
+		 * must be loaded by writing directly either 12 or 16
+		 * bytes directly to NDCB0, four bytes at a time.
+		 *
+		 * Direct write access to NDCB1, NDCB2 and NDCB3 is ignored
+		 * but each NDCBx register can be read.
 		 */
 		nand_writel(host, NDSR, NDSR_WRCMDREQ);
 		nand_writel(host, NDCB0, host->ndcb0);
 		nand_writel(host, NDCB0, host->ndcb1);
 		nand_writel(host, NDCB0, host->ndcb2);
+		if (host->hwflags & HWFLAGS_HAS_NDCB3)
+			nand_writel(host, NDCB0, host->ndcb3);
 	}
 }
 
-- 
2.1.0


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  parent reply	other threads:[~2015-10-08 22:06 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-08 22:06 [PATCH 00/17] Armada 370/XP NAND driver Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 01/17] arm: pxa: Prepare for NAND clkdev lookup on PXA3xx Sebastian Hesselbarth
2015-10-09 19:11   ` Robert Jarzmik
2015-10-09 19:13     ` Robert Jarzmik
2015-10-10  8:34   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 02/17] mtd: nand_mrvl_nfc: Use common clock for core clock Sebastian Hesselbarth
2015-10-10  8:35   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 03/17] mtd: nand: Clarify Marvell Orion Kconfig prompt Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 04/17] arm: pxa: Remove pxa_get_nandclk() Sebastian Hesselbarth
2015-10-10  8:35   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 05/17] mtd: nand_mrvl_nfc: Remove keep_config Sebastian Hesselbarth
2015-10-09 19:16   ` Robert Jarzmik
2015-10-09 19:32     ` Sebastian Hesselbarth
2015-10-09 21:14       ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 06/17] mtd: nand_mrvl_nfc: Clear OOB data with 0xff instead of 0x00 Sebastian Hesselbarth
2015-10-10  8:38   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 07/17] mtd: nand_mrvl_nfc: Use Auto Read Status on program/erase Sebastian Hesselbarth
2015-10-10  8:44   ` Robert Jarzmik
2015-10-10  9:36     ` Sebastian Hesselbarth
2015-10-10  9:49       ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 08/17] mtd: nand_mrvl_nfc: Fix num-cs property parsing Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 09/17] mtd: nand_mrvl_nfc: Get ecc parameters from DT Sebastian Hesselbarth
2015-10-11 20:39   ` Robert Jarzmik
2015-10-12  6:28     ` Sascha Hauer
2015-10-12  7:32       ` Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 10/17] mtd: nand_mrvl_nfc: Prepare for different HW ECC strengths Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 11/17] mtd: nand_mrvl_nfc: Add hwflags to distinguish different HW versions Sebastian Hesselbarth
2015-10-12  6:33   ` Sascha Hauer
2015-10-08 22:06 ` [PATCH 12/17] mtd: nand_mrvl_nfc: Add support for 4bit BCH HW ECC Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 13/17] mtd: nand_mrvl_nfc: Add support for 8bit " Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 14/17] mtd: nand_mrvl_nfc: Add support for HW BCH ECC Sebastian Hesselbarth
2015-10-08 22:06 ` Sebastian Hesselbarth [this message]
2015-10-10  8:48   ` [PATCH 15/17] mtd: nand_mrvl_nfc: Add support for NDCB3 register Robert Jarzmik
2015-10-10 17:17     ` Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 16/17] mtd: nand_mrvl_nfc: Add support for Marvell Armada 370/XP Sebastian Hesselbarth
2015-10-10  8:48   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 17/17] mtd: nand_mrvl_nfc: Add optimized timings for Samsung K9K8G08U Sebastian Hesselbarth
2015-10-12 10:38 ` [PATCH 00/17] Armada 370/XP NAND driver Robert Jarzmik
2015-10-12 18:41   ` Sebastian Hesselbarth
2015-10-12 19:16     ` Robert Jarzmik
2015-10-12 19:59       ` Sebastian Hesselbarth
2015-10-13  9:35         ` Robert Jarzmik
2015-10-13  9:53           ` Sebastian Hesselbarth
2015-10-13 10:27             ` Sascha Hauer
2015-10-13 10:38               ` Robert Jarzmik
2015-10-13 10:54                 ` Sascha Hauer
2015-10-15 21:17                 ` Sebastian Hesselbarth
2015-10-16 18:40                   ` Robert Jarzmik
2015-10-16 19:32                     ` Sebastian Hesselbarth
2015-10-20 19:25                     ` Robert Jarzmik
2015-11-19 23:16                       ` Sebastian Hesselbarth
2015-11-20  7:18                         ` Robert Jarzmik
2015-10-12 17:55 ` [PATCH] of: mtd: Import of_get_nand_ecc_{step_size, strength} from Linux Sebastian Hesselbarth

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