From: Antony Pavlov <antonynpavlov@gmail.com>
To: barebox@lists.infradead.org
Cc: Oleksij Rempel <linux@rempel-privat.de>
Subject: [PATCH v2 1/9] MIPS: ath79: add pbl_ar9331_pll macro
Date: Tue, 3 Nov 2015 08:23:48 +0300 [thread overview]
Message-ID: <1446528236-30236-2-git-send-email-antonynpavlov@gmail.com> (raw)
In-Reply-To: <1446528236-30236-1-git-send-email-antonynpavlov@gmail.com>
From: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/include/asm/pbl_macros.h | 21 ++++++++++++
arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
arch/mips/mach-ath79/include/mach/pbl_macros.h | 43 +++++++++++++++++++++++++
3 files changed, 65 insertions(+)
diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index 1d9d6ab..db46d0d 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -28,6 +28,27 @@
#include <generated/compile.h>
#include <generated/utsrelease.h>
+ .macro pbl_reg_writel val addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \val
+ sw t8, 0(t9)
+ .set pop
+ .endm
+
+ .macro pbl_reg_clr clr addr
+ .set push
+ .set noreorder
+ li t9, \addr
+ li t8, \clr
+ lw t7, 0(t9)
+ not t8, t8
+ and t7, t8
+ sw t7, 0(t9)
+ .set pop
+ .endm
+
.macro pbl_sleep reg count
.set push
.set noreorder
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index b82a8c3..a1d7db0 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -63,6 +63,7 @@
#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f
#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23
#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7
+#define AR933X_PLL_CPU_CONFIG_PLLPWD BIT(30)
#define AR933X_PLL_CLOCK_CTRL_BYPASS BIT(2)
#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
new file mode 100644
index 0000000..1fc6eb5
--- /dev/null
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -0,0 +1,43 @@
+#ifndef __ASM_MACH_ATH79_PBL_MACROS_H
+#define __ASM_MACH_ATH79_PBL_MACROS_H
+
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <mach/ar71xx_regs.h>
+
+#define PLL_BASE (KSEG1 | AR71XX_PLL_BASE)
+#define PLL_CPU_CONFIG_REG (PLL_BASE | AR933X_PLL_CPU_CONFIG_REG)
+#define PLL_CPU_CONFIG2_REG (PLL_BASE | AR933X_PLL_CPU_CONFIG2_REG)
+#define PLL_CLOCK_CTRL_REG (PLL_BASE | AR933X_PLL_CLOCK_CTRL_REG)
+
+#define DEF_25MHZ_PLL_CLOCK_CTRL \
+ ((2 - 1) << AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT \
+ | (1 - 1) << AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT \
+ | (1 - 1) << AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT)
+#define DEF_25MHZ_SETTLE_TIME (34000 / 40)
+#define DEF_25MHZ_PLL_CONFIG ( 1 << AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT \
+ | 1 << AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT \
+ | 32 << AR933X_PLL_CPU_CONFIG_NINT_SHIFT)
+
+.macro pbl_ar9331_pll
+ .set push
+ .set noreorder
+
+ /* Most devices have 25 MHz Ref clock. */
+ pbl_reg_writel (DEF_25MHZ_PLL_CLOCK_CTRL | AR933X_PLL_CLOCK_CTRL_BYPASS), \
+ PLL_CLOCK_CTRL_REG
+ pbl_reg_writel DEF_25MHZ_SETTLE_TIME, PLL_CPU_CONFIG2_REG
+ pbl_reg_writel (DEF_25MHZ_PLL_CONFIG | AR933X_PLL_CPU_CONFIG_PLLPWD), \
+ PLL_CPU_CONFIG_REG
+
+ /* power on CPU PLL */
+ pbl_reg_clr AR933X_PLL_CPU_CONFIG_PLLPWD, PLL_CPU_CONFIG_REG
+ /* disable PLL bypass */
+ pbl_reg_clr AR933X_PLL_CLOCK_CTRL_BYPASS, PLL_CLOCK_CTRL_REG
+
+ pbl_sleep t2, 40
+
+ .set pop
+.endm
+
+#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
--
2.6.2
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next prev parent reply other threads:[~2015-11-03 5:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-03 5:23 [PATCH v2 0/9] MIPS: ath79: add ar9331 pbl support Antony Pavlov
2015-11-03 5:23 ` Antony Pavlov [this message]
2015-11-03 5:23 ` [PATCH v2 2/9] MIPS: ath79: add pbl_ar9331_ddr2_config macro Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 3/9] MIPS: ath79: add pbl_ar9331_uart_enable macro Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 4/9] MIPS: ath79: add debug_ll_ar9331_init macro Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 5/9] MIPS: ath79: add black-swift board support Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 6/9] MIPS: ath79: add black-swift_defconfig Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 7/9] MIPS: ath79: add pbl_ar9331_ddr1_config macro Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 8/9] MIPS: tplink-mr3020: add pbl low level init Antony Pavlov
2015-11-03 5:23 ` [PATCH v2 9/9] MIPS: tplink-mr3020_defconfig: enable pbl; make image shorter Antony Pavlov
2015-11-03 7:26 ` [PATCH v2 0/9] MIPS: ath79: add ar9331 pbl support Sascha Hauer
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