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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	barebox@lists.infradead.org
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Subject: [PATCH v2 16/19] mtd: nand_mrvl_nfc: Add support for HW BCH ECC
Date: Fri, 20 Nov 2015 20:36:09 +0100	[thread overview]
Message-ID: <1448048172-10080-17-git-send-email-sebastian.hesselbarth@gmail.com> (raw)
In-Reply-To: <1448048172-10080-1-git-send-email-sebastian.hesselbarth@gmail.com>

Add support for HW BCH ECC for those HW versions that support it.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
 drivers/mtd/nand/nand_mrvl_nfc.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c
index f43200dcf2c7..a5ac66195217 100644
--- a/drivers/mtd/nand/nand_mrvl_nfc.c
+++ b/drivers/mtd/nand/nand_mrvl_nfc.c
@@ -92,6 +92,8 @@
 #define NDSR_RDDREQ		(0x1 << 1)
 #define NDSR_WRCMDREQ		(0x1)
 
+#define NDECCCTRL_BCH_EN	BIT(0)
+
 #define NDCB0_LEN_OVRD		(0x1 << 28)
 #define NDCB0_ST_ROW_EN         (0x1 << 26)
 #define NDCB0_AUTO_RS		(0x1 << 25)
@@ -426,6 +428,17 @@ static void mrvl_nand_start(struct mrvl_nand_host *host)
 {
 	uint32_t ndcr;
 
+	if (host->hwflags & HWFLAGS_ECC_BCH) {
+		uint32_t reg = nand_readl(host, NDECCCTRL);
+
+		if (host->use_ecc && host->ecc_bch)
+			reg |= NDECCCTRL_BCH_EN;
+		else
+			reg &= ~NDECCCTRL_BCH_EN;
+
+		nand_writel(host, NDECCCTRL, reg);
+	}
+
 	ndcr = host->reg_ndcr;
 	if (host->use_ecc)
 		ndcr |= NDCR_ECC_EN;
@@ -794,8 +807,14 @@ static int mrvl_nand_read_page_hwecc(struct mtd_info *mtd,
 		else
 			ret = -EBADMSG;
 	}
-	if (ndsr & NDSR_CORERR)
+	if (ndsr & NDSR_CORERR) {
 		ret = 1;
+		if ((host->hwflags & HWFLAGS_ECC_BCH) && host->ecc_bch) {
+			ret = NDSR_ERR_CNT(ndsr);
+			ndsr &= ~(NDSR_ERR_CNT_MASK << NDSR_ERR_CNT_OFF);
+			nand_writel(host, NDSR, ndsr);
+		}
+	}
 	dev_dbg(host->dev, "%s(buf=%p, page=%d, oob_required=%d) => %d\n",
 		__func__, buf, page, oob_required, ret);
 	return ret;
@@ -1008,6 +1027,11 @@ static int mrvl_nand_scan(struct mtd_info *mtd)
 	ndcr |= NDCR_RD_ID_CNT(host->read_id_bytes);
 	host->reg_ndcr = ndcr;
 
+	/* Device detection must be done with BCH ECC disabled */
+	if (host->hwflags & HWFLAGS_ECC_BCH)
+		nand_writel(host, NDECCCTRL,
+			    nand_readl(host, NDECCCTRL) & ~NDECCCTRL_BCH_EN);
+
 	mrvl_nand_set_timing(host, true);
 	if (nand_scan_ident(mtd, 1, NULL)) {
 		host->reg_ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
-- 
2.1.4


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  parent reply	other threads:[~2015-11-20 19:36 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-20 19:35 [PATCH v2 00/19] Armada 370/XP NAND driver Sebastian Hesselbarth
2015-11-20 19:35 ` [PATCH v2 01/19] of: mtd: Import of_get_nand_ecc_{step_size, strength} from Linux Sebastian Hesselbarth
2015-11-20 19:35 ` [PATCH v2 02/19] mtd: nand: Clarify Marvell Orion Kconfig prompt Sebastian Hesselbarth
2015-11-20 19:35 ` [PATCH v2 03/19] arm: pxa: Prepare for NAND clkdev lookup on PXA3xx Sebastian Hesselbarth
2015-11-20 19:35 ` [PATCH v2 04/19] arm: pxa: Add clock for Zylonite NFC Sebastian Hesselbarth
2015-11-20 19:35 ` [PATCH v2 05/19] mtd: nand_mrvl_nfc: Use common clock for core clock Sebastian Hesselbarth
2015-11-20 19:35 ` [PATCH v2 06/19] arm: pxa: Remove pxa_get_nandclk() Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 07/19] mtd: nand_mrvl_nfc: Clear OOB data with 0xff instead of 0x00 Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 08/19] mtd: nand_mrvl_nfc: Use Auto Read Status on program/erase Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 09/19] mtd: nand_mrvl_nfc: Protect mrvl_nand_probe_dt Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 10/19] mtd: nand_mrvl_nfc: Fix num-cs property parsing Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 11/19] mtd: nand_mrvl_nfc: Get ecc parameters from DT Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 12/19] mtd: nand_mrvl_nfc: Prepare for different HW ECC strengths Sebastian Hesselbarth
2015-11-20 20:38   ` Trent Piepho
2015-11-23  7:18     ` Sascha Hauer
2015-11-20 19:36 ` [PATCH v2 13/19] mtd: nand_mrvl_nfc: Add hwflags to distinguish different HW versions Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 14/19] mtd: nand_mrvl_nfc: Add support for 4bit BCH HW ECC Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 15/19] mtd: nand_mrvl_nfc: Add support for 8bit " Sebastian Hesselbarth
2015-11-20 19:36 ` Sebastian Hesselbarth [this message]
2015-11-20 19:36 ` [PATCH v2 17/19] mtd: nand_mrvl_nfc: Add support for NDCB3 register Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 18/19] mtd: nand_mrvl_nfc: Add support for Marvell Armada 370/XP Sebastian Hesselbarth
2015-11-20 19:36 ` [PATCH v2 19/19] mtd: nand_mrvl_nfc: Add optimized timings for Samsung K9K8G08U Sebastian Hesselbarth
2015-11-23  7:19 ` [PATCH v2 00/19] Armada 370/XP NAND driver Sascha Hauer

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