[PATCH 0/7] AM335x related patches

[PATCH 0/7] AM335x related patches

[Teresa Remmet]

Different AM335x changes containing new RAM timings and
reducing image size of all am335x boards.

Patches have been tested on PHYTEC boards and beaglebone black.

Regards
Teresa

Arnd Beuscher (1):
  ARM: board: phytec-som-am335x: RAM timings for phyCORE-AM335x-R2

Jan Remmet (1):
  ARM: dts: am335x-phytec: eeprom name

Teresa Remmet (4):
  ARM: am335x_defconfig: Enable watchdog support
  ARM: boards: phytec-som-am335x: New RAM Timings for phyCORE-AM335x-R2
  ARM: dts: beaglebone: Strip clocks in MLO device tree
  ARM: AM335x: Make use of ARM_USE_COMPRESSED_DTB

Wadim Egorov (1):
  ARM: am335x_defconfig: Enable NANDTEST command

 arch/arm/boards/afi-gf/lowlevel.c               |  6 ++--
 arch/arm/boards/beaglebone/lowlevel.c           | 12 ++++----
 arch/arm/boards/phytec-som-am335x/lowlevel.c    | 10 ++++---
 arch/arm/boards/phytec-som-am335x/ram-timings.h | 40 +++++++++++++++++++++++++
 arch/arm/configs/am335x_defconfig               |  4 +++
 arch/arm/dts/am335x-bone-common.dts             |  1 +
 arch/arm/dts/am335x-phytec-phycard-som.dtsi     |  2 +-
 arch/arm/dts/am335x-phytec-phycore-som.dtsi     |  2 +-
 arch/arm/mach-omap/Kconfig                      |  1 +
 images/Makefile.am33xx                          | 12 ++++++++
 10 files changed, 75 insertions(+), 15 deletions(-)

-- 
1.9.1


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[PATCH 1/7] ARM: am335x_defconfig: Enable NANDTEST command

[Teresa Remmet]

From: Wadim Egorov <w.egorov@phytec.de>

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm/configs/am335x_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig
index 9563865..180e016 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -75,6 +75,7 @@ CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_NANDTEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
 CONFIG_CMD_USBGADGET=y
-- 
1.9.1


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[PATCH 2/7] ARM: am335x_defconfig: Enable watchdog support

[Teresa Remmet]

Enable wdt driver and command.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 arch/arm/configs/am335x_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig
index 180e016..7cf48b8 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -79,6 +79,7 @@ CONFIG_CMD_NANDTEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
 CONFIG_CMD_USBGADGET=y
+CONFIG_CMD_WD=y
 CONFIG_CMD_BAREBOX_UPDATE=y
 CONFIG_CMD_OF_NODE=y
 CONFIG_CMD_OF_PROPERTY=y
@@ -124,6 +125,8 @@ CONFIG_LED_GPIO=y
 CONFIG_LED_GPIO_OF=y
 CONFIG_LED_TRIGGERS=y
 CONFIG_EEPROM_AT24=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_OMAP=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
 CONFIG_PINCTRL_SINGLE=y
 CONFIG_BUS_OMAP_GPMC=y
-- 
1.9.1


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[PATCH 3/7] ARM: dts: am335x-phytec: eeprom name

[Teresa Remmet]

From: Jan Remmet <j.remmet@phytec.de>

use eeprom as name like in the kernel. This is needed if you use the
state framework.
phycard: also fix index, it has address 0x54

Signed-off-by: Jan Remmet <j.remmet@phytec.de>
---
 arch/arm/dts/am335x-phytec-phycard-som.dtsi | 2 +-
 arch/arm/dts/am335x-phytec-phycore-som.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/am335x-phytec-phycard-som.dtsi b/arch/arm/dts/am335x-phytec-phycard-som.dtsi
index c0b2456..d1dfa86 100644
--- a/arch/arm/dts/am335x-phytec-phycard-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycard-som.dtsi
@@ -92,7 +92,7 @@
 	status = "okay";
 	clock-frequency = <400000>;
 
-	eeprom: 24c32@52 {
+	eeprom: eeprom@54 {
 		status = "disabled";
 		compatible = "atmel,24c32";
 		pagesize = <32>;
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
index ba0589c..f3a1d4d 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -143,7 +143,7 @@
 	status = "okay";
 	clock-frequency = <400000>;
 
-	eeprom: 24c32@52 {
+	eeprom: eeprom@52 {
 		status = "disabled";
 		compatible = "atmel,24c32";
 		pagesize = <32>;
-- 
1.9.1


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[PATCH 4/7] ARM: board: phytec-som-am335x: RAM timings for phyCORE-AM335x-R2

[Teresa Remmet]

From: Arnd Beuscher <a.beuscher@phytec.de>

Add RAM Timings for new phyCORE-AM335x-R2 SoM with
512MB (MT41K256M16TW107IT).

Signed-off-by: Arnd Beuscher <a.beuscher@phytec.de>
Sigend-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 arch/arm/boards/phytec-som-am335x/lowlevel.c    |  1 +
 arch/arm/boards/phytec-som-am335x/ram-timings.h | 20 ++++++++++++++++++++
 images/Makefile.am33xx                          |  6 ++++++
 3 files changed, 27 insertions(+)

diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index d7afbb6..8af450e 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -123,6 +123,7 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_256mb, am335x_phytec_phycore_s
 PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J256M16HA15EIT_512MB);
 PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
 PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_IM8G16D3FBBG15EI_1024MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
 PHYTEC_ENTRY(start_am33xx_phytec_phycore_sdram, am335x_phytec_phycore_som);
 PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_sdram, am335x_phytec_phycore_som_no_spi);
 PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_eeprom_sdram, am335x_phytec_phycore_som_no_eeprom);
diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h
index 698b073..b89d561 100644
--- a/arch/arm/boards/phytec-som-am335x/ram-timings.h
+++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h
@@ -30,6 +30,7 @@ enum {
 	PHYCORE_MT41J256M16HA15EIT_512MB,
 	PHYCORE_MT41J512M8125IT_2x512MB,
 	PHYCORE_IM8G16D3FBBG15EI_1024MB,
+	PHYCORE_R2_MT41K256M16TW107IT_512MB,
 
 	PHYCARD_NT5CB128M16BP_256MB,
 };
@@ -192,6 +193,25 @@ struct am335x_sdram_timings physom_timings[] = {
 			.dll_lock_diff0         = 0x0,
 		},
 	},
+
+	/* 512MB R2 */
+	[PHYCORE_R2_MT41K256M16TW107IT_512MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAD4DB,
+			.emif_tim2		= 0x266B7FDA,
+			.emif_tim3		= 0x501F867F,
+			.sdram_config		= 0x61C05332,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x37,
+			.wr_dqs_slave_ratio0	= 0x38,
+			.fifo_we_slave_ratio0	= 0x92,
+			.wr_slave_ratio0	= 0x72,
+		},
+	},
 };
 
 #endif
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index 375ff90..eec6fc5 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -59,6 +59,12 @@ FILE_barebox-am33xx-phytec-phycore-mlo-512mb.spi.img = start_am33xx_phytec_phyco
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.spi.img
 
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_512mb
+FILE_barebox-am33xx-phytec-phycore-r2-mlo-512mb.img = start_am33xx_phytec_phycore_r2_sram_512mb.pblx.mlo
+FILE_barebox-am33xx-phytec-phycore-r2-mlo-512mb.spi.img = start_am33xx_phytec_phycore_r2_sram_512mb.pblx.mlospi
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-512mb.img
+am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-512mb.spi.img
+
 pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_2x512mb
 FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
 FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlospi
-- 
1.9.1


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[PATCH 5/7] ARM: boards: phytec-som-am335x: New RAM Timings for phyCORE-AM335x-R2

[Teresa Remmet]

Add RAM timings for phyCORE-AM335x-R2 256MB RAM.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 arch/arm/boards/phytec-som-am335x/lowlevel.c    |  1 +
 arch/arm/boards/phytec-som-am335x/ram-timings.h | 20 ++++++++++++++++++++
 images/Makefile.am33xx                          |  6 ++++++
 3 files changed, 27 insertions(+)

diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index 8af450e..4240f40 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -124,6 +124,7 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_s
 PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
 PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_IM8G16D3FBBG15EI_1024MB);
 PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB);
 PHYTEC_ENTRY(start_am33xx_phytec_phycore_sdram, am335x_phytec_phycore_som);
 PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_sdram, am335x_phytec_phycore_som_no_spi);
 PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_eeprom_sdram, am335x_phytec_phycore_som_no_eeprom);
diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h
index b89d561..884874c 100644
--- a/arch/arm/boards/phytec-som-am335x/ram-timings.h
+++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h
@@ -31,6 +31,7 @@ enum {
 	PHYCORE_MT41J512M8125IT_2x512MB,
 	PHYCORE_IM8G16D3FBBG15EI_1024MB,
 	PHYCORE_R2_MT41K256M16TW107IT_512MB,
+	PHYCORE_R2_MT41K128M16JT_256MB,
 
 	PHYCARD_NT5CB128M16BP_256MB,
 };
@@ -212,6 +213,25 @@ struct am335x_sdram_timings physom_timings[] = {
 			.wr_slave_ratio0	= 0x72,
 		},
 	},
+
+	/* 256MB R2 */
+	[PHYCORE_R2_MT41K128M16JT_256MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAD4DB,
+			.emif_tim2		= 0x26437FDA,
+			.emif_tim3		= 0x501F83FF,
+			.sdram_config		= 0x61C052B2,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x36,
+			.wr_dqs_slave_ratio0	= 0x38,
+			.fifo_we_slave_ratio0	= 0x99,
+			.wr_slave_ratio0	= 0x73,
+		},
+	},
 };
 
 #endif
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index eec6fc5..6c7e81a 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -47,6 +47,12 @@ FILE_barebox-am33xx-phytec-phycore-mlo-256mb.spi.img = start_am33xx_phytec_phyco
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.spi.img
 
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_256mb
+FILE_barebox-am33xx-phytec-phycore-r2-mlo-256mb.img = start_am33xx_phytec_phycore_r2_sram_256mb.pblx.mlo
+FILE_barebox-am33xx-phytec-phycore-r2-mlo-256mb.spi.img = start_am33xx_phytec_phycore_r2_sram_256mb.pblx.mlospi
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-256mb.img
+am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-256mb.spi.img
+
 pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_128mb
 FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
 FILE_barebox-am33xx-phytec-phycore-mlo-128mb.spi.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlospi
-- 
1.9.1


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[PATCH 6/7] ARM: dts: beaglebone: Strip clocks in MLO device tree

[Teresa Remmet]

Reduce even more size of beaglebone MLO device tree with stripping
the clocks.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 arch/arm/dts/am335x-bone-common.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/am335x-bone-common.dts b/arch/arm/dts/am335x-bone-common.dts
index 91745d3..0488cbe 100644
--- a/arch/arm/dts/am335x-bone-common.dts
+++ b/arch/arm/dts/am335x-bone-common.dts
@@ -9,6 +9,7 @@
 
 #include "am33xx.dtsi"
 #include "am33xx-strip.dtsi"
+#include "am33xx-clocks-strip.dtsi"
 #include "am335x-bone-common.dtsi"
 
 / {
-- 
1.9.1


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[PATCH 7/7] ARM: AM335x: Make use of ARM_USE_COMPRESSED_DTB

[Teresa Remmet]

Use ARM_USE_COMPRESSED_DTB for all AM335x based board,
to reduce the image size even more.

Saves about 9kB in MLO image and 20kB in barebox image.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 arch/arm/boards/afi-gf/lowlevel.c            |  6 +++---
 arch/arm/boards/beaglebone/lowlevel.c        | 12 ++++++------
 arch/arm/boards/phytec-som-am335x/lowlevel.c |  8 ++++----
 arch/arm/mach-omap/Kconfig                   |  1 +
 4 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c
index efe15ec..91b4b68 100644
--- a/arch/arm/boards/afi-gf/lowlevel.c
+++ b/arch/arm/boards/afi-gf/lowlevel.c
@@ -196,7 +196,7 @@ static const struct module_pin_mux board_can_pin_mux[] = {
 	{-1},
 };
 
-extern char __dtb_am335x_afi_gf_start[];
+extern char __dtb_z_am335x_afi_gf_start[];
 
 /**
  * @brief The basic entry point for board initialization.
@@ -211,7 +211,7 @@ static noinline int gf_sram_init(void)
 {
 	void *fdt;
 
-	fdt = __dtb_am335x_afi_gf_start;
+	fdt = __dtb_z_am335x_afi_gf_start;
 
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
@@ -258,7 +258,7 @@ ENTRY_FUNCTION(start_am33xx_afi_gf_sdram, r0, r1, r2)
 {
 	void *fdt;
 
-	fdt = __dtb_am335x_afi_gf_start - get_runtime_offset();
+	fdt = __dtb_z_am335x_afi_gf_start - get_runtime_offset();
 
 	putc_ll('>');
 
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
index 79d5985..100f64f 100644
--- a/arch/arm/boards/beaglebone/lowlevel.c
+++ b/arch/arm/boards/beaglebone/lowlevel.c
@@ -103,9 +103,9 @@ static const struct am33xx_emif_regs ddr3_regs = {
 	.sdram_ref_ctrl		= 0xC30,
 };
 
-extern char __dtb_am335x_boneblack_start[];
-extern char __dtb_am335x_bone_common_start[];
-extern char __dtb_am335x_bone_start[];
+extern char __dtb_z_am335x_boneblack_start[];
+extern char __dtb_z_am335x_bone_common_start[];
+extern char __dtb_z_am335x_bone_start[];
 
 /**
  * @brief The basic entry point for board initialization.
@@ -121,7 +121,7 @@ static noinline int beaglebone_sram_init(void)
 	uint32_t sdram_size;
 	void *fdt;
 
-	fdt = __dtb_am335x_bone_common_start;
+	fdt = __dtb_z_am335x_bone_common_start;
 
 	if (is_beaglebone_black())
 		sdram_size = SZ_512M;
@@ -176,10 +176,10 @@ ENTRY_FUNCTION(start_am33xx_beaglebone_sdram, r0, r1, r2)
 
 	if (is_beaglebone_black()) {
 		sdram_size = SZ_512M;
-		fdt = __dtb_am335x_boneblack_start;
+		fdt = __dtb_z_am335x_boneblack_start;
 	} else {
 		sdram_size = SZ_256M;
-		fdt = __dtb_am335x_bone_start;
+		fdt = __dtb_z_am335x_bone_start;
 	}
 
 	fdt -= get_runtime_offset();
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index 4240f40..73e75eb 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -102,8 +102,8 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void
 #define PHYTEC_ENTRY_MLO(name, fdt_name, sdram)			\
 	ENTRY_FUNCTION(name, bootinfo, r1, r2)			\
 	{							\
-		extern char __dtb_##fdt_name##_start[];		\
-		void *fdt =__dtb_##fdt_name##_start -		\
+		extern char __dtb_z_##fdt_name##_start[];		\
+		void *fdt = __dtb_z_##fdt_name##_start -		\
 			get_runtime_offset();			\
 		physom_board_entry(bootinfo, sdram, fdt);	\
 	}
@@ -111,8 +111,8 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void
 #define PHYTEC_ENTRY(name, fdt_name)				\
 	ENTRY_FUNCTION(name, r0, r1, r2)			\
 	{							\
-		extern char __dtb_##fdt_name##_start[];		\
-		void *fdt =__dtb_##fdt_name##_start -		\
+		extern char __dtb_z_##fdt_name##_start[];		\
+		void *fdt = __dtb_z_##fdt_name##_start -		\
 			get_runtime_offset();			\
 		am335x_barebox_entry(fdt);			\
 	}
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 5c68062..d7c863c 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -44,6 +44,7 @@ config ARCH_AM33XX
 	select GENERIC_GPIO
 	select OFTREE
 	select OMAP_CLOCK_SOURCE_DMTIMER
+	select ARM_USE_COMPRESSED_DTB
 	help
 	  Say Y here if you are using Texas Instrument's AM33xx based platform
 
-- 
1.9.1


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Re: [PATCH 0/7] AM335x related patches

[Sascha Hauer]

On Tue, Feb 16, 2016 at 11:44:55AM +0100, Teresa Remmet wrote:
> Different AM335x changes containing new RAM timings and
> reducing image size of all am335x boards.
> 
> Patches have been tested on PHYTEC boards and beaglebone black.
> 
> Regards
> Teresa
> 
> Arnd Beuscher (1):
>   ARM: board: phytec-som-am335x: RAM timings for phyCORE-AM335x-R2
> 
> Jan Remmet (1):
>   ARM: dts: am335x-phytec: eeprom name
> 
> Teresa Remmet (4):
>   ARM: am335x_defconfig: Enable watchdog support
>   ARM: boards: phytec-som-am335x: New RAM Timings for phyCORE-AM335x-R2
>   ARM: dts: beaglebone: Strip clocks in MLO device tree
>   ARM: AM335x: Make use of ARM_USE_COMPRESSED_DTB
> 
> Wadim Egorov (1):
>   ARM: am335x_defconfig: Enable NANDTEST command
> 
>  arch/arm/boards/afi-gf/lowlevel.c               |  6 ++--
>  arch/arm/boards/beaglebone/lowlevel.c           | 12 ++++----
>  arch/arm/boards/phytec-som-am335x/lowlevel.c    | 10 ++++---
>  arch/arm/boards/phytec-som-am335x/ram-timings.h | 40 +++++++++++++++++++++++++
>  arch/arm/configs/am335x_defconfig               |  4 +++
>  arch/arm/dts/am335x-bone-common.dts             |  1 +
>  arch/arm/dts/am335x-phytec-phycard-som.dtsi     |  2 +-
>  arch/arm/dts/am335x-phytec-phycore-som.dtsi     |  2 +-
>  arch/arm/mach-omap/Kconfig                      |  1 +
>  images/Makefile.am33xx                          | 12 ++++++++
>  10 files changed, 75 insertions(+), 15 deletions(-)

Applied, thanks

Sascha


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