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From: Alexander Kurz <akurz@blala.de>
To: barebox@lists.infradead.org, eric@eukrea.com
Cc: Alexander Kurz <akurz@blala.de>
Subject: [PATCH 1/2] eukrea-cpuimx35: Fix wrong clock gating for ESDHC1
Date: Thu, 30 Jun 2016 23:24:13 +0200	[thread overview]
Message-ID: <1467321854-15090-1-git-send-email-akurz@blala.de> (raw)

With commit 962d8b89d2ce ("imx35-regs: add defines for USB and SD") the
shifter argument for the iMX35 ESDHC1 CGR instance has been erroneously
assigned to CGR1 instead of CGR0. Fix this for the eukrea-cpuimx35 board.

Signed-off-by: Alexander Kurz <akurz@blala.de>
---
 arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c | 6 ++++--
 arch/arm/mach-imx/include/mach/imx35-regs.h       | 2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index 9c4ea13..8b5514b 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -232,10 +232,12 @@ static int eukrea_cpuimx35_core_init(void)
 {
 	u32 reg;
 
-	/* enable clock for I2C1, SDHC1, USB and FEC */
+	/* enable clock for I2C1, ESDHC1, USB and FEC */
+	reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR0);
+	reg |= 0x3 << MX35_CCM_CGR0_ESDHC1_SHIFT;
+	reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR0);
 	reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1);
 	reg |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT;
-	reg |= 0x3 << MX35_CCM_CGR1_SDHC1_SHIFT;
 	reg |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT,
 	reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1);
 	reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR2);
diff --git a/arch/arm/mach-imx/include/mach/imx35-regs.h b/arch/arm/mach-imx/include/mach/imx35-regs.h
index 52e209b..6905400 100644
--- a/arch/arm/mach-imx/include/mach/imx35-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx35-regs.h
@@ -150,9 +150,9 @@
 #define MX35_CCM_CGR3	0x38
 
 #define MX35_CCM_CGR0_CSPI1_SHIFT	10
+#define MX35_CCM_CGR0_ESDHC1_SHIFT	26
 #define MX35_CCM_CGR1_FEC_SHIFT	0
 #define MX35_CCM_CGR1_I2C1_SHIFT	10
-#define MX35_CCM_CGR1_SDHC1_SHIFT	26
 #define MX35_CCM_CGR2_UART2_SHIFT	18
 #define MX35_CCM_CGR2_USB_SHIFT	22
 
-- 
2.1.4


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             reply	other threads:[~2016-06-30 21:26 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-30 21:24 Alexander Kurz [this message]
2016-06-30 21:24 ` [PATCH 2/2] imx35-regs: add and use common CGR element shifters Alexander Kurz
2016-07-04  9:48   ` Sascha Hauer
2016-07-04  7:33 ` [PATCH 1/2] eukrea-cpuimx35: Fix wrong clock gating for ESDHC1 Sascha Hauer

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