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* [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D
@ 2016-09-14  7:56 Uwe Kleine-König
  2016-09-14  9:51 ` Lucas Stach
  0 siblings, 1 reply; 5+ messages in thread
From: Uwe Kleine-König @ 2016-09-14  7:56 UTC (permalink / raw)
  To: barebox

The check for is_imx6q was introduced initially in

	f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")

to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since

	a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")

the PFD handling is only done for i.MX6DQ.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ba8fb8964ac8..4391839a0b7e 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
 		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
 		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
-		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
@@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
 		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
 		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
-		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
-- 
2.8.1


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^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D
  2016-09-14  7:56 [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D Uwe Kleine-König
@ 2016-09-14  9:51 ` Lucas Stach
  2016-09-14 10:17   ` [PATCH v2] " Uwe Kleine-König
  2016-09-14 11:05   ` [PATCH] " Lucas Stach
  0 siblings, 2 replies; 5+ messages in thread
From: Lucas Stach @ 2016-09-14  9:51 UTC (permalink / raw)
  To: Uwe Kleine-König; +Cc: barebox

Am Mittwoch, den 14.09.2016, 09:56 +0200 schrieb Uwe Kleine-König:
> The check for is_imx6q was introduced initially in
> 
> 	f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
> 
> to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
> handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
> ignored here since since
> 
> 	a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
> 
> the PFD handling is only done for i.MX6DQ.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>  arch/arm/mach-imx/imx6.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index ba8fb8964ac8..4391839a0b7e 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)

The comment right above this code block isn't reflecting reality anymore
after this change. Please fix it up.

Regards,
Lucas

>  		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
>  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
>  		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> -		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> +		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
>  		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
>  		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
>  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
> @@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
>  		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
>  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
>  		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> -		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> +		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
>  		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
>  		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
>  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);



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^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH v2] ARM: imx6: reset PLL2's PFD2 on i.MX6D
  2016-09-14  9:51 ` Lucas Stach
@ 2016-09-14 10:17   ` Uwe Kleine-König
  2016-09-15  8:01     ` Sascha Hauer
  2016-09-14 11:05   ` [PATCH] " Lucas Stach
  1 sibling, 1 reply; 5+ messages in thread
From: Uwe Kleine-König @ 2016-09-14 10:17 UTC (permalink / raw)
  To: barebox

The check for is_imx6q was introduced initially in

	f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")

to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since

	a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")

the PFD handling is only done for i.MX6DQ.

Update the comment to be not only logically correct but also helpful.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ba8fb8964ac8..18509a7b51db 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -65,10 +65,10 @@ void imx6_init_lowlevel(void)
 	writel(0xffffffff, 0x020c407c);
 	writel(0xffffffff, 0x020c4080);
 
-	/* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
-	 * to make sure PFD is working right, otherwise, PFDs may
-	 * not output clock after reset, MX6DL and MX6SL have added 396M pfd
-	 * workaround in ROM code, as bus clock need it
+	/*
+	 * Due to a hardware bug (related to errata ERR006282) on i.MX6DQ we
+	 * need to gate/ungate all PFDs to make sure PFD is working right,
+	 * otherwise PFDs may not output clock after reset.
 	 */
 	if (is_imx6q || is_imx6d) {
 		writel(BM_ANADIG_PFD_480_PFD3_CLKGATE |
@@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
 		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
 		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
-		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
@@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
 		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
 		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
-		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
 		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
 		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
-- 
2.8.1


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^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D
  2016-09-14  9:51 ` Lucas Stach
  2016-09-14 10:17   ` [PATCH v2] " Uwe Kleine-König
@ 2016-09-14 11:05   ` Lucas Stach
  1 sibling, 0 replies; 5+ messages in thread
From: Lucas Stach @ 2016-09-14 11:05 UTC (permalink / raw)
  To: Uwe Kleine-König; +Cc: barebox

Am Mittwoch, den 14.09.2016, 11:51 +0200 schrieb Lucas Stach:
> Am Mittwoch, den 14.09.2016, 09:56 +0200 schrieb Uwe Kleine-König:
> > The check for is_imx6q was introduced initially in
> > 
> > 	f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
> > 
> > to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
> > handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
> > ignored here since since
> > 
> > 	a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
> > 
> > the PFD handling is only done for i.MX6DQ.
> > 
> > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > ---
> >  arch/arm/mach-imx/imx6.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> > index ba8fb8964ac8..4391839a0b7e 100644
> > --- a/arch/arm/mach-imx/imx6.c
> > +++ b/arch/arm/mach-imx/imx6.c
> > @@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
> 
> The comment right above this code block isn't reflecting reality anymore
> after this change. Please fix it up.

FTR: Please, disregard my comment. It's wrong and this patch is just
fine.
> 
> >  		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
> >  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
> >  		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> > -		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> > +		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
> >  		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
> >  		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
> >  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
> > @@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
> >  		       BM_ANADIG_PFD_480_PFD0_CLKGATE,
> >  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
> >  		writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
> > -		       (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
> > +		       BM_ANADIG_PFD_528_PFD2_CLKGATE |
> >  		       BM_ANADIG_PFD_528_PFD1_CLKGATE |
> >  		       BM_ANADIG_PFD_528_PFD0_CLKGATE,
> >  		       MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
> 
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox



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^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH v2] ARM: imx6: reset PLL2's PFD2 on i.MX6D
  2016-09-14 10:17   ` [PATCH v2] " Uwe Kleine-König
@ 2016-09-15  8:01     ` Sascha Hauer
  0 siblings, 0 replies; 5+ messages in thread
From: Sascha Hauer @ 2016-09-15  8:01 UTC (permalink / raw)
  To: Uwe Kleine-König; +Cc: barebox

On Wed, Sep 14, 2016 at 12:17:05PM +0200, Uwe Kleine-König wrote:
> The check for is_imx6q was introduced initially in
> 
> 	f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
> 
> to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
> handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
> ignored here since since
> 
> 	a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
> 
> the PFD handling is only done for i.MX6DQ.
> 
> Update the comment to be not only logically correct but also helpful.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Applied, thanks

Sascha

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^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-09-15  8:01 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-14  7:56 [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D Uwe Kleine-König
2016-09-14  9:51 ` Lucas Stach
2016-09-14 10:17   ` [PATCH v2] " Uwe Kleine-König
2016-09-15  8:01     ` Sascha Hauer
2016-09-14 11:05   ` [PATCH] " Lucas Stach

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