* [PATCH 2/3] ARM: i.MX6: fix clock gating
2016-09-20 8:17 [PATCH 1/3] ARM: i.MX6: remove duplicate clock initialization Jan Luebbe
@ 2016-09-20 8:17 ` Jan Luebbe
2016-09-20 8:17 ` [PATCH 3/3] ARM: i.MX6: gate PCIe when unused Jan Luebbe
2016-09-21 8:12 ` [PATCH 1/3] ARM: i.MX6: remove duplicate clock initialization Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Jan Luebbe @ 2016-09-20 8:17 UTC (permalink / raw)
To: barebox
Since ce6755ca1c41b8dd3b40cf3c9d6f3a1237a92720, both IPU and OpenVG are
enabled if CONFIG_DRIVER_VIDEO_IMX_IPUV3 is true, but in the other case,
only OpenVG was disabled.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
---
arch/arm/mach-imx/clk-imx6.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
index a634580c86d5..26dfd1a7e16b 100644
--- a/arch/arm/mach-imx/clk-imx6.c
+++ b/arch/arm/mach-imx/clk-imx6.c
@@ -495,9 +495,9 @@ static int imx6_ccm_probe(struct device_d *dev)
writel(0xf0ffffff, ccm_base + CCGR1); /* gate GPU3D, GPU2D */
writel(0xffffffff, ccm_base + CCGR2);
if (IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX_IPUV3))
- writel(0xffffffff, ccm_base + CCGR3); /* gate OpenVG */
+ writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG */
else
- writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
+ writel(0x3fff0000, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
writel(0xffffffff, ccm_base + CCGR4);
writel(0xffffffff, ccm_base + CCGR5);
writel(0xffff3fff, ccm_base + CCGR6); /* gate VPU */
--
2.1.4
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 3/3] ARM: i.MX6: gate PCIe when unused
2016-09-20 8:17 [PATCH 1/3] ARM: i.MX6: remove duplicate clock initialization Jan Luebbe
2016-09-20 8:17 ` [PATCH 2/3] ARM: i.MX6: fix clock gating Jan Luebbe
@ 2016-09-20 8:17 ` Jan Luebbe
2016-09-21 8:12 ` [PATCH 1/3] ARM: i.MX6: remove duplicate clock initialization Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Jan Luebbe @ 2016-09-20 8:17 UTC (permalink / raw)
To: barebox
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
---
arch/arm/mach-imx/clk-imx6.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
index 26dfd1a7e16b..8ac43bebb075 100644
--- a/arch/arm/mach-imx/clk-imx6.c
+++ b/arch/arm/mach-imx/clk-imx6.c
@@ -498,7 +498,10 @@ static int imx6_ccm_probe(struct device_d *dev)
writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG */
else
writel(0x3fff0000, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
- writel(0xffffffff, ccm_base + CCGR4);
+ if (IS_ENABLED(CONFIG_PCI_IMX6))
+ writel(0xffffffff, ccm_base + CCGR4);
+ else
+ writel(0xfffffffc, ccm_base + CCGR4); /* gate PCIe */
writel(0xffffffff, ccm_base + CCGR5);
writel(0xffff3fff, ccm_base + CCGR6); /* gate VPU */
writel(0xffffffff, ccm_base + CCGR7);
--
2.1.4
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* Re: [PATCH 1/3] ARM: i.MX6: remove duplicate clock initialization
2016-09-20 8:17 [PATCH 1/3] ARM: i.MX6: remove duplicate clock initialization Jan Luebbe
2016-09-20 8:17 ` [PATCH 2/3] ARM: i.MX6: fix clock gating Jan Luebbe
2016-09-20 8:17 ` [PATCH 3/3] ARM: i.MX6: gate PCIe when unused Jan Luebbe
@ 2016-09-21 8:12 ` Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2016-09-21 8:12 UTC (permalink / raw)
To: Jan Luebbe; +Cc: barebox
On Tue, Sep 20, 2016 at 10:17:40AM +0200, Jan Luebbe wrote:
> These registers are already set by imx6_ccm_probe (in clk-imx6.c) during
> core_initcall, while imx6_init_lowlevel is only called during
> postcore_initcall via imx_init in imx.c.
>
> Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
> ---
> arch/arm/mach-imx/imx6.c | 9 ---------
> 1 file changed, 9 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index ba8fb8964ac8..dfd9a70200ec 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -56,15 +56,6 @@ void imx6_init_lowlevel(void)
> writel(0, aips2 + 0x4c);
> writel(0, aips2 + 0x50);
>
> - /* enable all clocks */
> - writel(0xffffffff, 0x020c4068);
> - writel(0xffffffff, 0x020c406c);
> - writel(0xffffffff, 0x020c4070);
> - writel(0xffffffff, 0x020c4074);
> - writel(0xffffffff, 0x020c4078);
> - writel(0xffffffff, 0x020c407c);
> - writel(0xffffffff, 0x020c4080);
> -
> /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
> * to make sure PFD is working right, otherwise, PFDs may
> * not output clock after reset, MX6DL and MX6SL have added 396M pfd
> --
> 2.1.4
>
>
> _______________________________________________
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>
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