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From: Daniel Schultz <d.schultz@phytec.de>
To: barebox@lists.infradead.org
Subject: [PATCH] mtd: nand: omap: Fix BCH bit correction
Date: Tue, 6 Jun 2017 18:10:25 +0200	[thread overview]
Message-ID: <1496765425-9702-1-git-send-email-d.schultz@phytec.de> (raw)

After commit dec7b4d2bf9 was applied our barebox only corrected the
first 512 Bytes of NAND pages.

This patch separates between Hamming and BCH when finding out the
eccsteps, because BCH always works with 2kB pages.

Before this patch:

barebox@Phytec phyCORE AM335x:/ nand_bitflip -r -n 5 /dev/nand0.barebox
nand0.barebox: Flipping bit 5 @ 1796
nand0.barebox: Flipping bit 6 @ 1258
nand0.barebox: Flipping bit 5 @ 1062
nand0.barebox: Flipping bit 2 @ 1399
nand0.barebox: Flipping bit 6 @ 1243
No bitflips found on block 0, offset 0x00000000
barebox@Phytec phyCORE AM335x:/ nand_bitflip -r -n 5 /dev/nand0.barebox
nand0.barebox: Flipping bit 2 @ 872
nand0.barebox: Flipping bit 4 @ 252
nand0.barebox: Flipping bit 3 @ 568
nand0.barebox: Flipping bit 2 @ 247
nand0.barebox: Flipping bit 5 @ 401
page at block 0, offset 0x00000000 has 3 bitflips

After this patch:

barebox@Phytec phyCORE AM335x:/ nand_bitflip -r -n 5 /dev/nand0.barebox
nand0.barebox: Flipping bit 2 @ 1962
nand0.barebox: Flipping bit 0 @ 1563
nand0.barebox: Flipping bit 0 @ 1808
nand0.barebox: Flipping bit 6 @ 1460
nand0.barebox: Flipping bit 7 @ 2034
page at block 0, offset 0x00000000 has 5 bitflips
barebox@Phytec phyCORE AM335x:/ nand_bitflip -r -n 5 /dev/nand0.barebox
nand0.barebox: Flipping bit 1 @ 1352
nand0.barebox: Flipping bit 7 @ 1542
nand0.barebox: Flipping bit 2 @ 1021
nand0.barebox: Flipping bit 7 @ 691
nand0.barebox: Flipping bit 6 @ 1196
page at block 0, offset 0x00000000 has 10 bitflips, needs cleanup

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
 drivers/mtd/nand/nand_omap_gpmc.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index 05c8486..61220da 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -302,10 +302,17 @@ static int omap_correct_bch(struct mtd_info *mtd, uint8_t *dat,
 	unsigned int err_loc[8];
 	int bitflip_count;
 	int bch_max_err;
+	int eccsteps;
 
-	int eccsteps = (nand->ecc.mode == NAND_ECC_HW) &&
-			(nand->ecc.size == 2048) ? 4 : 1;
 	int eccsize = oinfo->nand.ecc.bytes;
+	if (oinfo->ecc_mode == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)
+		if ((nand->ecc.mode == NAND_ECC_HW) &&
+				(nand->ecc.size == 2048))
+			eccsteps = 4;
+		else
+			eccsteps = 1;
+	else
+		eccsteps = oinfo->nand.ecc.steps;
 
 	switch (oinfo->ecc_mode) {
 	case OMAP_ECC_BCH8_CODE_HW:
-- 
1.9.1


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             reply	other threads:[~2017-06-06 16:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-06 16:10 Daniel Schultz [this message]
2017-06-07  6:45 ` Sascha Hauer
2017-06-07  6:49   ` Sascha Hauer
2017-06-07  6:53     ` Sascha Hauer
2017-06-09  8:17       ` Daniel Schultz
2017-06-09  9:08         ` Sascha Hauer
2017-06-09 13:28           ` Daniel Schultz
2017-06-12 13:41             ` Sascha Hauer
2017-06-13 11:50               ` Daniel Schultz

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