* [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO
@ 2017-11-03 10:48 Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 2/7] ARM: dts: AM335x: Add state framework Daniel Schultz
` (6 more replies)
0 siblings, 7 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
PCM-060 modules only have one-bank RAMs populated, which allows us to
find out the populated RAM size at run-time.
Therefore, a new entry point was create 'PHYTEC_ENTRY_UNIFIED_MLO'. This
creates a MLO for all modules of one family and all existing PCM-060
MLOs were replaced with this new entry point. To provide backward
compatibility for older modules, these were not affected.
In the first step generic RAM timings for the module family get loaded,
because RAM accesses are only possible with an initialized controller.
After that, the RAM size will be calculated and the RAM controller gets
reinitialized with the correct RAM timings.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/boards/phytec-som-am335x/lowlevel.c | 150 +++++++++++++++++++++++----
images/Makefile.am33xx | 24 ++---
2 files changed, 138 insertions(+), 36 deletions(-)
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index 77f436f..b1576ee 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -46,6 +46,94 @@ static const struct am33xx_cmd_control physom_cmd = {
.invert_clkout2 = 0x0,
};
+/* Module family for the unified MLO
+ *
+ * NONE: Unified MLO is not supported
+ * PHYCORE_R2: Unified MLO for PCM-060, PCM-062
+ */
+enum {
+ NONE,
+ PHYCORE_R2,
+};
+
+/* @brief Supplies default ram timings for all ram sizes
+ *
+ * Returns generic ram timings for module families to find the correct
+ * ram size.
+ *
+ * @return struct am335x_sdram_timings* or NULL
+ */
+
+static noinline struct am335x_sdram_timings* get_minimal_timings(
+ int module_family)
+{
+ struct am335x_sdram_timings *timing;
+
+ switch (module_family) {
+ case PHYCORE_R2:
+ timing = &physom_timings[PHYCORE_R2_MT41K512M16HA125IT_1024MB];
+ break;
+ default:
+ timing = NULL;
+ }
+
+ return timing;
+}
+
+/* @brief Converts ramsizes to ram timings for phyCORE-R2 modules
+ *
+ * Returns ram timings for a given ram size or NULL, if this size is
+ * not supported.
+ *
+ * @return struct am335x_sdram_timings* or NULL
+ */
+
+static noinline struct am335x_sdram_timings* convert_phycore_r2_timings(
+ u32 ramsize)
+{
+ struct am335x_sdram_timings *timing;
+
+ switch (ramsize) {
+ case SZ_256M:
+ timing = &physom_timings[PHYCORE_R2_MT41K128M16JT_256MB];
+ break;
+ case SZ_512M:
+ timing = &physom_timings[PHYCORE_R2_MT41K256M16TW107IT_512MB];
+ break;
+ case SZ_1G:
+ timing = &physom_timings[PHYCORE_R2_MT41K512M16HA125IT_1024MB];
+ break;
+ default:
+ timing = NULL;
+ }
+
+ return timing;
+}
+
+/* @brief Converts a module family and ram size to ram timings
+ *
+ * Returns ram timings for a given ram size and module family or NULL,
+ * if the ram size or module family is not supported.
+ *
+ * @return struct am335x_sdram_timings* or NULL
+ */
+
+static noinline struct am335x_sdram_timings* get_timings_by_size(
+ int module_family, u32 ramsize)
+{
+ struct am335x_sdram_timings *timing;
+
+ switch (module_family) {
+ case PHYCORE_R2:
+ timing = convert_phycore_r2_timings(ramsize);
+ break;
+ default:
+ timing = NULL;
+ }
+
+ return timing;
+}
+
/**
* @brief The basic entry point for board initialization.
*
@@ -55,9 +143,10 @@ static const struct am33xx_cmd_control physom_cmd = {
*
* @return void
*/
-static noinline void physom_board_init(int sdram, void *fdt)
+static noinline void physom_board_init(void *fdt, int sdram, int module_family)
{
- struct am335x_sdram_timings *timing = &physom_timings[sdram];
+ struct am335x_sdram_timings *timing = NULL;
+ u32 ramsize;
/*
* WDT1 is already running when the bootloader gets control
@@ -71,6 +160,24 @@ static noinline void physom_board_init(int sdram, void *fdt)
am33xx_pll_init(MPUPLL_M_600, DDRPLL_M_400);
+ if (module_family == NONE) {
+ timing = &physom_timings[sdram];
+ } else {
+ /* Load generic DDR3 ram timings to find the ram size */
+ timing = get_minimal_timings(module_family);
+ if (!timing)
+ hang();
+ am335x_sdram_init(DDR_IOCTRL, &physom_cmd,
+ &timing->regs,
+ &timing->data);
+
+ /* Find the ram size and set up the correct ram timings */
+ ramsize = get_ram_size((long *) 0x80000000, SZ_1G);
+ timing = get_timings_by_size(module_family, ramsize);
+ if (!timing)
+ hang();
+ }
+
am335x_sdram_init(DDR_IOCTRL, &physom_cmd,
&timing->regs,
&timing->data);
@@ -83,7 +190,8 @@ static noinline void physom_board_init(int sdram, void *fdt)
am335x_barebox_entry(fdt);
}
-static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void *fdt)
+static noinline void physom_board_entry(unsigned long bootinfo, int sdram,
+ void *fdt, int module_family)
{
am33xx_save_bootinfo((void *)bootinfo);
@@ -95,26 +203,34 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void
*/
relocate_to_current_adr();
setup_c();
-
- physom_board_init(sdram, fdt);
+ physom_board_init(fdt, sdram, module_family);
}
-#define PHYTEC_ENTRY_MLO(name, fdt_name, sdram) \
- ENTRY_FUNCTION(name, bootinfo, r1, r2) \
- { \
+#define PHYTEC_ENTRY_UNIFIED_MLO(name, fdt_name, module_family) \
+ ENTRY_FUNCTION(name, bootinfo, r1, r2) \
+ { \
+ extern char __dtb_z_##fdt_name##_start[]; \
+ void *fdt = __dtb_z_##fdt_name##_start - \
+ get_runtime_offset(); \
+ physom_board_entry(bootinfo, 0, fdt, module_family); \
+ }
+
+#define PHYTEC_ENTRY_MLO(name, fdt_name, sdram) \
+ ENTRY_FUNCTION(name, bootinfo, r1, r2) \
+ { \
extern char __dtb_z_##fdt_name##_start[]; \
void *fdt = __dtb_z_##fdt_name##_start - \
- get_runtime_offset(); \
- physom_board_entry(bootinfo, sdram, fdt); \
+ get_runtime_offset(); \
+ physom_board_entry(bootinfo, sdram, fdt, NONE); \
}
-#define PHYTEC_ENTRY(name, fdt_name) \
- ENTRY_FUNCTION(name, r0, r1, r2) \
- { \
+#define PHYTEC_ENTRY(name, fdt_name) \
+ ENTRY_FUNCTION(name, r0, r1, r2) \
+ { \
extern char __dtb_z_##fdt_name##_start[]; \
void *fdt = __dtb_z_##fdt_name##_start - \
- get_runtime_offset(); \
- am335x_barebox_entry(fdt); \
+ get_runtime_offset(); \
+ am335x_barebox_entry(fdt); \
}
/* phycore-som */
@@ -122,9 +238,7 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_128mb, am335x_phytec_phycore_s
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J128M16125IT_256MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J256M16HA15EIT_512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
-PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
-PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB);
-PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K512M16HA125IT_1024MB);
+PHYTEC_ENTRY_UNIFIED_MLO(start_am33xx_phytec_phycore_r2_sram, am335x_phytec_phycore_som_mlo, PHYCORE_R2);
PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_sdram, am335x_phytec_phycore_som_nand);
PHYTEC_ENTRY(start_am33xx_phytec_phycore_emmc_sdram, am335x_phytec_phycore_som_emmc);
PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_spi_sdram, am335x_phytec_phycore_som_nand_no_spi);
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index e86d4e9..3f29143 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -45,18 +45,18 @@ pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi
FILE_barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram.pblx
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img
+pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram
+FILE_barebox-am33xx-phytec-phycore-r2-mlo.img = start_am33xx_phytec_phycore_r2_sram.pblx.mlo
+FILE_barebox-am33xx-phytec-phycore-r2-mlo.spi.img = start_am33xx_phytec_phycore_r2_sram.pblx.mlospi
+am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo.img
+am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo.spi.img
+
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_256mb
FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlo
FILE_barebox-am33xx-phytec-phycore-mlo-256mb.spi.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlospi
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.img
am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.spi.img
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_256mb
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-256mb.img = start_am33xx_phytec_phycore_r2_sram_256mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-256mb.spi.img = start_am33xx_phytec_phycore_r2_sram_256mb.pblx.mlospi
-am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-256mb.img
-am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-256mb.spi.img
-
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_128mb
FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
FILE_barebox-am33xx-phytec-phycore-mlo-128mb.spi.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlospi
@@ -69,24 +69,12 @@ FILE_barebox-am33xx-phytec-phycore-mlo-512mb.spi.img = start_am33xx_phytec_phyco
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.img
am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.spi.img
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_512mb
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-512mb.img = start_am33xx_phytec_phycore_r2_sram_512mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-512mb.spi.img = start_am33xx_phytec_phycore_r2_sram_512mb.pblx.mlospi
-am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-512mb.img
-am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-512mb.spi.img
-
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_2x512mb
FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlospi
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.img
am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_1024mb
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlospi
-am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img
-am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img
-
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sdram
FILE_barebox-am33xx-phytec-phyflex.img = start_am33xx_phytec_phyflex_sdram.pblx
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex.img
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 2/7] ARM: dts: AM335x: Add state framework
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
@ 2017-11-03 10:48 ` Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 3/7] ARM: configs: am335x_defconfig: Add state config Daniel Schultz
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
This patch adds the state framework with an EEPROM partition and two
nodes for MAC addresses. It will be available for all phycore AM335x
images with EEPROMs.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/dts/am335x-phytec-phycore-som-emmc.dts | 1 +
.../dts/am335x-phytec-phycore-som-nand-no-spi.dts | 1 +
arch/arm/dts/am335x-phytec-phycore-som-nand.dts | 1 +
arch/arm/dts/am335x-phytec-state.dtsi | 52 ++++++++++++++++++++++
4 files changed, 55 insertions(+)
create mode 100644 arch/arm/dts/am335x-phytec-state.dtsi
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts b/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts
index 880700e..f264498 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-emmc.dts
@@ -16,6 +16,7 @@
#include "am33xx.dtsi"
#include "am335x-phytec-phycore-som.dtsi"
+#include "am335x-phytec-state.dtsi"
/ {
model = "Phytec phyCORE EMMC AM335x";
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts
index 2c2fab0..b35294c 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts
@@ -9,6 +9,7 @@
#include "am33xx.dtsi"
#include "am335x-phytec-phycore-som.dtsi"
+#include "am335x-phytec-state.dtsi"
/ {
model = "Phytec phyCORE AM335x";
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-nand.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand.dts
index 6ff2447..4d7606b 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-nand.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-nand.dts
@@ -9,6 +9,7 @@
#include "am33xx.dtsi"
#include "am335x-phytec-phycore-som.dtsi"
+#include "am335x-phytec-state.dtsi"
/ {
model = "Phytec phyCORE AM335x";
diff --git a/arch/arm/dts/am335x-phytec-state.dtsi b/arch/arm/dts/am335x-phytec-state.dtsi
new file mode 100644
index 0000000..fbc35b9
--- /dev/null
+++ b/arch/arm/dts/am335x-phytec-state.dtsi
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH,
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/ {
+ aliases {
+ am335x_phytec_mac_state = &am335x_phytec_mac_state;
+ };
+
+ am335x_phytec_mac_state: am335x_phytec_mac_state {
+ magic = <0x3f45620e>;
+ compatible = "barebox,state";
+ backend-type = "raw";
+ backend = <&backend_state_eeprom>;
+ backend-stridesize = <40>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ mac0 {
+ reg = <0x0 0x6>;
+ type = "mac";
+ };
+ mac1 {
+ reg = <0x6 0x6>;
+ type = "mac";
+ };
+
+ };
+};
+
+&eeprom {
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #size-cells = <1>;
+ #address-cells = <1>;
+ backend_state_eeprom: state@0 {
+ reg = <0x000 0x120>;
+ label = "state-eeprom";
+ };
+ };
+};
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 3/7] ARM: configs: am335x_defconfig: Add state config
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 2/7] ARM: dts: AM335x: Add state framework Daniel Schultz
@ 2017-11-03 10:48 ` Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 4/7] common: state: Add variable_type to state_variable Daniel Schultz
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
Enable the state framework for all AM335x boards.
---
arch/arm/configs/am335x_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig
index dd9c3c5..5a236fb 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -88,6 +88,7 @@ CONFIG_CMD_OF_FIXUP_STATUS=y
CONFIG_CMD_OFTREE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_MMC_EXTCSD=y
+CONFIG_CMD_STATE=y
CONFIG_NET=y
CONFIG_NET_NFS=y
CONFIG_NET_NETCONSOLE=y
@@ -142,3 +143,5 @@ CONFIG_FS_FAT_LFN=y
CONFIG_FS_UBIFS=y
CONFIG_FS_UBIFS_COMPRESSION_LZO=y
CONFIG_FS_UBIFS_COMPRESSION_ZLIB=y
+CONFIG_STATE=y
+CONFIG_STATE_DRV=y
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 4/7] common: state: Add variable_type to state_variable
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 2/7] ARM: dts: AM335x: Add state framework Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 3/7] ARM: configs: am335x_defconfig: Add state config Daniel Schultz
@ 2017-11-03 10:48 ` Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 5/7] common: state: Add variable type as enum Daniel Schultz
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
Add a pointer in state_variable to the corresponding variable_type array
element.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
Changes:
v2: New patch
v3: struct variable_type is passed as parameter in the create callbacks.
common/state/state.c | 2 +-
common/state/state.h | 8 +++++---
common/state/state_variables.c | 20 +++++++++++++++-----
3 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/common/state/state.c b/common/state/state.c
index 266d211..98a7db3 100644
--- a/common/state/state.c
+++ b/common/state/state.c
@@ -246,7 +246,7 @@ static int state_convert_node_variable(struct state *state,
}
if (conv == STATE_CONVERT_FROM_NODE_CREATE) {
- sv = vtype->create(state, name, node);
+ sv = vtype->create(state, name, node, vtype);
if (IS_ERR(sv)) {
ret = PTR_ERR(sv);
dev_err(&state->dev, "failed to create %s: %s\n", name,
diff --git a/common/state/state.h b/common/state/state.h
index 81aaec2..7dd163c 100644
--- a/common/state/state.h
+++ b/common/state/state.h
@@ -123,15 +123,17 @@ struct variable_type {
int (*export) (struct state_variable *, struct device_node *,
enum state_convert);
int (*import) (struct state_variable *, struct device_node *);
- struct state_variable *(*create) (struct state * state,
- const char *name,
- struct device_node *);
+ struct state_variable *(*create) (struct state *,
+ const char *,
+ struct device_node *,
+ const struct variable_type *);
};
/* instance of a single variable */
struct state_variable {
struct state *state;
struct list_head list;
+ const struct variable_type *type;
const char *name;
unsigned int start;
unsigned int size;
diff --git a/common/state/state_variables.c b/common/state/state_variables.c
index 56bcd95..688467d 100644
--- a/common/state/state_variables.c
+++ b/common/state/state_variables.c
@@ -101,7 +101,8 @@ static int state_uint8_set(struct param_d *p, void *priv)
static struct state_variable *state_uint8_create(struct state *state,
const char *name,
- struct device_node *node)
+ struct device_node *node,
+ const struct variable_type *vtype)
{
struct state_uint32 *su32;
struct param_d *param;
@@ -116,6 +117,7 @@ static struct state_variable *state_uint8_create(struct state *state,
}
su32->param = param;
+ su32->var.type = vtype;
su32->var.size = sizeof(uint8_t);
#ifdef __LITTLE_ENDIAN
su32->var.raw = &su32->value;
@@ -129,7 +131,8 @@ static struct state_variable *state_uint8_create(struct state *state,
static struct state_variable *state_uint32_create(struct state *state,
const char *name,
- struct device_node *node)
+ struct device_node *node,
+ const struct variable_type *vtype)
{
struct state_uint32 *su32;
struct param_d *param;
@@ -144,6 +147,7 @@ static struct state_variable *state_uint32_create(struct state *state,
}
su32->param = param;
+ su32->var.type = vtype;
su32->var.size = sizeof(uint32_t);
su32->var.raw = &su32->value;
su32->var.state = state;
@@ -218,7 +222,8 @@ static int state_enum32_import(struct state_variable *sv,
static struct state_variable *state_enum32_create(struct state *state,
const char *name,
- struct device_node *node)
+ struct device_node *node,
+ const struct variable_type *vtype)
{
struct state_enum32 *enum32;
int ret, i, num_names;
@@ -234,6 +239,7 @@ static struct state_variable *state_enum32_create(struct state *state,
enum32->names = xzalloc(sizeof(char *) * num_names);
enum32->num_names = num_names;
+ enum32->var.type = vtype;
enum32->var.size = sizeof(uint32_t);
enum32->var.raw = &enum32->value;
enum32->var.state = state;
@@ -300,13 +306,15 @@ static int state_mac_import(struct state_variable *sv, struct device_node *node)
static struct state_variable *state_mac_create(struct state *state,
const char *name,
- struct device_node *node)
+ struct device_node *node,
+ const struct variable_type *vtype)
{
struct state_mac *mac;
int ret;
mac = xzalloc(sizeof(*mac));
+ mac->var.type = vtype;
mac->var.size = ARRAY_SIZE(mac->value);
mac->var.raw = mac->value;
mac->var.state = state;
@@ -402,7 +410,8 @@ static int state_string_get(struct param_d *p, void *priv)
static struct state_variable *state_string_create(struct state *state,
const char *name,
- struct device_node *node)
+ struct device_node *node,
+ const struct variable_type *vtype)
{
struct state_string *string;
uint32_t start_size[2];
@@ -420,6 +429,7 @@ static struct state_variable *state_string_create(struct state *state,
return ERR_PTR(-EILSEQ);
string = xzalloc(sizeof(*string) + start_size[1]);
+ string->var.type = vtype;
string->var.size = start_size[1];
string->var.raw = &string->raw;
string->var.state = state;
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 5/7] common: state: Add variable type as enum
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
` (2 preceding siblings ...)
2017-11-03 10:48 ` [PATCH v3 4/7] common: state: Add variable_type to state_variable Daniel Schultz
@ 2017-11-03 10:48 ` Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 6/7] common: state: Add function to read state MAC Daniel Schultz
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
The variable_type struct holds a name of its type. Checking the type of
a variable with this string needs much resources.
This patch introduce a enum of the variable type for better type
checking.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
Changes:
v3: New patch.
common/state/state.h | 9 +++++++++
common/state/state_variables.c | 18 ++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/common/state/state.h b/common/state/state.h
index 7dd163c..fcc6b9f 100644
--- a/common/state/state.h
+++ b/common/state/state.h
@@ -9,6 +9,14 @@ enum state_flags {
STATE_FLAG_NO_AUTHENTIFICATION = (1 << 0),
};
+enum state_variable_type {
+ STATE_VARIABLE_TYPE_UINT8,
+ STATE_VARIABLE_TYPE_UINT32,
+ STATE_VARIABLE_TYPE_ENUM32,
+ STATE_VARIABLE_TYPE_MAC,
+ STATE_VARIABLE_TYPE_STRING
+};
+
/**
* state_backend_storage_bucket - This class describes a single backend storage
* object copy
@@ -119,6 +127,7 @@ struct state_variable;
/* A variable type (uint32, enum32) */
struct variable_type {
const char *type_name;
+ enum state_variable_type type;
struct list_head list;
int (*export) (struct state_variable *, struct device_node *,
enum state_convert);
diff --git a/common/state/state_variables.c b/common/state/state_variables.c
index 688467d..de9ba4a 100644
--- a/common/state/state_variables.c
+++ b/common/state/state_variables.c
@@ -450,26 +450,31 @@ static struct state_variable *state_string_create(struct state *state,
static struct variable_type types[] = {
{
.type_name = "uint8",
+ .type = STATE_VARIABLE_TYPE_UINT8,
.export = state_uint32_export,
.import = state_uint32_import,
.create = state_uint8_create,
}, {
.type_name = "uint32",
+ .type = STATE_VARIABLE_TYPE_UINT32,
.export = state_uint32_export,
.import = state_uint32_import,
.create = state_uint32_create,
}, {
.type_name = "enum32",
+ .type = STATE_VARIABLE_TYPE_ENUM32,
.export = state_enum32_export,
.import = state_enum32_import,
.create = state_enum32_create,
}, {
.type_name = "mac",
+ .type = STATE_VARIABLE_TYPE_MAC,
.export = state_mac_export,
.import = state_mac_import,
.create = state_mac_create,
}, {
.type_name = "string",
+ .type = STATE_VARIABLE_TYPE_STRING,
.export = state_string_export,
.import = state_string_import,
.create = state_string_create,
@@ -489,6 +494,19 @@ struct variable_type *state_find_type_by_name(const char *name)
return NULL;
}
+struct variable_type *state_find_type(const enum state_variable_type type)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(types); i++) {
+ if (type == types[i].type) {
+ return &types[i];
+ }
+ }
+
+ return NULL;
+}
+
struct state_variable *state_find_var(struct state *state, const char *name)
{
struct state_variable *sv;
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 6/7] common: state: Add function to read state MAC
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
` (3 preceding siblings ...)
2017-11-03 10:48 ` [PATCH v3 5/7] common: state: Add variable type as enum Daniel Schultz
@ 2017-11-03 10:48 ` Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 7/7] ARM: phytec-som-am335x: Set MAC addresses from state Daniel Schultz
2017-11-07 6:47 ` [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Sascha Hauer
6 siblings, 0 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
This API function allows to receive a copy of a MAC address from
variables in a state.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
Changes:
v2: New patch
v3: Changed return values
Switched to the new STATE_VARIABLE_TYPE_* field
Changed to memcpy function, instead of own loop
common/state/state.c | 21 +++++++++++++++++++++
include/state.h | 2 ++
2 files changed, 23 insertions(+)
diff --git a/common/state/state.c b/common/state/state.c
index 98a7db3..6399bd3 100644
--- a/common/state/state.c
+++ b/common/state/state.c
@@ -693,6 +693,27 @@ int state_get_name(const struct state *state, char const **name)
return 0;
}
+int state_read_mac(struct state *state, const char *name, u8 *buf)
+{
+ struct state_variable *svar;
+ struct state_mac *mac;
+
+ if (!state || !name || !buf)
+ return -EINVAL;
+
+ svar = state_find_var(state, name);
+ if (IS_ERR(svar))
+ return PTR_ERR(svar);
+
+ if (svar->type->type != STATE_VARIABLE_TYPE_MAC)
+ return -EINVAL;
+
+ mac = to_state_mac(svar);
+ memcpy(buf, mac->value, 6);
+
+ return 0;
+}
+
void state_info(void)
{
struct state *state;
diff --git a/include/state.h b/include/state.h
index 63164f9..f1882ae 100644
--- a/include/state.h
+++ b/include/state.h
@@ -23,4 +23,6 @@ int state_load(struct state *state);
int state_save(struct state *state);
void state_info(void);
+int state_read_mac(struct state *state, const char *name, u8 *buf);
+
#endif /* __STATE_H */
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 7/7] ARM: phytec-som-am335x: Set MAC addresses from state
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
` (4 preceding siblings ...)
2017-11-03 10:48 ` [PATCH v3 6/7] common: state: Add function to read state MAC Daniel Schultz
@ 2017-11-03 10:48 ` Daniel Schultz
2017-11-07 6:47 ` [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Sascha Hauer
6 siblings, 0 replies; 8+ messages in thread
From: Daniel Schultz @ 2017-11-03 10:48 UTC (permalink / raw)
To: barebox
If a state with the name 'am335x_phytec_mac_state' is available, valid
MAC addresses from this state get registerd to their ethernet device.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/boards/phytec-som-am335x/board.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boards/phytec-som-am335x/board.c b/arch/arm/boards/phytec-som-am335x/board.c
index dc3b84a..9f74981 100644
--- a/arch/arm/boards/phytec-som-am335x/board.c
+++ b/arch/arm/boards/phytec-som-am335x/board.c
@@ -21,10 +21,12 @@
#include <bootsource.h>
#include <common.h>
#include <nand.h>
+#include <net.h>
#include <init.h>
#include <io.h>
#include <linux/sizes.h>
#include <envfs.h>
+#include <state.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
#include <linux/phy.h>
@@ -65,8 +67,16 @@ static char *nandslots[] = {
"/dev/nand0.barebox_backup.bb",
};
+#define ETH_COUNT 2
+static const char *eth_names[ETH_COUNT] = {"mac0", "mac1"};
+
static int physom_devices_init(void)
{
+ struct state *state;
+ u8 mac[6];
+ int state_ret;
+ int state_i;
+
if (!of_machine_is_compatible("phytec,am335x-som"))
return 0;
@@ -114,6 +124,17 @@ static int physom_devices_init(void)
ARRAY_SIZE(nandslots));
am33xx_bbu_emmc_mlo_register_handler("MLO.emmc", "/dev/mmc1");
+ if (IS_ENABLED(CONFIG_STATE)) {
+ state = state_by_name("am335x_phytec_mac_state");
+ if (state)
+ for (state_i = 0; state_i < 2; state_i++) {
+ state_ret = state_read_mac(state,
+ eth_names[state_i], &mac[0]);
+ if (state_ret == 6)
+ eth_register_ethaddr(state_i, mac);
+ }
+ }
+
if (IS_ENABLED(CONFIG_SHELL_NONE))
return am33xx_of_register_bootdevice();
--
2.7.4
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO
2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
` (5 preceding siblings ...)
2017-11-03 10:48 ` [PATCH v3 7/7] ARM: phytec-som-am335x: Set MAC addresses from state Daniel Schultz
@ 2017-11-07 6:47 ` Sascha Hauer
6 siblings, 0 replies; 8+ messages in thread
From: Sascha Hauer @ 2017-11-07 6:47 UTC (permalink / raw)
To: Daniel Schultz; +Cc: barebox
On Fri, Nov 03, 2017 at 11:48:23AM +0100, Daniel Schultz wrote:
> PCM-060 modules only have one-bank RAMs populated, which allows us to
> find out the populated RAM size at run-time.
>
> Therefore, a new entry point was create 'PHYTEC_ENTRY_UNIFIED_MLO'. This
> creates a MLO for all modules of one family and all existing PCM-060
> MLOs were replaced with this new entry point. To provide backward
> compatibility for older modules, these were not affected.
>
> In the first step generic RAM timings for the module family get loaded,
> because RAM accesses are only possible with an initialized controller.
> After that, the RAM size will be calculated and the RAM controller gets
> reinitialized with the correct RAM timings.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
Applied, thanks
Sascha
> arch/arm/boards/phytec-som-am335x/lowlevel.c | 150 +++++++++++++++++++++++----
> images/Makefile.am33xx | 24 ++---
> 2 files changed, 138 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
> index 77f436f..b1576ee 100644
> --- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
> +++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
> @@ -46,6 +46,94 @@ static const struct am33xx_cmd_control physom_cmd = {
> .invert_clkout2 = 0x0,
> };
>
> +/* Module family for the unified MLO
> + *
> + * NONE: Unified MLO is not supported
> + * PHYCORE_R2: Unified MLO for PCM-060, PCM-062
> + */
> +enum {
> + NONE,
> + PHYCORE_R2,
> +};
> +
> +/* @brief Supplies default ram timings for all ram sizes
> + *
> + * Returns generic ram timings for module families to find the correct
> + * ram size.
> + *
> + * @return struct am335x_sdram_timings* or NULL
> + */
> +
> +static noinline struct am335x_sdram_timings* get_minimal_timings(
> + int module_family)
> +{
> + struct am335x_sdram_timings *timing;
> +
> + switch (module_family) {
> + case PHYCORE_R2:
> + timing = &physom_timings[PHYCORE_R2_MT41K512M16HA125IT_1024MB];
> + break;
> + default:
> + timing = NULL;
> + }
> +
> + return timing;
> +}
> +
> +/* @brief Converts ramsizes to ram timings for phyCORE-R2 modules
> + *
> + * Returns ram timings for a given ram size or NULL, if this size is
> + * not supported.
> + *
> + * @return struct am335x_sdram_timings* or NULL
> + */
> +
> +static noinline struct am335x_sdram_timings* convert_phycore_r2_timings(
> + u32 ramsize)
> +{
> + struct am335x_sdram_timings *timing;
> +
> + switch (ramsize) {
> + case SZ_256M:
> + timing = &physom_timings[PHYCORE_R2_MT41K128M16JT_256MB];
> + break;
> + case SZ_512M:
> + timing = &physom_timings[PHYCORE_R2_MT41K256M16TW107IT_512MB];
> + break;
> + case SZ_1G:
> + timing = &physom_timings[PHYCORE_R2_MT41K512M16HA125IT_1024MB];
> + break;
> + default:
> + timing = NULL;
> + }
> +
> + return timing;
> +}
> +
> +/* @brief Converts a module family and ram size to ram timings
> + *
> + * Returns ram timings for a given ram size and module family or NULL,
> + * if the ram size or module family is not supported.
> + *
> + * @return struct am335x_sdram_timings* or NULL
> + */
> +
> +static noinline struct am335x_sdram_timings* get_timings_by_size(
> + int module_family, u32 ramsize)
> +{
> + struct am335x_sdram_timings *timing;
> +
> + switch (module_family) {
> + case PHYCORE_R2:
> + timing = convert_phycore_r2_timings(ramsize);
> + break;
> + default:
> + timing = NULL;
> + }
> +
> + return timing;
> +}
> +
> /**
> * @brief The basic entry point for board initialization.
> *
> @@ -55,9 +143,10 @@ static const struct am33xx_cmd_control physom_cmd = {
> *
> * @return void
> */
> -static noinline void physom_board_init(int sdram, void *fdt)
> +static noinline void physom_board_init(void *fdt, int sdram, int module_family)
> {
> - struct am335x_sdram_timings *timing = &physom_timings[sdram];
> + struct am335x_sdram_timings *timing = NULL;
> + u32 ramsize;
>
> /*
> * WDT1 is already running when the bootloader gets control
> @@ -71,6 +160,24 @@ static noinline void physom_board_init(int sdram, void *fdt)
>
> am33xx_pll_init(MPUPLL_M_600, DDRPLL_M_400);
>
> + if (module_family == NONE) {
> + timing = &physom_timings[sdram];
> + } else {
> + /* Load generic DDR3 ram timings to find the ram size */
> + timing = get_minimal_timings(module_family);
> + if (!timing)
> + hang();
> + am335x_sdram_init(DDR_IOCTRL, &physom_cmd,
> + &timing->regs,
> + &timing->data);
> +
> + /* Find the ram size and set up the correct ram timings */
> + ramsize = get_ram_size((long *) 0x80000000, SZ_1G);
> + timing = get_timings_by_size(module_family, ramsize);
> + if (!timing)
> + hang();
> + }
> +
> am335x_sdram_init(DDR_IOCTRL, &physom_cmd,
> &timing->regs,
> &timing->data);
> @@ -83,7 +190,8 @@ static noinline void physom_board_init(int sdram, void *fdt)
> am335x_barebox_entry(fdt);
> }
>
> -static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void *fdt)
> +static noinline void physom_board_entry(unsigned long bootinfo, int sdram,
> + void *fdt, int module_family)
> {
> am33xx_save_bootinfo((void *)bootinfo);
>
> @@ -95,26 +203,34 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void
> */
> relocate_to_current_adr();
> setup_c();
> -
> - physom_board_init(sdram, fdt);
> + physom_board_init(fdt, sdram, module_family);
> }
>
> -#define PHYTEC_ENTRY_MLO(name, fdt_name, sdram) \
> - ENTRY_FUNCTION(name, bootinfo, r1, r2) \
> - { \
> +#define PHYTEC_ENTRY_UNIFIED_MLO(name, fdt_name, module_family) \
> + ENTRY_FUNCTION(name, bootinfo, r1, r2) \
> + { \
> + extern char __dtb_z_##fdt_name##_start[]; \
> + void *fdt = __dtb_z_##fdt_name##_start - \
> + get_runtime_offset(); \
> + physom_board_entry(bootinfo, 0, fdt, module_family); \
> + }
> +
> +#define PHYTEC_ENTRY_MLO(name, fdt_name, sdram) \
> + ENTRY_FUNCTION(name, bootinfo, r1, r2) \
> + { \
> extern char __dtb_z_##fdt_name##_start[]; \
> void *fdt = __dtb_z_##fdt_name##_start - \
> - get_runtime_offset(); \
> - physom_board_entry(bootinfo, sdram, fdt); \
> + get_runtime_offset(); \
> + physom_board_entry(bootinfo, sdram, fdt, NONE); \
> }
>
> -#define PHYTEC_ENTRY(name, fdt_name) \
> - ENTRY_FUNCTION(name, r0, r1, r2) \
> - { \
> +#define PHYTEC_ENTRY(name, fdt_name) \
> + ENTRY_FUNCTION(name, r0, r1, r2) \
> + { \
> extern char __dtb_z_##fdt_name##_start[]; \
> void *fdt = __dtb_z_##fdt_name##_start - \
> - get_runtime_offset(); \
> - am335x_barebox_entry(fdt); \
> + get_runtime_offset(); \
> + am335x_barebox_entry(fdt); \
> }
>
> /* phycore-som */
> @@ -122,9 +238,7 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_128mb, am335x_phytec_phycore_s
> PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J128M16125IT_256MB);
> PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J256M16HA15EIT_512MB);
> PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
> -PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
> -PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB);
> -PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K512M16HA125IT_1024MB);
> +PHYTEC_ENTRY_UNIFIED_MLO(start_am33xx_phytec_phycore_r2_sram, am335x_phytec_phycore_som_mlo, PHYCORE_R2);
> PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_sdram, am335x_phytec_phycore_som_nand);
> PHYTEC_ENTRY(start_am33xx_phytec_phycore_emmc_sdram, am335x_phytec_phycore_som_emmc);
> PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_spi_sdram, am335x_phytec_phycore_som_nand_no_spi);
> diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
> index e86d4e9..3f29143 100644
> --- a/images/Makefile.am33xx
> +++ b/images/Makefile.am33xx
> @@ -45,18 +45,18 @@ pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi
> FILE_barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram.pblx
> am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img
>
> +pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram
> +FILE_barebox-am33xx-phytec-phycore-r2-mlo.img = start_am33xx_phytec_phycore_r2_sram.pblx.mlo
> +FILE_barebox-am33xx-phytec-phycore-r2-mlo.spi.img = start_am33xx_phytec_phycore_r2_sram.pblx.mlospi
> +am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo.img
> +am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo.spi.img
> +
> pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_256mb
> FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlo
> FILE_barebox-am33xx-phytec-phycore-mlo-256mb.spi.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlospi
> am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.img
> am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.spi.img
>
> -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_256mb
> -FILE_barebox-am33xx-phytec-phycore-r2-mlo-256mb.img = start_am33xx_phytec_phycore_r2_sram_256mb.pblx.mlo
> -FILE_barebox-am33xx-phytec-phycore-r2-mlo-256mb.spi.img = start_am33xx_phytec_phycore_r2_sram_256mb.pblx.mlospi
> -am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-256mb.img
> -am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-256mb.spi.img
> -
> pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_128mb
> FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
> FILE_barebox-am33xx-phytec-phycore-mlo-128mb.spi.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlospi
> @@ -69,24 +69,12 @@ FILE_barebox-am33xx-phytec-phycore-mlo-512mb.spi.img = start_am33xx_phytec_phyco
> am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.img
> am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.spi.img
>
> -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_512mb
> -FILE_barebox-am33xx-phytec-phycore-r2-mlo-512mb.img = start_am33xx_phytec_phycore_r2_sram_512mb.pblx.mlo
> -FILE_barebox-am33xx-phytec-phycore-r2-mlo-512mb.spi.img = start_am33xx_phytec_phycore_r2_sram_512mb.pblx.mlospi
> -am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-512mb.img
> -am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-512mb.spi.img
> -
> pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_2x512mb
> FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
> FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlospi
> am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.img
> am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img
>
> -pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_1024mb
> -FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlo
> -FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlospi
> -am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img
> -am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img
> -
> pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sdram
> FILE_barebox-am33xx-phytec-phyflex.img = start_am33xx_phytec_phyflex_sdram.pblx
> am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex.img
> --
> 2.7.4
>
>
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> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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2017-11-03 10:48 [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 2/7] ARM: dts: AM335x: Add state framework Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 3/7] ARM: configs: am335x_defconfig: Add state config Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 4/7] common: state: Add variable_type to state_variable Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 5/7] common: state: Add variable type as enum Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 6/7] common: state: Add function to read state MAC Daniel Schultz
2017-11-03 10:48 ` [PATCH v3 7/7] ARM: phytec-som-am335x: Set MAC addresses from state Daniel Schultz
2017-11-07 6:47 ` [PATCH v3 1/7] ARM: boards: phytec-som-am335x: Add unified MLO Sascha Hauer
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