From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org, Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: Re: [PATCH master 1/3] soc: sifive: l2_cache: fix 32-bit compilation
Date: Wed, 03 Apr 2024 13:33:11 +0200 [thread overview]
Message-ID: <171214399134.1489612.2332390134532727879.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20240402134501.3689322-1-a.fatoum@pengutronix.de>
On Tue, 02 Apr 2024 15:44:59 +0200, Ahmad Fatoum wrote:
> The StarFive SoCs are 64-bit, but the L2 cache driver could be
> compile-tested on 32-bit as well. Currently, this would fail, because
> writeq isn't defined. Fix this by emulating it using a lo-hi write.
>
>
Applied, thanks!
[1/3] soc: sifive: l2_cache: fix 32-bit compilation
https://git.pengutronix.de/cgit/barebox/commit/?id=046ceb972493 (link may not be stable)
[2/3] RISC-V: riscvemu: build overlay as DTSO
https://git.pengutronix.de/cgit/barebox/commit/?id=d75ee46bea16 (link may not be stable)
[3/3] treewide: replace references to barebox.org/jsbarebox with demo
https://git.pengutronix.de/cgit/barebox/commit/?id=c0dde74b1c9a (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
prev parent reply other threads:[~2024-04-03 11:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-02 13:44 Ahmad Fatoum
2024-04-02 13:45 ` [PATCH master 2/3] RISC-V: riscvemu: build overlay as DTSO Ahmad Fatoum
2024-04-02 13:45 ` [PATCH master 3/3] treewide: replace references to barebox.org/jsbarebox with demo Ahmad Fatoum
2024-04-03 11:33 ` Sascha Hauer [this message]
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