From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>,
Sascha Hauer <s.hauer@pengutronix.de>
Cc: lsc@pengutronix.de
Subject: Re: [PATCH] ARM: k3: fix banks count in DRAM size detection
Date: Fri, 16 May 2025 08:37:48 +0200 [thread overview]
Message-ID: <174737746849.2377587.1858418241063801378.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20250509125532.983391-1-s.hauer@pengutronix.de>
On Fri, 09 May 2025 14:55:32 +0200, Sascha Hauer wrote:
> We assumed that a DDR4 always has 16 banks. This is true for x4 and x8
> devices, but not for x16 devices which only have 8 banks.
>
> It seems we can read the number of banks from the BANK_DIFF_x register
> fields, but the exact encoding of these fields is unknown. The reference
> manual only describes them as:
>
> [...]
Applied, thanks!
[1/1] ARM: k3: fix banks count in DRAM size detection
https://git.pengutronix.de/cgit/barebox/commit/?id=98551a9d8951 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
prev parent reply other threads:[~2025-05-16 6:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-09 12:55 Sascha Hauer
2025-05-16 6:37 ` Sascha Hauer [this message]
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