From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org,
Alexander Shiyan <eagle.alexander923@gmail.com>
Subject: Re: [PATCH 1/2] ARM: dts: rockchip: Set initial CPU frequencies for RK3588
Date: Tue, 30 Sep 2025 07:56:27 +0200 [thread overview]
Message-ID: <175921178721.3282313.3833896810735516933.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20250929135857.965181-1-eagle.alexander923@gmail.com>
On Mon, 29 Sep 2025 16:58:56 +0300, Alexander Shiyan wrote:
> During system boot, the cpufreq driver reports unlisted initial frequencies:
> cpufreq: cpufreq_policy_online: CPU0: Running at unlisted initial frequency: 900000 kHz, changing to: 1200000 kHz
> cpufreq: cpufreq_policy_online: CPU4: Running at unlisted initial frequency: 816000 kHz, changing to: 1200000 kHz
> cpufreq: cpufreq_policy_online: CPU6: Running at unlisted initial frequency: 816000 kHz, changing to: 1200000 kHz
>
> Add assigned-clock-rates to the SCMI clock controller node in the device
> tree to establish proper initial frequencies.
> This ensures all CPU cores boot at valid frequencies that match the
> cpufreq policy, eliminating the warning messages and unnecessary
> frequency changes during initialization.
>
> [...]
Applied, thanks!
[1/2] ARM: dts: rockchip: Set initial CPU frequencies for RK3588
https://git.pengutronix.de/cgit/barebox/commit/?id=c5a8ecc95eb9 (link may not be stable)
[2/2] ARM: dts: rockchip: Set CPLL frequency for RK3588
https://git.pengutronix.de/cgit/barebox/commit/?id=e5ca5163ac08 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
prev parent reply other threads:[~2025-09-30 5:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-29 13:58 Alexander Shiyan
2025-09-29 13:58 ` [PATCH 2/2] ARM: dts: rockchip: Set CPLL frequency " Alexander Shiyan
2025-10-01 14:06 ` Michael Tretter
2025-10-06 11:50 ` Alexander Shiyan
2025-09-30 5:56 ` Sascha Hauer [this message]
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