From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org,
Alexander Shiyan <eagle.alexander923@gmail.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>, Heiko Stuebner <heiko@sntech.de>
Subject: Re: [PATCH] clk: rockchip: rk3568: Add PCIe pipe clock gates
Date: Fri, 29 May 2026 13:43:06 +0200 [thread overview]
Message-ID: <178005498647.2594741.7637751783109083704.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20260528121532.1242489-2-eagle.alexander923@gmail.com>
On Thu, 28 May 2026 15:15:31 +0300, Alexander Shiyan wrote:
> The PCIe pipe clocks are currently left as orphan clocks and remain
> enabled indefinitely, which is suboptimal. Add the missing clock gates
> so the PCIe driver can explicitly manage them when not in use. In order
> not to break compatibility with old DTB, mark them as CLK_IGNORE_UNUSED.
>
>
Applied, thanks!
[1/1] clk: rockchip: rk3568: Add PCIe pipe clock gates
https://git.pengutronix.de/cgit/barebox/commit/?id=28f3a11c9a73 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
next prev parent reply other threads:[~2026-05-29 11:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-28 12:15 [PATCH] clk: rockchip: Fix error pointer check after rockchip_clk_register_gate_link() Alexander Shiyan
2026-05-28 12:15 ` [PATCH] clk: rockchip: rk3568: Add PCIe pipe clock gates Alexander Shiyan
2026-05-29 11:43 ` Sascha Hauer
2026-05-29 11:43 ` Sascha Hauer [this message]
2026-05-28 12:46 ` [PATCH] clk: rockchip: Fix error pointer check after rockchip_clk_register_gate_link() Sascha Hauer
2026-05-29 11:43 ` (subset) " Sascha Hauer
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