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From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>,
	 Michael Tretter <m.tretter@pengutronix.de>
Subject: Re: [PATCH 00/11] arm: socfpga: agilex5: add xload support for bl33 to FSBL
Date: Mon, 19 Oct 2026 14:43:53 +0200	[thread overview]
Message-ID: <179241383391.3794819.10870421514311856042.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20261007-socfpga-agilex5-xload-v1-0-f8fb2d2819da@pengutronix.de>


On Wed, 07 Oct 2026 12:55:45 +0200, Michael Tretter wrote:
> The image of the first stage boot loader on the Agilex 5 is limited to
> approximately 256k. The SRAM is actually 512k, but there is some handoff
> data at the send of the SRAM, which must not be overridden. There are
> some size checks, but due to compression of the FSBL image, it's the
> possible image size cannot be determined reliably.
> 
> The barebox PBL and a full featured barebox proper are easily larger
> than the allowed size. Compression of the piggy data may even be counter
> productive, since the entire FSBL image is compressed again when
> creating the boot image.
> 
> [...]

Applied, thanks!

[01/11] mtd: spi-nor: drop requirement for device field
        https://git.pengutronix.de/cgit/barebox/commit/?id=a2bc4d81a1d3 (link may not be stable)
[02/11] mtd: spi-nor: enable module in PBL
        https://git.pengutronix.de/cgit/barebox/commit/?id=778f9acdcc74 (link may not be stable)
[03/11] mtd: spi-nor: cadence: extract common part for use in PBL
        https://git.pengutronix.de/cgit/barebox/commit/?id=d9184efbfc83 (link may not be stable)
[04/11] mtd: spi-nor: cadence: add a PBL driver
        https://git.pengutronix.de/cgit/barebox/commit/?id=41363fd77534 (link may not be stable)
[05/11] arm: socfpga: agilex5: add bl33 xload support
        https://git.pengutronix.de/cgit/barebox/commit/?id=eff2acaf2fb6 (link may not be stable)
[06/11] arm: socfpga: agilex5: separate load and start of bl33
        https://git.pengutronix.de/cgit/barebox/commit/?id=f0de955e1047 (link may not be stable)
[07/11] arm: socfpga: agilex5: enable xload for bl33
        https://git.pengutronix.de/cgit/barebox/commit/?id=6a3484db1463 (link may not be stable)
[08/11] arm: socfpga: agilex5: initialize QSPI flash in PBL
        https://git.pengutronix.de/cgit/barebox/commit/?id=0c4c1cdf2fc4 (link may not be stable)
[09/11] arm: socfpga: agilex5: add agilex5_barebox_entry_xload
        https://git.pengutronix.de/cgit/barebox/commit/?id=14810aeb4c90 (link may not be stable)
[10/11] arm: socfpga: axe5-eagle: move lowlevel init to separate function
        https://git.pengutronix.de/cgit/barebox/commit/?id=92133cb0c3d5 (link may not be stable)
[11/11] arm: socfpga: axe5-eagle: build FSBL without piggy data
        https://git.pengutronix.de/cgit/barebox/commit/?id=2b358eb23e26 (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer@pengutronix.de>




  parent reply	other threads:[~2026-10-19 12:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-07 10:55 Michael Tretter
2026-10-07 10:55 ` [PATCH 01/11] mtd: spi-nor: drop requirement for device field Michael Tretter
2026-10-07 10:55 ` [PATCH 02/11] mtd: spi-nor: enable module in PBL Michael Tretter
2026-10-20  7:39   ` [PATCH] fixup! " Sascha Hauer
2026-10-20  9:05     ` Sascha Hauer
2026-10-07 10:55 ` [PATCH 03/11] mtd: spi-nor: cadence: extract common part for use " Michael Tretter
2026-10-07 10:55 ` [PATCH 04/11] mtd: spi-nor: cadence: add a PBL driver Michael Tretter
2026-10-07 10:55 ` [PATCH 05/11] arm: socfpga: agilex5: add bl33 xload support Michael Tretter
2026-10-07 10:55 ` [PATCH 06/11] arm: socfpga: agilex5: separate load and start of bl33 Michael Tretter
2026-10-07 10:55 ` [PATCH 07/11] arm: socfpga: agilex5: enable xload for bl33 Michael Tretter
2026-10-07 10:55 ` [PATCH 08/11] arm: socfpga: agilex5: initialize QSPI flash in PBL Michael Tretter
2026-10-07 12:11   ` Michael Tretter
2026-10-07 10:55 ` [PATCH 09/11] arm: socfpga: agilex5: add agilex5_barebox_entry_xload Michael Tretter
2026-10-07 10:55 ` [PATCH 10/11] arm: socfpga: axe5-eagle: move lowlevel init to separate function Michael Tretter
2026-10-07 10:55 ` [PATCH 11/11] arm: socfpga: axe5-eagle: build FSBL without piggy data Michael Tretter
2026-10-21  8:38   ` [PATCH] fixup! " Michael Tretter
2026-10-19 12:43 ` Sascha Hauer [this message]
2026-10-20 14:30 ` [PATCH 00/11] arm: socfpga: agilex5: add xload support for bl33 to FSBL Sascha Hauer

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