Re: New driver crashes with "unable to handle paging request"

[Rolf Evers-Fischer <embedded24@evers-fischer.de>]

I have resolved the problem by enabling the USB clocks:
Write "2" to register "CM_PER_USB0_CLKCTRL" (address 0x44e0001c).

Kind regards,
 Rolf


> Rolf Evers-Fischer <embedded24@evers-fischer.de> hat am 24. April 2014 um
> 10:52 geschrieben:
>
>
>
> Hi Sascha,
>
> > Sascha Hauer <s.hauer@pengutronix.de> hat am 24. April 2014 um 08:58
> > geschrieben:
> >
> >
> > Hi Rolf,
> >
> > On Wed, Apr 23, 2014 at 06:09:40PM +0200, Rolf Evers-Fischer wrote:
> > > I'm just trying to port the USB driver "musb" (for the AM335x platform)
> > > from
> > > linux kernel to barebox.
> > > But whenever I want to read any address in the range
> > > 0x47401400-0x474017ff,
> > > the
> > > barebox crashes with "unable to handle paging request".
> > > I have already tried to invoke a "map_io_sections(0x0, 0x47400000,
> > > 0x2000)",
> > > but
> > > it didn't help.
> >
> > barebox creates a flat 1:1 mapping when the MMU is enabled. You won't
> > need any calls to map_io_sections or some ioremap correspondent
> > function.
> >
>
> Thank you. That's good to know.
>
> > It may be that you have to enable some bus clocks in order to access the
> > musb.
> >
>
> Maybe. I found this in TI's "Technical Reference Manual":
> "Prior to configuring the USB Module Registers, the USB SubSystem and PHY are
> required to be released
> from reset, enable interconnects and controllers clocks as well as configure
> the
> USB PHY with appropriate
> setting."
>
> Quite a lot of work, but I'll definitely have to check it.
>
> > To make sure you don't have MMU trouble could you post the output of
> > 'mmuinfo 0x47400000'?
> >
>
> PAR result for 0x47400000:
>  privileged read: 0x47400290
>   Physical Address [31:12]: 0x47400000
>   Reserved [11]:            0x0
>   Not Outer Shareable [10]: 0x0
>   Non-Secure [9]:           0x1
>   Impl. def. [8]:           0x0
>   Shareable [7]:            0x1
>   Inner mem. attr. [6:4]:   0x1 (0b001 Strongly-ordered)
>   Outer mem. attr. [3:2]:   0x0 (0b00 Non-cacheable)
>   SuperSection [1]:         0x0
>   Failure [0]:              0x0
>  privileged write: 0x47400290
>   Physical Address [31:12]: 0x47400000
>   Reserved [11]:            0x0
>   Not Outer Shareable [10]: 0x0
>   Non-Secure [9]:           0x1
>   Impl. def. [8]:           0x0
>   Shareable [7]:            0x1
>   Inner mem. attr. [6:4]:   0x1 (0b001 Strongly-ordered)
>   Outer mem. attr. [3:2]:   0x0 (0b00 Non-cacheable)
>   SuperSection [1]:         0x0
>   Failure [0]:              0x0
>
>
> Best regards,
>  Rolf

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