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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
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Date: Wed, 2 Oct 2019 12:45:59 +0200
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Subject: Re: [PATCH] ARM: aarch64: save clobbered registers in
 __barebox_arm_entry
To: Rouven Czerwinski <rcz@pengutronix.de>
Cc: barebox@lists.infradead.org

On 10/2/19 11:30 AM, Rouven Czerwinski wrote:
> On Wed, 2019-10-02 at 09:57 +0200, Ahmad Fatoum wrote:
>> arm_early_mmu_cache_invalidate now clobbers x0, x1, x2, which might
>> be
>> passed by a previous stage bootloader. Have the caller save them.
>> ---
>> Rouven, does this work for you?
> 
> No, this does not fix the issue. I'll take some time to look into this
> at a later point.

Hmm, could you tell me a bit about how the i.MX8 boots?
At what stage does it break? barebox PBL? barebox proper?
Is there something running prior to the barebox PBL?
Is the MMU off when barebox is run?

> 
> - rcz
> 
> 


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