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* mx35 3stack LCD power enable
@ 2010-04-12  4:22 Marc Reilly
  2010-04-12 10:19 ` Sascha Hauer
  0 siblings, 1 reply; 2+ messages in thread
From: Marc Reilly @ 2010-04-12  4:22 UTC (permalink / raw)
  To: barebox

[-- Attachment #1: Type: Text/Plain, Size: 487 bytes --]

Hi,

These patches enable power to the mx35 3stack LCD.

(First time -so please pardon any transgressions of patching etiquette.)

It'd be nice for someone to double check what I've done in 
f3s_pmic_init_all(). I'm not sure what the original author was intending to 
turn on/off and whether these patches break that. I've preserved the bit 
banging of the physical lines themselves under the assumption that whatever it 
was doing before was the correct/intended behavior.

Cheers
Marc

[-- Attachment #2: 0001-Fixed-incorrect-register-offsets.-These-values-dervi.patch --]
[-- Type: text/x-patch, Size: 3579 bytes --]

From befd31552242a57f6c47468e76c3790a7c8c8afd Mon Sep 17 00:00:00 2001
From: marc <marc@susedev1.rulztime>
Date: Thu, 8 Apr 2010 17:21:25 +1000
Subject: [PATCH 1/3] Fixed incorrect register offsets. (These values dervied from Freescale source
 code for the mc9s08dz60)

---
 include/i2c/mc9sdz60.h |   82 ++++++++++++++++++++++++++++--------------------
 1 files changed, 48 insertions(+), 34 deletions(-)

diff --git a/include/i2c/mc9sdz60.h b/include/i2c/mc9sdz60.h
index 4cc233e..721144d 100644
--- a/include/i2c/mc9sdz60.h
+++ b/include/i2c/mc9sdz60.h
@@ -12,42 +12,56 @@
 #ifndef __ASM_ARCH_MC9SDZ60_H
 #define __ASM_ARCH_MC9SDZ60_H
 
+/**
+ * Register addresses for the MC9SDZ60
+ * 
+ * @note: these match those in the kernel drivers/mxc/mcu_pmic/mc9s08dz60.h
+ * but not include/linux/mfd/mc9s08dz60/pmic.h
+ *
+ */
 enum mc9sdz60_reg {
 	MC9SDZ60_REG_VERSION		= 0x00,
-	MC9SDZ60_REG_SECS		= 0x01,
-	MC9SDZ60_REG_MINS		= 0x02,
-	MC9SDZ60_REG_HRS		= 0x03,
-	MC9SDZ60_REG_DAY		= 0x04,
-	MC9SDZ60_REG_DATE		= 0x05,
-	MC9SDZ60_REG_MONTH		= 0x06,
-	MC9SDZ60_REG_YEAR		= 0x07,
-	MC9SDZ60_REG_ALARM_SECS		= 0x08,
-	MC9SDZ60_REG_ALARM_MINS		= 0x09,
-	MC9SDZ60_REG_ALARM_HRS		= 0x0a,
-	MC9SDZ60_REG_TS_CONTROL		= 0x0b,
-	MC9SDZ60_REG_X_LOW		= 0x0c,
-	MC9SDZ60_REG_Y_LOW		= 0x0d,
-	MC9SDZ60_REG_XY_HIGH		= 0x0e,
-	MC9SDZ60_REG_X_LEFT_LOW		= 0x0f,
-	MC9SDZ60_REG_X_LEFT_HIGH	= 0x10,
-	MC9SDZ60_REG_X_RIGHT		= 0x11,
-	MC9SDZ60_REG_Y_TOP_LOW		= 0x12,
-	MC9SDZ60_REG_Y_TOP_HIGH		= 0x13,
-	MC9SDZ60_REG_Y_BOTTOM		= 0x14,
-	MC9SDZ60_REG_RESET_1		= 0x15,
-	MC9SDZ60_REG_RESET_2		= 0x16,
-	MC9SDZ60_REG_POWER_CTL		= 0x17,
-	MC9SDZ60_REG_DELAY_CONFIG	= 0x18,
-	MC9SDZ60_REG_GPIO_1		= 0x19,
-	MC9SDZ60_REG_GPIO_2		= 0x1a,
-	MC9SDZ60_REG_KPD_1		= 0x1b,
-	MC9SDZ60_REG_KPD_2		= 0x1c,
-	MC9SDZ60_REG_KPD_CONTROL	= 0x1d,
-	MC9SDZ60_REG_INT_ENABLE_1	= 0x1e,
-	MC9SDZ60_REG_INT_ENABLE_2	= 0x1f,
-	MC9SDZ60_REG_INT_FLAG_1		= 0x20,
-	MC9SDZ60_REG_INT_FLAG_2		= 0x21,
-	MC9SDZ60_REG_DES_FLAG		= 0x22,
+	/* reserved                       0x01 */
+	MC9SDZ60_REG_SECS		= 0x02,
+	MC9SDZ60_REG_MINS		= 0x03,
+	MC9SDZ60_REG_HRS		= 0x04,
+	MC9SDZ60_REG_DAY		= 0x05,
+	MC9SDZ60_REG_DATE		= 0x06,
+	MC9SDZ60_REG_MONTH		= 0x07,
+	MC9SDZ60_REG_YEAR		= 0x08,
+	MC9SDZ60_REG_ALARM_SECS		= 0x09,
+	MC9SDZ60_REG_ALARM_MINS		= 0x0a,
+	MC9SDZ60_REG_ALARM_HRS		= 0x0b,
+        /* reserved                       0x0c */
+        /* reserved                       0x0d */
+	MC9SDZ60_REG_TS_CONTROL		= 0x0e,
+	MC9SDZ60_REG_X_LOW		= 0x0f,
+	MC9SDZ60_REG_Y_LOW		= 0x10,
+	MC9SDZ60_REG_XY_HIGH		= 0x11,
+	MC9SDZ60_REG_X_LEFT_LOW		= 0x12,
+	MC9SDZ60_REG_X_LEFT_HIGH	= 0x13,
+	MC9SDZ60_REG_X_RIGHT		= 0x14,
+	MC9SDZ60_REG_Y_TOP_LOW		= 0x15,
+	MC9SDZ60_REG_Y_TOP_HIGH		= 0x16,
+	MC9SDZ60_REG_Y_BOTTOM		= 0x17,
+        /* reserved                       0x18 */
+        /* reserved                       0x19 */
+	MC9SDZ60_REG_RESET_1		= 0x1a,
+	MC9SDZ60_REG_RESET_2		= 0x1b,
+	MC9SDZ60_REG_POWER_CTL		= 0x1c,
+	MC9SDZ60_REG_DELAY_CONFIG	= 0x1d,
+        /* reserved                       0x1e */
+        /* reserved                       0x1f */
+	MC9SDZ60_REG_GPIO_1		= 0x20,
+	MC9SDZ60_REG_GPIO_2		= 0x21,
+	MC9SDZ60_REG_KPD_1		= 0x22,
+	MC9SDZ60_REG_KPD_2		= 0x23,
+	MC9SDZ60_REG_KPD_CONTROL	= 0x24,
+	MC9SDZ60_REG_INT_ENABLE_1	= 0x25,
+	MC9SDZ60_REG_INT_ENABLE_2	= 0x26,
+	MC9SDZ60_REG_INT_FLAG_1		= 0x27,
+	MC9SDZ60_REG_INT_FLAG_2		= 0x28,
+	MC9SDZ60_REG_DES_FLAG		= 0x29,
 };
 
 struct mc9sdz60 {
-- 
1.6.4.2


[-- Attachment #3: 0002-Enable-power-to-LCD.patch --]
[-- Type: text/x-patch, Size: 1538 bytes --]

From 0273e73a5fc5703d9b48ca85d54a482f97c8d9b8 Mon Sep 17 00:00:00 2001
From: marc <marc@cpdesign.com.au>
Date: Thu, 8 Apr 2010 17:53:43 +1000
Subject: [PATCH 2/3] Enable power to LCD.
 Changed register names in f3s_pmic_init_all so that they have the same
 effect with the corrected address values.

---
 board/freescale-mx35-3-stack/3stack.c |   10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/board/freescale-mx35-3-stack/3stack.c b/board/freescale-mx35-3-stack/3stack.c
index 3b6a93b..0b1abcd 100644
--- a/board/freescale-mx35-3-stack/3stack.c
+++ b/board/freescale-mx35-3-stack/3stack.c
@@ -202,6 +202,10 @@ device_initcall(f3s_devices_init);
 static int f3s_enable_display(void)
 {
 	gpio_direction_output(1, 1);
+
+	/* Enable power to the LCD. (bit 6 hi.) */ 
+	mc9sdz60_set_bits( mc9sdz60_get(), MC9SDZ60_REG_GPIO_1, 0x40, 0x40);
+
 	return 0;
 }
 
@@ -390,11 +394,11 @@ static int f3s_pmic_init_all(struct mc9sdz60 *mc9sdz60)
 {
 	int err = 0;
 
-	err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_INT_FLAG_1, 0x04, 0x04);
+	err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_GPIO_1, 0x04, 0x04);
 
-	err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_GPIO_2, 0x80, 0x00);
+	err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_RESET_2, 0x80, 0x00);
 	mdelay(200);
-	err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_GPIO_2, 0x80, 0x80);
+	err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_RESET_2, 0x80, 0x80);
 
 	if (err)
 		dev_err(&mc9sdz60->client->dev,
-- 
1.6.4.2


[-- Attachment #4: 0003-Remove-comment-about-LCD-power-enable.patch --]
[-- Type: text/x-patch, Size: 975 bytes --]

From 4d7be35035f58c1205729b22c4a55191201c8334 Mon Sep 17 00:00:00 2001
From: marc <marc@cpdesign.com.au>
Date: Thu, 8 Apr 2010 17:58:40 +1000
Subject: [PATCH 3/3] Remove comment about LCD power enable.

---
 board/freescale-mx35-3-stack/3stack.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/board/freescale-mx35-3-stack/3stack.c b/board/freescale-mx35-3-stack/3stack.c
index 61b5ace..0b1abcd 100644
--- a/board/freescale-mx35-3-stack/3stack.c
+++ b/board/freescale-mx35-3-stack/3stack.c
@@ -113,10 +113,6 @@ static struct device_d i2c_dev = {
 
 /*
  * Generic display, shipped with the PDK
- * FIXME: The power for the display is driven by the mc9s08. This is
- * currently not done in software, for the display to work you have to
- * short circuit pins 2 and 3 of q6 on the personality board, or better,
- * send a patch.
  */
 static struct fb_videomode CTP_CLAA070LC0ACW = {
 	/* 800x480 @ 60 Hz */
-- 
1.6.4.2


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