From: Sascha Hauer <s.hauer@pengutronix.de>
To: Tim Sander <tim.sander@hbm.com>
Cc: barebox@lists.infradead.org
Subject: Re: GPIO Support on pcm043
Date: Mon, 23 May 2011 09:12:56 +0200 [thread overview]
Message-ID: <20110523071256.GC20715@pengutronix.de> (raw)
In-Reply-To: <201105201530.20237.tim.sander@hbm.com>
On Fri, May 20, 2011 at 03:30:19PM +0200, Tim Sander wrote:
> Hi Eric
>
> Thanks for your answer
> > > Is there some obvious error on my side or is there no gpio
> > > support for pcm043? At least there seems to be support for
> > > the gpio ports on imx?
> > > Any hints?
> >
> > you first need to configure the mux of the pins to GPIO mode, then you can
> > use them as gpio.
> After tripping into that trap multiple times, i've already checked that, but
> forgot to mention it:
> static struct pad_desc pcm043_pads[] = {
> ...
> MX35_PAD_D3_CLS__GPIO1_4,
> MX35_PAD_D3_SPL__GPIO1_5,
> ...
Have you checked that you chose the correct iomux setup? These
particular pins can be routed to three different pads each:
#define MX35_PAD_CAPTURE__GPIO1_4 IOMUX_PAD(0x328, 0x004, 5, 0x850, 0, NO_PAD_CTRL)
#define MX35_PAD_SCKR__GPIO1_4 IOMUX_PAD(0x584, 0x140, 5, 0x850, 1, NO_PAD_CTRL)
#define MX35_PAD_D3_CLS__GPIO1_4 IOMUX_PAD(0x68c, 0x228, 5, 0x850, 2, NO_PAD_CTRL)
#define MX35_PAD_COMPARE__GPIO1_5 IOMUX_PAD(0x32c, 0x008, 5, 0x854, 0, NO_PAD_CTRL)
#define MX35_PAD_FSR__GPIO1_5 IOMUX_PAD(0x588, 0x144, 5, 0x854, 1, NO_PAD_CTRL)
#define MX35_PAD_D3_SPL__GPIO1_5 IOMUX_PAD(0x690, 0x22c, 5, 0x854, 2, NO_PAD_CTRL)
Sascha
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next prev parent reply other threads:[~2011-05-23 7:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-20 12:07 Tim Sander
2011-05-20 13:14 ` Eric Bénard
2011-05-20 13:30 ` Tim Sander
2011-05-20 13:34 ` Eric Bénard
2011-05-20 14:16 ` Eric Bénard
2011-05-23 7:12 ` Sascha Hauer [this message]
2011-05-23 10:20 ` Tim Sander
2011-05-23 7:06 ` Sascha Hauer
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