* [PATCH] Thumb2 support
@ 2012-02-28 8:56 Sascha Hauer
2012-02-28 8:56 ` [PATCH 1/3] ARM: move exception vectors away from start of binary Sascha Hauer
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Sascha Hauer @ 2012-02-28 8:56 UTC (permalink / raw)
To: barebox
Add some preparation to support Thumb2 support and finally Thumb2
support itself.
Sascha Hauer (3):
ARM: move exception vectors away from start of binary
ARM: get runtime offset of board_init_lowlevel_return by using separate section
ARM: Allow to compile in thumb-2 mode
arch/arm/Kconfig | 12 +++++
arch/arm/Makefile | 11 ++++-
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c | 3 +-
arch/arm/boards/eukrea_cpuimx35/flash_header.c | 3 +-
arch/arm/boards/eukrea_cpuimx51/flash_header.c | 3 +-
arch/arm/boards/freescale-mx25-3-stack/3stack.c | 3 +-
.../boards/freescale-mx35-3-stack/flash_header.c | 3 +-
arch/arm/boards/freescale-mx51-pdk/flash_header.c | 3 +-
arch/arm/boards/freescale-mx53-loco/flash_header.c | 3 +-
arch/arm/boards/freescale-mx53-smd/flash_header.c | 3 +-
arch/arm/cpu/cpu.c | 27 ++++++++++++
arch/arm/cpu/exceptions.S | 1 +
arch/arm/cpu/mmu.c | 4 +-
arch/arm/cpu/start.c | 44 ++++++++++++--------
arch/arm/include/asm/barebox-arm-head.h | 36 ++++++++++++++++
arch/arm/include/asm/barebox-arm.h | 3 +
arch/arm/include/asm/unified.h | 8 ++--
arch/arm/lib/armlinux.c | 17 +++++++-
arch/arm/lib/barebox.lds.S | 7 +++-
commands/go.c | 6 ++-
common/misc.c | 3 +
include/common.h | 6 +++
22 files changed, 173 insertions(+), 36 deletions(-)
create mode 100644 arch/arm/include/asm/barebox-arm-head.h
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/3] ARM: move exception vectors away from start of binary 2012-02-28 8:56 [PATCH] Thumb2 support Sascha Hauer @ 2012-02-28 8:56 ` Sascha Hauer 2012-02-28 8:56 ` [PATCH 2/3] ARM: get runtime offset of board_init_lowlevel_return by using separate section Sascha Hauer 2012-02-28 8:56 ` [PATCH 3/3] ARM: Allow to compile in thumb-2 mode Sascha Hauer 2 siblings, 0 replies; 8+ messages in thread From: Sascha Hauer @ 2012-02-28 8:56 UTC (permalink / raw) To: barebox Traditionally U-Boot and barebox have the exception vectors at the start of the binary. There is no real reason in doing so, because in the majority of cases this data will not be at 0x0 where it could be used as vectors directly anyway. This patch puts the vectors into a separate linker section and defines an head function which is placed at the start of the image instead. Putting this in a separate function also has the advantage that it can be placed at the start of images which require an additional header like several Freescale i.MX images. As the head function contains the barebox arm magic those images can now also be detected as barebox images. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c | 3 +- arch/arm/boards/eukrea_cpuimx35/flash_header.c | 3 +- arch/arm/boards/eukrea_cpuimx51/flash_header.c | 3 +- arch/arm/boards/freescale-mx25-3-stack/3stack.c | 3 +- .../boards/freescale-mx35-3-stack/flash_header.c | 3 +- arch/arm/boards/freescale-mx51-pdk/flash_header.c | 3 +- arch/arm/boards/freescale-mx53-loco/flash_header.c | 3 +- arch/arm/boards/freescale-mx53-smd/flash_header.c | 3 +- arch/arm/cpu/mmu.c | 4 +- arch/arm/cpu/start.c | 14 +++++----- arch/arm/include/asm/barebox-arm-head.h | 24 ++++++++++++++++++++ arch/arm/include/asm/barebox-arm.h | 2 + arch/arm/lib/barebox.lds.S | 5 +++- 13 files changed, 55 insertions(+), 18 deletions(-) create mode 100644 arch/arm/include/asm/barebox-arm-head.h diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c index 73e54f2..695e75f 100644 --- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c +++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c @@ -46,13 +46,14 @@ #include <usb/fsl_usb2.h> #include <mach/usb.h> #include <mach/devices-imx25.h> +#include <asm/barebox-arm-head.h> extern unsigned long _stext; extern void exception_vectors(void); void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/eukrea_cpuimx35/flash_header.c b/arch/arm/boards/eukrea_cpuimx35/flash_header.c index 93c8348..f8ed5d4 100644 --- a/arch/arm/boards/eukrea_cpuimx35/flash_header.c +++ b/arch/arm/boards/eukrea_cpuimx35/flash_header.c @@ -1,12 +1,13 @@ #include <common.h> #include <mach/imx-flash-header.h> #include <mach/imx-regs.h> +#include <asm/barebox-arm-head.h> extern void exception_vectors(void); void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/eukrea_cpuimx51/flash_header.c b/arch/arm/boards/eukrea_cpuimx51/flash_header.c index f953b09..ac6bbdc 100644 --- a/arch/arm/boards/eukrea_cpuimx51/flash_header.c +++ b/arch/arm/boards/eukrea_cpuimx51/flash_header.c @@ -1,11 +1,12 @@ #include <common.h> #include <mach/imx-flash-header.h> +#include <asm/barebox-arm-head.h> extern unsigned long _stext; void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/freescale-mx25-3-stack/3stack.c b/arch/arm/boards/freescale-mx25-3-stack/3stack.c index 5aa54e4..d7e24cf 100644 --- a/arch/arm/boards/freescale-mx25-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx25-3-stack/3stack.c @@ -42,13 +42,14 @@ #include <i2c/i2c.h> #include <mfd/mc34704.h> #include <mach/devices-imx25.h> +#include <asm/barebox-arm-head.h> extern unsigned long _stext; extern void exception_vectors(void); void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c index 92f2142..85b52a2 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c @@ -1,12 +1,13 @@ #include <common.h> #include <mach/imx-flash-header.h> #include <mach/imx-regs.h> +#include <asm/barebox-arm-head.h> extern void exception_vectors(void); void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/freescale-mx51-pdk/flash_header.c b/arch/arm/boards/freescale-mx51-pdk/flash_header.c index 5f94506..297dca1 100644 --- a/arch/arm/boards/freescale-mx51-pdk/flash_header.c +++ b/arch/arm/boards/freescale-mx51-pdk/flash_header.c @@ -1,11 +1,12 @@ #include <common.h> #include <mach/imx-flash-header.h> +#include <asm/barebox-arm-head.h> extern unsigned long _stext; void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/freescale-mx53-loco/flash_header.c b/arch/arm/boards/freescale-mx53-loco/flash_header.c index 490e223..b459640 100644 --- a/arch/arm/boards/freescale-mx53-loco/flash_header.c +++ b/arch/arm/boards/freescale-mx53-loco/flash_header.c @@ -16,10 +16,11 @@ #include <common.h> #include <asm/byteorder.h> #include <mach/imx-flash-header.h> +#include <asm/barebox-arm-head.h> void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/boards/freescale-mx53-smd/flash_header.c b/arch/arm/boards/freescale-mx53-smd/flash_header.c index 490e223..b459640 100644 --- a/arch/arm/boards/freescale-mx53-smd/flash_header.c +++ b/arch/arm/boards/freescale-mx53-smd/flash_header.c @@ -16,10 +16,11 @@ #include <common.h> #include <asm/byteorder.h> #include <mach/imx-flash-header.h> +#include <asm/barebox-arm-head.h> void __naked __flash_header_start go(void) { - __asm__ __volatile__("b exception_vectors\n"); + barebox_arm_head(); } struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = { diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 6d9b1e0..c19f931 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -4,6 +4,7 @@ #include <errno.h> #include <sizes.h> #include <asm/memory.h> +#include <asm/barebox-arm.h> #include <asm/system.h> #include <memory.h> @@ -182,7 +183,6 @@ static void vectors_init(void) { u32 *exc, *zero = NULL; void *vectors; - extern unsigned long exception_vectors; u32 cr; cr = get_cr(); @@ -210,7 +210,7 @@ static void vectors_init(void) vectors = xmemalign(PAGE_SIZE, PAGE_SIZE); memset(vectors, 0, PAGE_SIZE); - memcpy(vectors, &exception_vectors, ARM_VECTORS_SIZE); + memcpy(vectors, __exceptions_start, __exceptions_stop - __exceptions_start); if (cr & CR_V) exc[256 - 16] = (u32)vectors | PTE_TYPE_SMALL | PTE_FLAGS_CACHED; diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 61d7e3e..1a1538e 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -23,11 +23,17 @@ #include <common.h> #include <init.h> #include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> #include <asm/system.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> -void __naked __section(.text_entry) exception_vectors(void) +void __naked __section(.text_entry) start(void) +{ + barebox_arm_head(); +} + +void __naked __section(.text_exceptions) exception_vectors(void) { __asm__ __volatile__ ( "b reset\n" /* reset */ @@ -48,12 +54,6 @@ void __naked __section(.text_entry) exception_vectors(void) "1: bne 1b\n" /* irq (interrupt) */ "1: bne 1b\n" /* fiq (fast interrupt) */ #endif - ".word 0x65726162\n" /* 'bare' */ - ".word 0x00786f62\n" /* 'box' */ - ".word _text\n" /* text base. If copied there, - * barebox can skip relocation - */ - ".word _barebox_image_size\n" /* image size to copy */ ); } diff --git a/arch/arm/include/asm/barebox-arm-head.h b/arch/arm/include/asm/barebox-arm-head.h new file mode 100644 index 0000000..fdbee8c --- /dev/null +++ b/arch/arm/include/asm/barebox-arm-head.h @@ -0,0 +1,24 @@ +#ifndef __ASM_ARM_HEAD_H +#define __ASM_ARM_HEAD_H + +static inline void barebox_arm_head(void) +{ + __asm__ __volatile__ ( + "b reset\n" + "1: b 1b\n" + "1: b 1b\n" + "1: b 1b\n" + "1: b 1b\n" + "1: b 1b\n" + "1: b 1b\n" + "1: b 1b\n" + ".word 0x65726162\n" /* 'bare' */ + ".word 0x00786f62\n" /* 'box' */ + ".word _text\n" /* text base. If copied there, + * barebox can skip relocation + */ + ".word _barebox_image_size\n" /* image size to copy */ + ); +} + +#endif /* __ASM_ARM_HEAD_H */ diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h index 7bb1af1..3339782 100644 --- a/arch/arm/include/asm/barebox-arm.h +++ b/arch/arm/include/asm/barebox-arm.h @@ -36,6 +36,8 @@ int cleanup_before_linux(void); int board_init(void); int dram_init (void); +extern char __exceptions_start[], __exceptions_stop[]; + void board_init_lowlevel(void); void board_init_lowlevel_return(void); void arch_init_lowlevel(void); diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S index e9f6210..531e3d0 100644 --- a/arch/arm/lib/barebox.lds.S +++ b/arch/arm/lib/barebox.lds.S @@ -26,7 +26,7 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) -ENTRY(exception_vectors) +ENTRY(start) SECTIONS { . = TEXT_BASE; @@ -47,6 +47,9 @@ SECTIONS __bare_init_start = .; *(.text_bare_init*) __bare_init_end = .; + __exceptions_start = .; + KEEP(*(.text_exceptions*)) + __exceptions_stop = .; *(.text*) } BAREBOX_BARE_INIT_SIZE -- 1.7.9.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/3] ARM: get runtime offset of board_init_lowlevel_return by using separate section 2012-02-28 8:56 [PATCH] Thumb2 support Sascha Hauer 2012-02-28 8:56 ` [PATCH 1/3] ARM: move exception vectors away from start of binary Sascha Hauer @ 2012-02-28 8:56 ` Sascha Hauer 2012-02-29 18:19 ` Jean-Christophe PLAGNIOL-VILLARD 2012-02-28 8:56 ` [PATCH 3/3] ARM: Allow to compile in thumb-2 mode Sascha Hauer 2 siblings, 1 reply; 8+ messages in thread From: Sascha Hauer @ 2012-02-28 8:56 UTC (permalink / raw) To: barebox We used to get the runtime offset of the board_init_lowlevel_return by doing a &board_init_lowlevel_return. This does not work in thumb-2 mode, so use a separate linker section for this function instead. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/cpu/start.c | 4 ++-- arch/arm/include/asm/barebox-arm.h | 1 + arch/arm/lib/barebox.lds.S | 2 ++ 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 1a1538e..89aff1d 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -109,7 +109,7 @@ void __naked __bare_init reset(void) * Board code can jump here by either returning from board_init_lowlevel * or by calling this funtion directly. */ -void __naked __bare_init board_init_lowlevel_return(void) +void __naked __section(.text_ll_return) board_init_lowlevel_return(void) { uint32_t r, addr; @@ -124,7 +124,7 @@ void __naked __bare_init board_init_lowlevel_return(void) __asm__ __volatile__("mov sp, %0" : : "r"(r)); /* Get start of binary image */ - addr -= (uint32_t)&board_init_lowlevel_return - TEXT_BASE; + addr -= (uint32_t)&__ll_return - TEXT_BASE; /* relocate to link address if necessary */ if (addr != TEXT_BASE) diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h index 3339782..b880dd4 100644 --- a/arch/arm/include/asm/barebox-arm.h +++ b/arch/arm/include/asm/barebox-arm.h @@ -37,6 +37,7 @@ int board_init(void); int dram_init (void); extern char __exceptions_start[], __exceptions_stop[]; +extern char __ll_return[]; void board_init_lowlevel(void); void board_init_lowlevel_return(void); diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S index 531e3d0..bc20694 100644 --- a/arch/arm/lib/barebox.lds.S +++ b/arch/arm/lib/barebox.lds.S @@ -39,6 +39,8 @@ SECTIONS _stext = .; _text = .; *(.text_entry*) + __ll_return = .; + *(.text_ll_return*) #ifdef CONFIG_ARCH_EP93XX /* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */ . = 0x1000; -- 1.7.9.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] ARM: get runtime offset of board_init_lowlevel_return by using separate section 2012-02-28 8:56 ` [PATCH 2/3] ARM: get runtime offset of board_init_lowlevel_return by using separate section Sascha Hauer @ 2012-02-29 18:19 ` Jean-Christophe PLAGNIOL-VILLARD 0 siblings, 0 replies; 8+ messages in thread From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-29 18:19 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox On 09:56 Tue 28 Feb , Sascha Hauer wrote: > We used to get the runtime offset of the board_init_lowlevel_return > by doing a &board_init_lowlevel_return. This does not work in thumb-2 > mode, so use a separate linker section for this function instead. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> this can go asap I guess Best Regards, J. _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] ARM: Allow to compile in thumb-2 mode 2012-02-28 8:56 [PATCH] Thumb2 support Sascha Hauer 2012-02-28 8:56 ` [PATCH 1/3] ARM: move exception vectors away from start of binary Sascha Hauer 2012-02-28 8:56 ` [PATCH 2/3] ARM: get runtime offset of board_init_lowlevel_return by using separate section Sascha Hauer @ 2012-02-28 8:56 ` Sascha Hauer 2012-02-29 18:21 ` Jean-Christophe PLAGNIOL-VILLARD 2 siblings, 1 reply; 8+ messages in thread From: Sascha Hauer @ 2012-02-28 8:56 UTC (permalink / raw) To: barebox This shrinks the resulting binary size by ~25%. Exceptions are still handled in arm mode, so we have to explicitely put .arm directives into the exception code. Thumb-2 mode has been tested on i.MX51 Babbage board. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/Kconfig | 12 ++++++++++++ arch/arm/Makefile | 11 +++++++++-- arch/arm/cpu/cpu.c | 27 +++++++++++++++++++++++++++ arch/arm/cpu/exceptions.S | 1 + arch/arm/cpu/start.c | 26 ++++++++++++++++++-------- arch/arm/include/asm/barebox-arm-head.h | 12 ++++++++++++ arch/arm/include/asm/unified.h | 8 ++++---- arch/arm/lib/armlinux.c | 17 ++++++++++++++++- commands/go.c | 6 +++++- common/misc.c | 3 +++ include/common.h | 6 ++++++ 11 files changed, 113 insertions(+), 16 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4c0ee58..adb020a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -101,6 +101,18 @@ config AEABI To use this you need GCC version 4.0.0 or later. +config THUMB2_BAREBOX + select ARM_ASM_UNIFIED + depends on CPU_V7 + bool "Compile barebox in thumb-2 mode (read help)" + help + This enables compilation of barebox in thumb-2 mode which generates + ~25% smaller binaries. Arm Assembly code needs some fixups to be able + to work correctly in thumb-2 mode. the barebox core should have these + fixups since most assembly code is derived from the Kernel. However, + your board lowlevel init code may break in thumb-2 mode. You have been + warned. + endmenu menu "Arm specific settings " diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 9926280..56f21ab 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -39,8 +39,15 @@ ifeq ($(CONFIG_ARM_UNWIND),y) CFLAGS_ABI +=-funwind-tables endif -CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float -AFLAGS += -include asm/unified.h -msoft-float +ifeq ($(CONFIG_THUMB2_BAREBOX),y) +AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) +AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) +CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) +AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb +endif + +CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float $(CFLAGS_THUMB2) +AFLAGS += -include asm/unified.h -msoft-float $(AFLAGS_THUMB2) # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c index cf31e8b..71ef8c0 100644 --- a/arch/arm/cpu/cpu.c +++ b/arch/arm/cpu/cpu.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <init.h> #include <command.h> #include <cache.h> #include <asm/mmu.h> @@ -89,3 +90,29 @@ void arch_shutdown(void) ); #endif } + +#ifdef CONFIG_THUMB2_BAREBOX +static void thumb2_execute(void *func, int argc, char *argv[]) +{ + /* + * Switch back to arm mode before executing external + * programs. + */ + __asm__ __volatile__ ( + "mov r0, #0\n" + "mov r1, %0\n" + "mov r2, %1\n" + "bx %2\n" + : + : "r" (argc - 1), "r" (&argv[1]), "r" (func) + : "r0", "r1", "r2" + ); +} + +static int execute_init(void) +{ + do_execute = thumb2_execute; + return 0; +} +postcore_initcall(execute_init); +#endif diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S index 6f35d40..c08537a 100644 --- a/arch/arm/cpu/exceptions.S +++ b/arch/arm/cpu/exceptions.S @@ -106,6 +106,7 @@ _STACK_START: * exception handlers */ .section ".text","ax" + .arm .align 5 .globl undefined_instruction diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 89aff1d..5011fa2 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -33,26 +33,36 @@ void __naked __section(.text_entry) start(void) barebox_arm_head(); } +#ifdef CONFIG_THUMB2_BAREBOX +#define STOP \ + "1: bne 1b\n" \ + "nop\n" +#else +#define STOP \ + "1: bne 1b\n" +#endif + void __naked __section(.text_exceptions) exception_vectors(void) { __asm__ __volatile__ ( + ".arm\n" "b reset\n" /* reset */ #ifdef CONFIG_ARM_EXCEPTIONS "ldr pc, =undefined_instruction\n" /* undefined instruction */ "ldr pc, =software_interrupt\n" /* software interrupt (SWI) */ "ldr pc, =prefetch_abort\n" /* prefetch abort */ "ldr pc, =data_abort\n" /* data abort */ - "1: bne 1b\n" /* (reserved) */ + STOP /* (reserved) */ "ldr pc, =irq\n" /* irq (interrupt) */ "ldr pc, =fiq\n" /* fiq (fast interrupt) */ #else - "1: bne 1b\n" /* undefined instruction */ - "1: bne 1b\n" /* software interrupt (SWI) */ - "1: bne 1b\n" /* prefetch abort */ - "1: bne 1b\n" /* data abort */ - "1: bne 1b\n" /* (reserved) */ - "1: bne 1b\n" /* irq (interrupt) */ - "1: bne 1b\n" /* fiq (fast interrupt) */ + STOP /* undefined instruction */ + STOP /* software interrupt (SWI) */ + STOP /* prefetch abort */ + STOP /* data abort */ + STOP /* (reserved) */ + STOP /* irq (interrupt) */ + STOP /* fiq (fast interrupt) */ #endif ); } diff --git a/arch/arm/include/asm/barebox-arm-head.h b/arch/arm/include/asm/barebox-arm-head.h index fdbee8c..0dc3074 100644 --- a/arch/arm/include/asm/barebox-arm-head.h +++ b/arch/arm/include/asm/barebox-arm-head.h @@ -4,6 +4,17 @@ static inline void barebox_arm_head(void) { __asm__ __volatile__ ( +#ifdef CONFIG_THUMB2_BAREBOX + ".arm\n" + "adr r9, 1f + 1\n" + "bx r9\n" + ".thumb\n" + "1:\n" + "bl reset\n" + ".rept 10\n" + "1: b 1b\n" + ".endr\n" +#else "b reset\n" "1: b 1b\n" "1: b 1b\n" @@ -12,6 +23,7 @@ static inline void barebox_arm_head(void) "1: b 1b\n" "1: b 1b\n" "1: b 1b\n" +#endif ".word 0x65726162\n" /* 'bare' */ ".word 0x00786f62\n" /* 'box' */ ".word _text\n" /* text base. If copied there, diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h index bc63116..4d855c8 100644 --- a/arch/arm/include/asm/unified.h +++ b/arch/arm/include/asm/unified.h @@ -24,10 +24,10 @@ .syntax unified #endif -#ifdef CONFIG_THUMB2_KERNEL +#ifdef CONFIG_THUMB2_BAREBOX #if __GNUC__ < 4 -#error Thumb-2 kernel requires gcc >= 4 +#error Thumb-2 barebox requires gcc >= 4 #endif /* The CPSR bit describing the instruction set (Thumb) */ @@ -40,7 +40,7 @@ #endif #define BSYM(sym) sym + 1 -#else /* !CONFIG_THUMB2_KERNEL */ +#else /* !CONFIG_THUMB2_BAREBOX */ /* The CPSR bit describing the instruction set (ARM) */ #define PSR_ISETSTATE 0 @@ -52,7 +52,7 @@ #endif #define BSYM(sym) sym -#endif /* CONFIG_THUMB2_KERNEL */ +#endif /* CONFIG_THUMB2_BAREBOX */ #ifndef CONFIG_ARM_ASM_UNIFIED diff --git a/arch/arm/lib/armlinux.c b/arch/arm/lib/armlinux.c index 85fe2b9..a167036 100644 --- a/arch/arm/lib/armlinux.c +++ b/arch/arm/lib/armlinux.c @@ -255,6 +255,7 @@ void start_linux(void *adr, int swap, unsigned long initrd_address, { void (*kernel)(int zero, int arch, void *params) = adr; void *params = NULL; + int architecture; if (oftree) { printf("booting Linux kernel with devicetree\n"); @@ -272,5 +273,19 @@ void start_linux(void *adr, int swap, unsigned long initrd_address, __asm__ __volatile__("mcr p15, 0, %0, c1, c0" :: "r" (reg)); } - kernel(0, armlinux_get_architecture(), params); + architecture = armlinux_get_architecture(); + +#ifdef CONFIG_THUMB2_BAREBOX + __asm__ __volatile__ ( + "mov r0, #0\n" + "mov r1, %0\n" + "mov r2, %1\n" + "bx %2\n" + : + : "r" (architecture), "r" (params), "r" (kernel) + : "r0", "r1", "r2" + ); +#else + kernel(0, architecture, params); +#endif } diff --git a/commands/go.c b/commands/go.c index 6082fe5..bc984c8 100644 --- a/commands/go.c +++ b/commands/go.c @@ -62,7 +62,11 @@ static int do_go(struct command *cmdtp, int argc, char *argv[]) func = addr; shutdown_barebox(); - func(argc - 1, &argv[1]); + + if (do_execute) + do_execute(func, argc - 1, &argv[1]); + else + func(argc - 1, &argv[1]); /* * The application returned. Since we have shutdown barebox and diff --git a/common/misc.c b/common/misc.c index a0059c1..b31a45c 100644 --- a/common/misc.c +++ b/common/misc.c @@ -125,3 +125,6 @@ void perror(const char *s) #endif } EXPORT_SYMBOL(perror); + +void (*do_execute)(void *func, int argc, char *argv[]); +EXPORT_SYMBOL(do_execute); diff --git a/include/common.h b/include/common.h index d227875..d2347f8 100644 --- a/include/common.h +++ b/include/common.h @@ -146,6 +146,12 @@ unsigned long strtoul_suffix(const char *str, char **endp, int base); void start_barebox(void); void shutdown_barebox(void); +/* + * architectures which have special calling conventions for + * executing programs should set this. Used by the 'go' command + */ +extern void (*do_execute)(void *func, int argc, char *argv[]); + void arch_shutdown(void); int run_shell(void); -- 1.7.9.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] ARM: Allow to compile in thumb-2 mode 2012-02-28 8:56 ` [PATCH 3/3] ARM: Allow to compile in thumb-2 mode Sascha Hauer @ 2012-02-29 18:21 ` Jean-Christophe PLAGNIOL-VILLARD 2012-02-29 19:23 ` Sascha Hauer 0 siblings, 1 reply; 8+ messages in thread From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-29 18:21 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox On 09:56 Tue 28 Feb , Sascha Hauer wrote: > This shrinks the resulting binary size by ~25%. Exceptions > are still handled in arm mode, so we have to explicitely > put .arm directives into the exception code. Thumb-2 mode > has been tested on i.MX51 Babbage board. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > arch/arm/Kconfig | 12 ++++++++++++ > arch/arm/Makefile | 11 +++++++++-- > arch/arm/cpu/cpu.c | 27 +++++++++++++++++++++++++++ > arch/arm/cpu/exceptions.S | 1 + > arch/arm/cpu/start.c | 26 ++++++++++++++++++-------- > arch/arm/include/asm/barebox-arm-head.h | 12 ++++++++++++ > arch/arm/include/asm/unified.h | 8 ++++---- > arch/arm/lib/armlinux.c | 17 ++++++++++++++++- > commands/go.c | 6 +++++- > common/misc.c | 3 +++ > include/common.h | 6 ++++++ > 11 files changed, 113 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 4c0ee58..adb020a 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -101,6 +101,18 @@ config AEABI > > To use this you need GCC version 4.0.0 or later. > > +config THUMB2_BAREBOX > + select ARM_ASM_UNIFIED > + depends on CPU_V7 > + bool "Compile barebox in thumb-2 mode (read help)" > + help > + This enables compilation of barebox in thumb-2 mode which generates > + ~25% smaller binaries. Arm Assembly code needs some fixups to be able > + to work correctly in thumb-2 mode. the barebox core should have these > + fixups since most assembly code is derived from the Kernel. However, > + your board lowlevel init code may break in thumb-2 mode. You have been > + warned. > + > endmenu > > menu "Arm specific settings " > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index 9926280..56f21ab 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -39,8 +39,15 @@ ifeq ($(CONFIG_ARM_UNWIND),y) > CFLAGS_ABI +=-funwind-tables > endif > > -CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float > -AFLAGS += -include asm/unified.h -msoft-float > +ifeq ($(CONFIG_THUMB2_BAREBOX),y) > +AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) > +AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) > +CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) > +AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb > +endif > + > +CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float $(CFLAGS_THUMB2) > +AFLAGS += -include asm/unified.h -msoft-float $(AFLAGS_THUMB2) > > # Machine directory name. This list is sorted alphanumerically > # by CONFIG_* macro name. > diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c > index cf31e8b..71ef8c0 100644 > --- a/arch/arm/cpu/cpu.c > +++ b/arch/arm/cpu/cpu.c > @@ -26,6 +26,7 @@ > */ > > #include <common.h> > +#include <init.h> > #include <command.h> > #include <cache.h> > #include <asm/mmu.h> > @@ -89,3 +90,29 @@ void arch_shutdown(void) > ); > #endif > } > + > +#ifdef CONFIG_THUMB2_BAREBOX > +static void thumb2_execute(void *func, int argc, char *argv[]) > +{ > + /* > + * Switch back to arm mode before executing external > + * programs. > + */ > + __asm__ __volatile__ ( > + "mov r0, #0\n" > + "mov r1, %0\n" > + "mov r2, %1\n" > + "bx %2\n" > + : > + : "r" (argc - 1), "r" (&argv[1]), "r" (func) > + : "r0", "r1", "r2" > + ); > +} > + > +static int execute_init(void) > +{ > + do_execute = thumb2_execute; > + return 0; > +} > +postcore_initcall(execute_init); > +#endif > diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S > index 6f35d40..c08537a 100644 > --- a/arch/arm/cpu/exceptions.S > +++ b/arch/arm/cpu/exceptions.S > @@ -106,6 +106,7 @@ _STACK_START: > * exception handlers > */ > .section ".text","ax" > + .arm > > .align 5 > .globl undefined_instruction > diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c > index 89aff1d..5011fa2 100644 > --- a/arch/arm/cpu/start.c > +++ b/arch/arm/cpu/start.c > @@ -33,26 +33,36 @@ void __naked __section(.text_entry) start(void) > barebox_arm_head(); > } > > +#ifdef CONFIG_THUMB2_BAREBOX > +#define STOP \ > + "1: bne 1b\n" \ > + "nop\n" > +#else > +#define STOP \ > + "1: bne 1b\n" > +#endif here is my issue can not use bne can only use ldr or b Best Regards, J. _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] ARM: Allow to compile in thumb-2 mode 2012-02-29 18:21 ` Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-29 19:23 ` Sascha Hauer 2012-03-01 4:40 ` Jean-Christophe PLAGNIOL-VILLARD 0 siblings, 1 reply; 8+ messages in thread From: Sascha Hauer @ 2012-02-29 19:23 UTC (permalink / raw) To: Jean-Christophe PLAGNIOL-VILLARD; +Cc: barebox On Wed, Feb 29, 2012 at 07:21:23PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote: > On 09:56 Tue 28 Feb , Sascha Hauer wrote: > > This shrinks the resulting binary size by ~25%. Exceptions > > are still handled in arm mode, so we have to explicitely > > put .arm directives into the exception code. Thumb-2 mode > > has been tested on i.MX51 Babbage board. > > > > +#define STOP \ > > + "1: bne 1b\n" \ > > + "nop\n" > > +#else > > +#define STOP \ > > + "1: bne 1b\n" > > +#endif > here is my issue can not use bne > can only use ldr or b Missed this one. bne is wrong anyway, so replaced with '1: b 1b' Also, removed the Thumb2 special handling here since the exception vectors are explicitely compiled in Arm mode. Sascha 8<-------------------------------------------------------------- [PATCH] ARM: Allow to compile in thumb-2 mode This shrinks the resulting binary size by ~25%. Exceptions are still handled in arm mode, so we have to explicitely put .arm directives into the exception code. Thumb-2 mode has been tested on i.MX51 Babbage board. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/Kconfig | 12 ++++++++++++ arch/arm/Makefile | 11 +++++++++-- arch/arm/cpu/cpu.c | 27 +++++++++++++++++++++++++++ arch/arm/cpu/exceptions.S | 1 + arch/arm/cpu/start.c | 17 +++++++++-------- arch/arm/include/asm/barebox-arm-head.h | 12 ++++++++++++ arch/arm/include/asm/unified.h | 8 ++++---- arch/arm/lib/armlinux.c | 17 ++++++++++++++++- commands/go.c | 6 +++++- common/misc.c | 3 +++ include/common.h | 6 ++++++ 11 files changed, 104 insertions(+), 16 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b600179..42885bd 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -101,6 +101,18 @@ config AEABI To use this you need GCC version 4.0.0 or later. +config THUMB2_BAREBOX + select ARM_ASM_UNIFIED + depends on CPU_V7 + bool "Compile barebox in thumb-2 mode (read help)" + help + This enables compilation of barebox in thumb-2 mode which generates + ~25% smaller binaries. Arm Assembly code needs some fixups to be able + to work correctly in thumb-2 mode. the barebox core should have these + fixups since most assembly code is derived from the Kernel. However, + your board lowlevel init code may break in thumb-2 mode. You have been + warned. + endmenu menu "Arm specific settings " diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5d7c344..1db17b5 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -39,8 +39,15 @@ ifeq ($(CONFIG_ARM_UNWIND),y) CFLAGS_ABI +=-funwind-tables endif -CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float -AFLAGS += -include asm/unified.h -msoft-float +ifeq ($(CONFIG_THUMB2_BAREBOX),y) +AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) +AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) +CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) +AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb +endif + +CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float $(CFLAGS_THUMB2) +AFLAGS += -include asm/unified.h -msoft-float $(AFLAGS_THUMB2) # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c index cf31e8b..71ef8c0 100644 --- a/arch/arm/cpu/cpu.c +++ b/arch/arm/cpu/cpu.c @@ -26,6 +26,7 @@ */ #include <common.h> +#include <init.h> #include <command.h> #include <cache.h> #include <asm/mmu.h> @@ -89,3 +90,29 @@ void arch_shutdown(void) ); #endif } + +#ifdef CONFIG_THUMB2_BAREBOX +static void thumb2_execute(void *func, int argc, char *argv[]) +{ + /* + * Switch back to arm mode before executing external + * programs. + */ + __asm__ __volatile__ ( + "mov r0, #0\n" + "mov r1, %0\n" + "mov r2, %1\n" + "bx %2\n" + : + : "r" (argc - 1), "r" (&argv[1]), "r" (func) + : "r0", "r1", "r2" + ); +} + +static int execute_init(void) +{ + do_execute = thumb2_execute; + return 0; +} +postcore_initcall(execute_init); +#endif diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S index 6f35d40..c08537a 100644 --- a/arch/arm/cpu/exceptions.S +++ b/arch/arm/cpu/exceptions.S @@ -106,6 +106,7 @@ _STACK_START: * exception handlers */ .section ".text","ax" + .arm .align 5 .globl undefined_instruction diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 89aff1d..ede8fd1 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -36,23 +36,24 @@ void __naked __section(.text_entry) start(void) void __naked __section(.text_exceptions) exception_vectors(void) { __asm__ __volatile__ ( + ".arm\n" "b reset\n" /* reset */ #ifdef CONFIG_ARM_EXCEPTIONS "ldr pc, =undefined_instruction\n" /* undefined instruction */ "ldr pc, =software_interrupt\n" /* software interrupt (SWI) */ "ldr pc, =prefetch_abort\n" /* prefetch abort */ "ldr pc, =data_abort\n" /* data abort */ - "1: bne 1b\n" /* (reserved) */ + "1: b 1b\n" /* (reserved) */ "ldr pc, =irq\n" /* irq (interrupt) */ "ldr pc, =fiq\n" /* fiq (fast interrupt) */ #else - "1: bne 1b\n" /* undefined instruction */ - "1: bne 1b\n" /* software interrupt (SWI) */ - "1: bne 1b\n" /* prefetch abort */ - "1: bne 1b\n" /* data abort */ - "1: bne 1b\n" /* (reserved) */ - "1: bne 1b\n" /* irq (interrupt) */ - "1: bne 1b\n" /* fiq (fast interrupt) */ + "1: b 1b\n" /* undefined instruction */ + "1: b 1b\n" /* software interrupt (SWI) */ + "1: b 1b\n" /* prefetch abort */ + "1: b 1b\n" /* data abort */ + "1: b 1b\n" /* (reserved) */ + "1: b 1b\n" /* irq (interrupt) */ + "1: b 1b\n" /* fiq (fast interrupt) */ #endif ); } diff --git a/arch/arm/include/asm/barebox-arm-head.h b/arch/arm/include/asm/barebox-arm-head.h index ec4a68c..dc0acb1 100644 --- a/arch/arm/include/asm/barebox-arm-head.h +++ b/arch/arm/include/asm/barebox-arm-head.h @@ -2,10 +2,22 @@ static inline void barebox_arm_head(void) { __asm__ __volatile__ ( +#ifdef CONFIG_THUMB2_BAREBOX + ".arm\n" + "adr r9, 1f + 1\n" + "bx r9\n" + ".thumb\n" + "1:\n" + "bl reset\n" + ".rept 10\n" + "nop\n" + ".endr\n" +#else "b reset\n" ".rept 7\n" ".word 0x0\n" ".endr\n" +#endif ".word 0x65726162\n" /* 'bare' */ ".word 0x00786f62\n" /* 'box' */ ".word _text\n" /* text base. If copied there, diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h index bc63116..4d855c8 100644 --- a/arch/arm/include/asm/unified.h +++ b/arch/arm/include/asm/unified.h @@ -24,10 +24,10 @@ .syntax unified #endif -#ifdef CONFIG_THUMB2_KERNEL +#ifdef CONFIG_THUMB2_BAREBOX #if __GNUC__ < 4 -#error Thumb-2 kernel requires gcc >= 4 +#error Thumb-2 barebox requires gcc >= 4 #endif /* The CPSR bit describing the instruction set (Thumb) */ @@ -40,7 +40,7 @@ #endif #define BSYM(sym) sym + 1 -#else /* !CONFIG_THUMB2_KERNEL */ +#else /* !CONFIG_THUMB2_BAREBOX */ /* The CPSR bit describing the instruction set (ARM) */ #define PSR_ISETSTATE 0 @@ -52,7 +52,7 @@ #endif #define BSYM(sym) sym -#endif /* CONFIG_THUMB2_KERNEL */ +#endif /* CONFIG_THUMB2_BAREBOX */ #ifndef CONFIG_ARM_ASM_UNIFIED diff --git a/arch/arm/lib/armlinux.c b/arch/arm/lib/armlinux.c index 1d210d1..4617daf 100644 --- a/arch/arm/lib/armlinux.c +++ b/arch/arm/lib/armlinux.c @@ -255,6 +255,7 @@ void start_linux(void *adr, int swap, unsigned long initrd_address, { void (*kernel)(int zero, int arch, void *params) = adr; void *params = NULL; + int architecture; if (oftree) { printf("booting Linux kernel with devicetree\n"); @@ -271,5 +272,19 @@ void start_linux(void *adr, int swap, unsigned long initrd_address, __asm__ __volatile__("mcr p15, 0, %0, c1, c0" :: "r" (reg)); } - kernel(0, armlinux_get_architecture(), params); + architecture = armlinux_get_architecture(); + +#ifdef CONFIG_THUMB2_BAREBOX + __asm__ __volatile__ ( + "mov r0, #0\n" + "mov r1, %0\n" + "mov r2, %1\n" + "bx %2\n" + : + : "r" (architecture), "r" (params), "r" (kernel) + : "r0", "r1", "r2" + ); +#else + kernel(0, architecture, params); +#endif } diff --git a/commands/go.c b/commands/go.c index 6082fe5..bc984c8 100644 --- a/commands/go.c +++ b/commands/go.c @@ -62,7 +62,11 @@ static int do_go(struct command *cmdtp, int argc, char *argv[]) func = addr; shutdown_barebox(); - func(argc - 1, &argv[1]); + + if (do_execute) + do_execute(func, argc - 1, &argv[1]); + else + func(argc - 1, &argv[1]); /* * The application returned. Since we have shutdown barebox and diff --git a/common/misc.c b/common/misc.c index 7edf536..9263f4a 100644 --- a/common/misc.c +++ b/common/misc.c @@ -125,3 +125,6 @@ void perror(const char *s) #endif } EXPORT_SYMBOL(perror); + +void (*do_execute)(void *func, int argc, char *argv[]); +EXPORT_SYMBOL(do_execute); diff --git a/include/common.h b/include/common.h index a89b3bd..9b53fdb 100644 --- a/include/common.h +++ b/include/common.h @@ -137,6 +137,12 @@ unsigned long strtoul_suffix(const char *str, char **endp, int base); void start_barebox(void); void shutdown_barebox(void); +/* + * architectures which have special calling conventions for + * executing programs should set this. Used by the 'go' command + */ +extern void (*do_execute)(void *func, int argc, char *argv[]); + void arch_shutdown(void); int run_shell(void); -- 1.7.9.1 -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] ARM: Allow to compile in thumb-2 mode 2012-02-29 19:23 ` Sascha Hauer @ 2012-03-01 4:40 ` Jean-Christophe PLAGNIOL-VILLARD 0 siblings, 0 replies; 8+ messages in thread From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-03-01 4:40 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox On 20:23 Wed 29 Feb , Sascha Hauer wrote: > On Wed, Feb 29, 2012 at 07:21:23PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote: > > On 09:56 Tue 28 Feb , Sascha Hauer wrote: > > > This shrinks the resulting binary size by ~25%. Exceptions > > > are still handled in arm mode, so we have to explicitely > > > put .arm directives into the exception code. Thumb-2 mode > > > has been tested on i.MX51 Babbage board. > > > > > > +#define STOP \ > > > + "1: bne 1b\n" \ > > > + "nop\n" > > > +#else > > > +#define STOP \ > > > + "1: bne 1b\n" > > > +#endif > > here is my issue can not use bne > > can only use ldr or b > > Missed this one. bne is wrong anyway, so replaced with '1: b 1b' > Also, removed the Thumb2 special handling here since the exception > vectors are explicitely compiled in Arm mode. > do you have push this somewhere I need to test it Best Regards, J. _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2012-03-01 4:50 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2012-02-28 8:56 [PATCH] Thumb2 support Sascha Hauer 2012-02-28 8:56 ` [PATCH 1/3] ARM: move exception vectors away from start of binary Sascha Hauer 2012-02-28 8:56 ` [PATCH 2/3] ARM: get runtime offset of board_init_lowlevel_return by using separate section Sascha Hauer 2012-02-29 18:19 ` Jean-Christophe PLAGNIOL-VILLARD 2012-02-28 8:56 ` [PATCH 3/3] ARM: Allow to compile in thumb-2 mode Sascha Hauer 2012-02-29 18:21 ` Jean-Christophe PLAGNIOL-VILLARD 2012-02-29 19:23 ` Sascha Hauer 2012-03-01 4:40 ` Jean-Christophe PLAGNIOL-VILLARD
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